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target/mips32: add cpu info detection

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Add detection for mips cpu types by using prid.
Add cpuinfo command for inspecting more verbose info.
Add MIPS Architecture specs in openocd docs.

Change-Id: I28573b7c51783628db986bad0e226dcc399b4fa6
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7912
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This commit is contained in:
Walter Ji
2023-09-26 17:21:42 +08:00
committed by Antonio Borneo
parent b717373247
commit 7de4b1202d
4 changed files with 482 additions and 87 deletions
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13
src/target/mips_cpu.h
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@@ -12,7 +12,12 @@
/* Assigned Company values for bits 23:16 of the PRId register. */
#define PRID_COMP_MASK 0xff0000
#define PRID_COMP_LEGACY 0x000000
#define PRID_COMP_LEGACY 0x000000
#define PRID_COMP_MTI 0x010000
#define PRID_COMP_BROADCOM 0x020000
#define PRID_COMP_ALCHEMY 0x030000
#define PRID_COMP_LEXRA 0x0b0000
#define PRID_COMP_ALTERA 0x100000
#define PRID_COMP_INGENIC_E1 0xe10000
/*
@@ -22,6 +27,12 @@
*/
#define PRID_IMP_MASK 0xff00
#define PRID_IMP_MAPTIV_UC 0x9D00
#define PRID_IMP_MAPTIV_UP 0x9E00
#define PRID_IMP_IAPTIV_CM 0xA000
#define PRID_IMP_IAPTIV 0xA100
#define PRID_IMP_M5150 0xA700
#define PRID_IMP_XBURST_REV1 0x0200 /* XBurst®1 with MXU1.0/MXU1.1 SIMD ISA */
#endif /* OPENOCD_TARGET_MIPS_CPU_H */