Transform 'u8' to 'uint8_t' in src/target
- Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@@ -95,8 +95,8 @@ int arm7tdmi_examine_debug_reason(target_t *target)
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&& (target->debug_reason != DBG_REASON_SINGLESTEP))
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{
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scan_field_t fields[2];
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u8 databus[4];
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u8 breakpoint;
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uint8_t databus[4];
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uint8_t breakpoint;
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jtag_set_end_state(TAP_DRPAUSE);
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@@ -185,11 +185,11 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
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fields[1].tap = jtag_info->tap;
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fields[1].num_bits = 32;
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fields[1].out_value = NULL;
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fields[1].in_value = (u8 *)in;
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fields[1].in_value = (uint8_t *)in;
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jtag_add_dr_scan(2, fields, jtag_get_end_state());
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jtag_add_callback(arm7flip32, (u8 *)in);
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jtag_add_callback(arm7flip32, (uint8_t *)in);
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jtag_add_runtest(0, jtag_get_end_state());
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@@ -214,7 +214,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
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return ERROR_OK;
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}
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void arm_endianness(u8 *tmp, void *in, int size, int be, int flip)
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void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
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{
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u32 readback=le_to_h_u32(tmp);
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if (flip)
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@@ -224,30 +224,30 @@ void arm_endianness(u8 *tmp, void *in, int size, int be, int flip)
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case 4:
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if (be)
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{
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h_u32_to_be(((u8*)in), readback);
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h_u32_to_be(((uint8_t*)in), readback);
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} else
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{
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h_u32_to_le(((u8*)in), readback);
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h_u32_to_le(((uint8_t*)in), readback);
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}
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break;
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case 2:
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if (be)
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{
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h_u16_to_be(((u8*)in), readback & 0xffff);
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h_u16_to_be(((uint8_t*)in), readback & 0xffff);
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} else
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{
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h_u16_to_le(((u8*)in), readback & 0xffff);
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h_u16_to_le(((uint8_t*)in), readback & 0xffff);
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}
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break;
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case 1:
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*((u8 *)in)= readback & 0xff;
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*((uint8_t *)in)= readback & 0xff;
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break;
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}
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}
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static int arm7endianness(u8 *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
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static int arm7endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
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{
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arm_endianness((u8 *)captured, in, (int)size, (int)be, 1);
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arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
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return ERROR_OK;
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}
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@@ -397,7 +397,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
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int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
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u32 *buf_u32 = buffer;
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u16 *buf_u16 = buffer;
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u8 *buf_u8 = buffer;
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uint8_t *buf_u8 = buffer;
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/* STMIA r0-15, [r0] at debug speed
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* register values will start to appear on 4th DCLK
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@@ -481,7 +481,7 @@ void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
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arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
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}
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void arm7tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
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void arm7tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
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{
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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