- Fixes '+' whitespace

- Replace ')\(+\)(' with ') \1 ('.
- Replace ')\(+\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\(+\)(' with '\1 \2 ('.
- Replace '\(\w\)\(+\)\(\w\)' with '\1 \2 \3'.


git-svn-id: svn://svn.berlios.de/openocd/trunk@2373 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
zwelch
2009-06-23 22:44:17 +00:00
parent 84df52f9ea
commit 8959de9f67
52 changed files with 443 additions and 443 deletions

View File

@@ -383,7 +383,7 @@ void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg
for (i = 0; i <= 15; i++)
{
if (mask & (1 << i))
/* nothing fetched, STM still in EXECUTE (1+i cycle) */
/* nothing fetched, STM still in EXECUTE (1 + i cycle) */
arm7tdmi_clock_data_in(jtag_info, core_regs[i]);
}
}
@@ -412,7 +412,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void
for (i = 0; i <= 15; i++)
{
/* nothing fetched, STM still in EXECUTE (1+i cycle), read databus */
/* nothing fetched, STM still in EXECUTE (1 + i cycle), read databus */
if (mask & (1 << i))
{
switch (size)
@@ -522,7 +522,7 @@ void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg
for (i = 0; i <= 15; i++)
{
if (mask & (1 << i))
/* nothing fetched, LDM still in EXECUTE (1+i cycle) */
/* nothing fetched, LDM still in EXECUTE (1 + i cycle) */
arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0);
}
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);