diff --git a/.travis.yml b/.travis.yml
index 35bf8c435..37a599339 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -30,6 +30,7 @@ matrix:
           env:
               - BUILD=i686-linux-gnu
               - CFLAGS=-m32
+              - CONFIGURE_ARGS="--disable-target64"
               - EXECUTABLE=openocd
           compiler: clang
           addons:
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 7d1c06cf0..78718ca16 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -702,7 +702,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
 			}
 
 			if (verify == 0) {
-				LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx64
+				LOG_ERROR("Unable to set 32bit breakpoint at address %08" TARGET_PRIxADDR
 					" - check that memory is read/writable", breakpoint->address);
 				return ERROR_OK;
 			}
@@ -723,7 +723,7 @@ static int mips_m4k_set_breakpoint(struct target *target,
 				return retval;
 
 			if (verify != MIPS16_SDBBP(isa_req)) {
-				LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx64
+				LOG_ERROR("Unable to set 16bit breakpoint at address %08" TARGET_PRIxADDR
 						" - check that memory is read/writable", breakpoint->address);
 				return ERROR_OK;
 			}
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 22a4c876c..6daad3c85 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -795,12 +795,12 @@ static int examine_progbuf(struct target *target)
 
 	uint32_t written = dmi_read(target, DMI_PROGBUF0);
 	if (written == (uint32_t) info->progbuf_address) {
-		LOG_INFO("progbuf is writable at 0x%" TARGET_PRIxADDR,
+		LOG_INFO("progbuf is writable at 0x%" PRIx64,
 				info->progbuf_address);
 		info->progbuf_writable = YNM_YES;
 
 	} else {
-		LOG_INFO("progbuf is not writeable at 0x%" TARGET_PRIxADDR,
+		LOG_INFO("progbuf is not writeable at 0x%" PRIx64,
 				info->progbuf_address);
 		info->progbuf_writable = YNM_NO;
 	}
@@ -1746,8 +1746,8 @@ static int read_memory_progbuf(struct target *target, target_addr_t address,
 		 * dm_data0 contains mem[s0 - 2*size]
 		 * s1 contains mem[s0-size] */
 
-		LOG_DEBUG("creating burst to read from 0x%" TARGET_PRIxADDR
-				" up to 0x%" TARGET_PRIxADDR, read_addr, fin_addr);
+		LOG_DEBUG("creating burst to read from 0x%" PRIx64
+				" up to 0x%" PRIx64, read_addr, fin_addr);
 		assert(read_addr >= address && read_addr < fin_addr);
 		struct riscv_batch *batch = riscv_batch_alloc(target, 32,
 				info->dmi_busy_delay + info->ac_busy_delay);