- added -c option that will execute an openocd command
- added at91eb40a target library example. git-svn-id: svn://svn.berlios.de/openocd/trunk@333 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@@ -1,22 +1,23 @@
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if OOCD_TRACE
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OOCD_TRACE_FILES = oocd_trace.c
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else
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OOCD_TRACE_FILES =
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endif
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INCLUDES = -I$(top_srcdir)/src/gdb -I$(top_srcdir)/src/helper -I$(top_srcdir)/src/jtag -I$(top_srcdir)/src/xsvf $(all_includes)
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METASOURCES = AUTO
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AM_CPPFLAGS = -DPKGLIBDIR=\"$(pkglibdir)\" @CPPFLAGS@
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noinst_LIBRARIES = libtarget.a
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libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c etm.c arm7tdmi.c arm9tdmi.c \
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arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
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arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c cortex_swjdp.c \
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etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c
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noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
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arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
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arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h cortex_swjdp.h \
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etm_dummy.h oocd_trace.h target_request.h trace.h
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nobase_dist_pkglib_DATA = xscale/debug_handler.bin
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if OOCD_TRACE
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OOCD_TRACE_FILES = oocd_trace.c
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else
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OOCD_TRACE_FILES =
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endif
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INCLUDES = -I$(top_srcdir)/src/gdb -I$(top_srcdir)/src/helper -I$(top_srcdir)/src/jtag -I$(top_srcdir)/src/xsvf $(all_includes)
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METASOURCES = AUTO
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AM_CPPFLAGS = -DPKGLIBDIR=\"$(pkglibdir)\" @CPPFLAGS@
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noinst_LIBRARIES = libtarget.a
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libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c etm.c arm7tdmi.c arm9tdmi.c \
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arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
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arm966e.c arm926ejs.c feroceon.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c cortex_swjdp.c \
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etm_dummy.c $(OOCD_TRACE_FILES) target_request.c trace.c
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noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
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arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
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arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h cortex_swjdp.h \
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etm_dummy.h oocd_trace.h target_request.h trace.h
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nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.cfg target/at91eb40a.cfg
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@@ -0,0 +1,8 @@
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# Reset script for AT91EB40a
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reg cpsr 0x000000D3
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mww 0xFFE00020 0x1
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mww 0xFFE00024 0x00000000
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mww 0xFFE00000 0x01002539
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mww 0xFFFFF124 0xFFFFFFFF
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mww 0xffff0010 0x100
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mww 0xffff0034 0x100
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@@ -0,0 +1,34 @@
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#Script for AT91EB40a
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#Atmel ties SRST & TRST together, at which point it makes
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#no sense to use TRST, but use TMS instead.
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#
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#The annoying thing with tying SRST & TRST together is that
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#there is no way to halt the CPU *before and during* the
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#SRST reset, which means that the CPU will run a number
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#of cycles before it can be halted(as much as milliseconds).
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reset_config srst_only srst_pulls_trst
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
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target arm7tdmi little reset_init 0 arm7tdmi-s_r4
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# speed up memory downloads
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arm7 fast_memory_access enable
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arm7_9 dcc_downloads enable
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# OpenOCD does not have a flash driver for for AT91FR40162S
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target_script 0 reset event/at91eb40a_reset.cfg
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# required for usable performance. Used for lots of
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# other things than flash programming.
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working_area 0 0x00000000 0x20000 nobackup
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#force hardware values - we're running out of flash more
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#often than not. The user can disable this in his
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#subsequent config script.
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arm7_9 force_hw_bkpts enable
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