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aarch64: fix mode switching

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DCPS only allows to enter higher ELs, for lower ELs you need to
use DRPS. Also, of course the encoding differs between A64 and T32.
Both DCPS and DRPS also clobber DLR and DSPSR, which then need to be
restored on resume.

Change-Id: Ifa3dcfa94212702e57170bd59fd0bb25495fb6fd
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
This commit is contained in:
Matthias Welwarsky
2016-10-20 11:31:40 +02:00
parent 79c4c22e15
commit 946958cb72
6 changed files with 119 additions and 51 deletions
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2
src/target/armv8_dpm.h
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@@ -32,7 +32,7 @@ int armv8_dpm_setup(struct arm_dpm *dpm);
int armv8_dpm_initialize(struct arm_dpm *dpm);
int armv8_dpm_read_current_registers(struct arm_dpm *);
int dpmv8_modeswitch(struct arm_dpm *dpm, enum arm_mode mode);
int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode);
int armv8_dpm_write_dirty_registers(struct arm_dpm *, bool bpwp);