target: riscv: convert 'unsigned' to 'unsigned int'
Conversion done with checkpatch --fix-inplace -types UNSPECIFIED_INT Ignore the cast as they could be better addressed. Fix only minor additional checkpatch issue (spacing and line length). Change-Id: I11f10eddadc21e051c96eb3d4d4c0554a2cddd15 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8483 Tested-by: jenkins
This commit is contained in:
@@ -48,7 +48,7 @@ static int riscv013_on_step(struct target *target);
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static int riscv013_resume_prep(struct target *target);
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static bool riscv013_is_halted(struct target *target);
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static enum riscv_halt_reason riscv013_halt_reason(struct target *target);
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static int riscv013_write_debug_buffer(struct target *target, unsigned index,
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static int riscv013_write_debug_buffer(struct target *target, unsigned int index,
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riscv_insn_t d);
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static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned
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index);
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@@ -59,7 +59,7 @@ static int riscv013_dmi_write_u64_bits(struct target *target);
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static void riscv013_fill_dmi_nop_u64(struct target *target, char *buf);
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static int register_read(struct target *target, uint64_t *value, uint32_t number);
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static int register_read_direct(struct target *target, uint64_t *value, uint32_t number);
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static int register_write_direct(struct target *target, unsigned number,
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static int register_write_direct(struct target *target, unsigned int number,
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uint64_t value);
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static int read_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer, uint32_t increment);
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@@ -156,13 +156,13 @@ typedef struct {
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typedef struct {
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/* The indexed used to address this hart in its DM. */
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unsigned index;
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unsigned int index;
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/* Number of address bits in the dbus register. */
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unsigned abits;
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unsigned int abits;
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/* Number of abstract command data registers. */
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unsigned datacount;
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unsigned int datacount;
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/* Number of words in the Program Buffer. */
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unsigned progbufsize;
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unsigned int progbufsize;
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/* We cache the read-only bits of sbcs here. */
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uint32_t sbcs;
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@@ -209,7 +209,7 @@ typedef struct {
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int16_t dataaddr;
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/* The width of the hartsel field. */
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unsigned hartsellen;
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unsigned int hartsellen;
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/* DM that provides access to this target. */
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dm013_info_t *dm;
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@@ -290,10 +290,10 @@ static uint32_t set_hartsel(uint32_t initial, uint32_t index)
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return initial;
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}
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static void decode_dmi(char *text, unsigned address, unsigned data)
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static void decode_dmi(char *text, unsigned int address, unsigned int data)
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{
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static const struct {
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unsigned address;
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unsigned int address;
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uint64_t mask;
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const char *name;
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} description[] = {
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@@ -350,10 +350,10 @@ static void decode_dmi(char *text, unsigned address, unsigned data)
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};
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text[0] = 0;
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for (unsigned i = 0; i < ARRAY_SIZE(description); i++) {
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for (unsigned int i = 0; i < ARRAY_SIZE(description); i++) {
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if (description[i].address == address) {
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uint64_t mask = description[i].mask;
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unsigned value = get_field(data, mask);
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unsigned int value = get_field(data, mask);
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if (value) {
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if (i > 0)
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*(text++) = ' ';
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@@ -468,7 +468,7 @@ static dmi_status_t dmi_scan(struct target *target, uint32_t *address_in,
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{
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riscv013_info_t *info = get_info(target);
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RISCV_INFO(r);
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unsigned num_bits = info->abits + DTM_DMI_OP_LENGTH + DTM_DMI_DATA_LENGTH;
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unsigned int num_bits = info->abits + DTM_DMI_OP_LENGTH + DTM_DMI_DATA_LENGTH;
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size_t num_bytes = (num_bits + 7) / 8;
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uint8_t in[num_bytes];
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uint8_t out[num_bytes];
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@@ -680,7 +680,7 @@ static int dmi_write_exec(struct target *target, uint32_t address,
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}
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static int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
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bool authenticated, unsigned timeout_sec)
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bool authenticated, unsigned int timeout_sec)
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{
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int result = dmi_op_timeout(target, dmstatus, NULL, DMI_OP_READ,
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DM_DMSTATUS, 0, timeout_sec, false, true);
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@@ -717,7 +717,7 @@ static void increase_ac_busy_delay(struct target *target)
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info->ac_busy_delay);
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}
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static uint32_t __attribute__((unused)) abstract_register_size(unsigned width)
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static uint32_t __attribute__((unused)) abstract_register_size(unsigned int width)
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{
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switch (width) {
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case 32:
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@@ -807,12 +807,12 @@ static int execute_abstract_command(struct target *target, uint32_t command)
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return ERROR_OK;
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}
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static riscv_reg_t read_abstract_arg(struct target *target, unsigned index,
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unsigned size_bits)
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static riscv_reg_t read_abstract_arg(struct target *target, unsigned int index,
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unsigned int size_bits)
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{
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riscv_reg_t value = 0;
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uint32_t v;
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unsigned offset = index * size_bits / 32;
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unsigned int offset = index * size_bits / 32;
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switch (size_bits) {
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default:
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LOG_ERROR("Unsupported size: %d bits", size_bits);
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@@ -828,10 +828,10 @@ static riscv_reg_t read_abstract_arg(struct target *target, unsigned index,
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return value;
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}
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static int write_abstract_arg(struct target *target, unsigned index,
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riscv_reg_t value, unsigned size_bits)
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static int write_abstract_arg(struct target *target, unsigned int index,
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riscv_reg_t value, unsigned int size_bits)
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{
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unsigned offset = index * size_bits / 32;
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unsigned int offset = index * size_bits / 32;
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switch (size_bits) {
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default:
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LOG_ERROR("Unsupported size: %d bits", size_bits);
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@@ -849,7 +849,7 @@ static int write_abstract_arg(struct target *target, unsigned index,
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* @par size in bits
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*/
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static uint32_t access_register_command(struct target *target, uint32_t number,
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unsigned size, uint32_t flags)
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unsigned int size, uint32_t flags)
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{
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uint32_t command = set_field(0, DM_COMMAND_CMDTYPE, 0);
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switch (size) {
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@@ -891,7 +891,7 @@ static uint32_t access_register_command(struct target *target, uint32_t number,
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}
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static int register_read_abstract(struct target *target, uint64_t *value,
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uint32_t number, unsigned size)
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uint32_t number, unsigned int size)
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{
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RISCV013_INFO(info);
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@@ -929,7 +929,7 @@ static int register_read_abstract(struct target *target, uint64_t *value,
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}
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static int register_write_abstract(struct target *target, uint32_t number,
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uint64_t value, unsigned size)
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uint64_t value, unsigned int size)
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{
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RISCV013_INFO(info);
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@@ -968,7 +968,7 @@ static int register_write_abstract(struct target *target, uint32_t number,
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* Sets the AAMSIZE field of a memory access abstract command based on
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* the width (bits).
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*/
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static uint32_t abstract_memory_size(unsigned width)
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static uint32_t abstract_memory_size(unsigned int width)
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{
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switch (width) {
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case 8:
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@@ -991,7 +991,7 @@ static uint32_t abstract_memory_size(unsigned width)
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* Creates a memory access abstract command.
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*/
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static uint32_t access_memory_command(struct target *target, bool virtual,
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unsigned width, bool postincrement, bool write)
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unsigned int width, bool postincrement, bool write)
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{
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uint32_t command = set_field(0, AC_ACCESS_MEMORY_CMDTYPE, 2);
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command = set_field(command, AC_ACCESS_MEMORY_AAMVIRTUAL, virtual);
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@@ -1134,7 +1134,7 @@ typedef struct {
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static int scratch_reserve(struct target *target,
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scratch_mem_t *scratch,
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struct riscv_program *program,
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unsigned size_bytes)
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unsigned int size_bytes)
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{
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riscv_addr_t alignment = 1;
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while (alignment < size_bytes)
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@@ -1166,7 +1166,7 @@ static int scratch_reserve(struct target *target,
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return ERROR_FAIL;
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/* Allow for ebreak at the end of the program. */
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unsigned program_size = (program->instruction_count + 1) * 4;
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unsigned int program_size = (program->instruction_count + 1) * 4;
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scratch->hart_address = (info->progbuf_address + program_size + alignment - 1) &
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~(alignment - 1);
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if ((info->progbuf_writable == YNM_YES) &&
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@@ -1271,7 +1271,7 @@ static int scratch_write64(struct target *target, scratch_mem_t *scratch,
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}
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/** Return register size in bits. */
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static unsigned register_size(struct target *target, unsigned number)
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static unsigned int register_size(struct target *target, unsigned int number)
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{
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/* If reg_cache hasn't been initialized yet, make a guess. We need this for
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* when this function is called during examine(). */
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@@ -1281,7 +1281,7 @@ static unsigned register_size(struct target *target, unsigned number)
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return riscv_xlen(target);
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}
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static bool has_sufficient_progbuf(struct target *target, unsigned size)
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static bool has_sufficient_progbuf(struct target *target, unsigned int size)
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{
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RISCV013_INFO(info);
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RISCV_INFO(r);
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@@ -1293,7 +1293,7 @@ static bool has_sufficient_progbuf(struct target *target, unsigned size)
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* Immediately write the new value to the requested register. This mechanism
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* bypasses any caches.
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*/
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static int register_write_direct(struct target *target, unsigned number,
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static int register_write_direct(struct target *target, unsigned int number,
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uint64_t value)
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{
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LOG_DEBUG("{%d} %s <- 0x%" PRIx64, riscv_current_hartid(target),
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@@ -1834,7 +1834,7 @@ static int riscv013_hart_count(struct target *target)
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}
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/* Try to find out the widest memory access size depending on the selected memory access methods. */
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static unsigned riscv013_data_bits(struct target *target)
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static unsigned int riscv013_data_bits(struct target *target)
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{
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RISCV013_INFO(info);
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RISCV_INFO(r);
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@@ -1904,12 +1904,12 @@ static COMMAND_HELPER(riscv013_print_info, struct target *target)
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}
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static int prep_for_vector_access(struct target *target, uint64_t *vtype,
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uint64_t *vl, unsigned *debug_vl)
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uint64_t *vl, unsigned int *debug_vl)
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{
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RISCV_INFO(r);
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/* TODO: this continuous save/restore is terrible for performance. */
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/* Write vtype and vl. */
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unsigned encoded_vsew;
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unsigned int encoded_vsew;
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switch (riscv_xlen(target)) {
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case 32:
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encoded_vsew = 2;
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@@ -1965,12 +1965,12 @@ static int riscv013_get_register_buf(struct target *target,
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return ERROR_FAIL;
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uint64_t vtype, vl;
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unsigned debug_vl;
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unsigned int debug_vl;
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if (prep_for_vector_access(target, &vtype, &vl, &debug_vl) != ERROR_OK)
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return ERROR_FAIL;
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unsigned vnum = regno - GDB_REGNO_V0;
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unsigned xlen = riscv_xlen(target);
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unsigned int vnum = regno - GDB_REGNO_V0;
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unsigned int xlen = riscv_xlen(target);
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struct riscv_program program;
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riscv_program_init(&program, target);
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@@ -1978,7 +1978,7 @@ static int riscv013_get_register_buf(struct target *target,
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riscv_program_insert(&program, vslide1down_vx(vnum, vnum, S0, true));
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int result = ERROR_OK;
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for (unsigned i = 0; i < debug_vl; i++) {
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for (unsigned int i = 0; i < debug_vl; i++) {
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/* Executing the program might result in an exception if there is some
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* issue with the vector implementation/instructions we're using. If that
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* happens, attempt to restore as usual. We may have clobbered the
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@@ -2024,18 +2024,18 @@ static int riscv013_set_register_buf(struct target *target,
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return ERROR_FAIL;
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uint64_t vtype, vl;
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unsigned debug_vl;
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unsigned int debug_vl;
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if (prep_for_vector_access(target, &vtype, &vl, &debug_vl) != ERROR_OK)
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return ERROR_FAIL;
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unsigned vnum = regno - GDB_REGNO_V0;
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unsigned xlen = riscv_xlen(target);
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unsigned int vnum = regno - GDB_REGNO_V0;
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unsigned int xlen = riscv_xlen(target);
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struct riscv_program program;
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riscv_program_init(&program, target);
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riscv_program_insert(&program, vslide1down_vx(vnum, vnum, S0, true));
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int result = ERROR_OK;
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for (unsigned i = 0; i < debug_vl; i++) {
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for (unsigned int i = 0; i < debug_vl; i++) {
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if (register_write_direct(target, GDB_REGNO_S0,
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buf_get_u64(value, xlen * i, xlen)) != ERROR_OK)
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return ERROR_FAIL;
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@@ -2476,7 +2476,7 @@ static int execute_fence(struct target *target)
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}
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static void log_memory_access(target_addr_t address, uint64_t value,
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unsigned size_bytes, bool read)
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unsigned int size_bytes, bool read)
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{
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if (debug_level < LOG_LVL_DEBUG)
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return;
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@@ -2524,7 +2524,7 @@ static int read_memory_bus_word(struct target *target, target_addr_t address,
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static target_addr_t sb_read_address(struct target *target)
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{
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RISCV013_INFO(info);
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unsigned sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE);
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unsigned int sbasize = get_field(info->sbcs, DM_SBCS_SBASIZE);
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target_addr_t address = 0;
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uint32_t v;
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if (sbasize > 32) {
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@@ -2717,7 +2717,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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for (uint32_t i = (next_address - address) / size; i < count - 1; i++) {
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for (int j = (size - 1) / 4; j >= 0; j--) {
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uint32_t value;
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unsigned attempt = 0;
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unsigned int attempt = 0;
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while (1) {
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if (attempt++ > 100) {
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LOG_ERROR("DMI keeps being busy in while reading memory just past " TARGET_ADDR_FMT,
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@@ -2745,7 +2745,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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uint32_t sbcs_read = 0;
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if (count > 1) {
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uint32_t value;
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unsigned attempt = 0;
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unsigned int attempt = 0;
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while (1) {
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if (attempt++ > 100) {
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LOG_ERROR("DMI keeps being busy in while reading memory just past " TARGET_ADDR_FMT,
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@@ -2793,7 +2793,7 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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continue;
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}
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unsigned error = get_field(sbcs_read, DM_SBCS_SBERROR);
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unsigned int error = get_field(sbcs_read, DM_SBCS_SBERROR);
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if (error == 0) {
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next_address = end_address;
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} else {
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@@ -2959,7 +2959,7 @@ static int read_memory_abstract(struct target *target, target_addr_t address,
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memset(buffer, 0, count * size);
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/* Convert the size (bytes) to width (bits) */
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unsigned width = size << 3;
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unsigned int width = size << 3;
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/* Create the command (physical address, postincrement, read) */
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uint32_t command = access_memory_command(target, false, width, use_aampostincrement, false);
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@@ -3035,7 +3035,7 @@ static int write_memory_abstract(struct target *target, target_addr_t address,
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size, address);
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/* Convert the size (bytes) to width (bits) */
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unsigned width = size << 3;
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unsigned int width = size << 3;
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/* Create the command (physical address, postincrement, write) */
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uint32_t command = access_memory_command(target, false, width, use_aampostincrement, true);
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@@ -3145,7 +3145,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
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/* read_addr is the next address that the hart will read from, which is the
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* value in s0. */
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unsigned index = 2;
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unsigned int index = 2;
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while (index < count) {
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riscv_addr_t read_addr = address + index * increment;
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LOG_DEBUG("i=%d, count=%d, read_addr=0x%" PRIx64, index, count, read_addr);
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@@ -3162,8 +3162,8 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
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if (!batch)
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return ERROR_FAIL;
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unsigned reads = 0;
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for (unsigned j = index; j < count; j++) {
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unsigned int reads = 0;
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for (unsigned int j = index; j < count; j++) {
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if (size > 4)
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riscv_batch_add_dmi_read(batch, DM_DATA1);
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riscv_batch_add_dmi_read(batch, DM_DATA0);
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@@ -3186,8 +3186,8 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
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return ERROR_FAIL;
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info->cmderr = get_field(abstractcs, DM_ABSTRACTCS_CMDERR);
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unsigned next_index;
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unsigned ignore_last = 0;
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unsigned int next_index;
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unsigned int ignore_last = 0;
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switch (info->cmderr) {
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case CMDERR_NONE:
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LOG_DEBUG("successful (partial?) memory read");
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@@ -3256,9 +3256,9 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres
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/* Now read whatever we got out of the batch. */
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dmi_status_t status = DMI_STATUS_SUCCESS;
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unsigned read = 0;
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unsigned int read = 0;
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assert(index >= 2);
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for (unsigned j = index - 2; j < index + reads; j++) {
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for (unsigned int j = index - 2; j < index + reads; j++) {
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assert(j < count);
|
||||
LOG_DEBUG("index=%d, reads=%d, next_index=%d, ignore_last=%d, j=%d",
|
||||
index, reads, next_index, ignore_last, j);
|
||||
@@ -3867,9 +3867,9 @@ static int write_memory_progbuf(struct target *target, target_addr_t address,
|
||||
goto error;
|
||||
|
||||
/* To write another word, we put it in S1 and execute the program. */
|
||||
unsigned start = (cur_addr - address) / size;
|
||||
for (unsigned i = start; i < count; ++i) {
|
||||
unsigned offset = size*i;
|
||||
unsigned int start = (cur_addr - address) / size;
|
||||
for (unsigned int i = start; i < count; ++i) {
|
||||
unsigned int offset = size * i;
|
||||
const uint8_t *t_buffer = buffer + offset;
|
||||
|
||||
uint64_t value = buf_get_u64(t_buffer, 0, 8 * size);
|
||||
@@ -4160,18 +4160,18 @@ static int select_prepped_harts(struct target *target, bool *use_hasel)
|
||||
}
|
||||
|
||||
assert(dm->hart_count);
|
||||
unsigned hawindow_count = (dm->hart_count + 31) / 32;
|
||||
unsigned int hawindow_count = (dm->hart_count + 31) / 32;
|
||||
uint32_t hawindow[hawindow_count];
|
||||
|
||||
memset(hawindow, 0, sizeof(uint32_t) * hawindow_count);
|
||||
|
||||
target_list_t *entry;
|
||||
unsigned total_selected = 0;
|
||||
unsigned int total_selected = 0;
|
||||
list_for_each_entry(entry, &dm->target_list, list) {
|
||||
struct target *t = entry->target;
|
||||
struct riscv_info *r = riscv_info(t);
|
||||
riscv013_info_t *info = get_info(t);
|
||||
unsigned index = info->index;
|
||||
unsigned int index = info->index;
|
||||
LOG_DEBUG("index=%d, coreid=%d, prepped=%d", index, t->coreid, r->prepped);
|
||||
r->selected = r->prepped;
|
||||
if (r->prepped) {
|
||||
@@ -4188,7 +4188,7 @@ static int select_prepped_harts(struct target *target, bool *use_hasel)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
for (unsigned i = 0; i < hawindow_count; i++) {
|
||||
for (unsigned int i = 0; i < hawindow_count; i++) {
|
||||
if (dmi_write(target, DM_HAWINDOWSEL, i) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (dmi_write(target, DM_HAWINDOW, hawindow[i]) != ERROR_OK)
|
||||
@@ -4346,7 +4346,7 @@ static enum riscv_halt_reason riscv013_halt_reason(struct target *target)
|
||||
return RISCV_HALT_UNKNOWN;
|
||||
}
|
||||
|
||||
int riscv013_write_debug_buffer(struct target *target, unsigned index, riscv_insn_t data)
|
||||
int riscv013_write_debug_buffer(struct target *target, unsigned int index, riscv_insn_t data)
|
||||
{
|
||||
dm013_info_t *dm = get_dm(target);
|
||||
if (!dm)
|
||||
@@ -4361,7 +4361,7 @@ int riscv013_write_debug_buffer(struct target *target, unsigned index, riscv_ins
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned index)
|
||||
riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned int index)
|
||||
{
|
||||
uint32_t value;
|
||||
dmi_read(target, &value, DM_PROGBUF0 + index);
|
||||
|
||||
Reference in New Issue
Block a user