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target: use proper format with uint32_t

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Modify the format strings to properly handle uint32_t data types.

While there, fix prototype mismatch between header and C file of
the function armv7a_l1_d_cache_inval_virt().

Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5818
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2020-08-18 18:56:27 +02:00
parent e66593f824
commit 99add6227f
30 changed files with 121 additions and 121 deletions
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6
src/target/aarch64.c
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@@ -105,7 +105,7 @@ static int aarch64_restore_system_control_reg(struct target *target)
break;
default:
LOG_ERROR("cannot read system control register in this mode: (%s : 0x%" PRIx32 ")",
LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)",
armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode);
return ERROR_FAIL;
}
@@ -180,7 +180,7 @@ static int aarch64_mmu_modify(struct target *target, int enable)
break;
default:
LOG_DEBUG("unknown cpu state 0x%" PRIx32, armv8->arm.core_mode);
LOG_DEBUG("unknown cpu state 0x%x", armv8->arm.core_mode);
break;
}
@@ -1042,7 +1042,7 @@ static int aarch64_post_debug_entry(struct target *target)
break;
default:
LOG_ERROR("cannot read system control register in this mode: (%s : 0x%" PRIx32 ")",
LOG_ERROR("cannot read system control register in this mode: (%s : 0x%x)",
armv8_mode_name(armv8->arm.core_mode), armv8->arm.core_mode);
return ERROR_FAIL;
}