Merge branch 'master' into from_upstream

Change-Id: I036350ee06aa396344fb8a80c7dba148ec24c9c8

contrib/loaders/flash/stm32/stm32h7x.S

@@ -48,8 +48,8 @@
 #define STM32_FLASH_CR_OFFSET	0x0C	/* offset of CR register in FLASH struct */
 #define STM32_FLASH_SR_OFFSET	0x10	/* offset of SR register in FLASH struct */
 #define STM32_CR_PROG			0x00000032	/* PSIZE64 | PG */
-#define STM32_SR_BUSY_MASK		0x00000001	/* BSY */
-#define STM32_SR_ERROR_MASK		0x03ee0000	/* DBECCERR | SNECCERR | RDSERR | RDPERR | OPERR
+#define STM32_SR_QW_MASK		0x00000004	/* QW */
+#define STM32_SR_ERROR_MASK		0x07ee0000	/* DBECCERR | SNECCERR | RDSERR | RDPERR | OPERR
 											   | INCERR | STRBERR | PGSERR | WRPERR */
 
 	.thumb_func
@@ -73,6 +73,7 @@ wait_fifo:
 
 	mov		r7, #8				/* program by 8 words = 32 bytes */
 write_flash:
+	dsb
 	ldr		r6, [r5], #0x04		/* read one word from src, increment ptr */
 	str		r6, [r2], #0x04		/* write one word to dst, increment ptr */
 	dsb
@@ -84,7 +85,7 @@ write_flash:
 
 busy:
 	ldr		r6, [r4, #STM32_FLASH_SR_OFFSET]
-	tst		r6, #STM32_SR_BUSY_MASK
+	tst		r6, #STM32_SR_QW_MASK
 	bne		busy				/* operation in progress, wait ... */
 
 	ldr		r7, =STM32_SR_ERROR_MASK

contrib/loaders/flash/stm32/stm32h7x.inc

@@ -1,7 +1,7 @@
 /* Autogenerated with ../../../../src/helper/bin2char.sh */
-0x45,0x68,0x06,0x68,0x26,0xb3,0x76,0x1b,0x42,0xbf,0x76,0x18,0x36,0x1a,0x08,0x3e,
-0x20,0x2e,0xf6,0xd3,0x4f,0xf0,0x32,0x06,0xe6,0x60,0x4f,0xf0,0x08,0x07,0x55,0xf8,
-0x04,0x6b,0x42,0xf8,0x04,0x6b,0xbf,0xf3,0x4f,0x8f,0x8d,0x42,0x28,0xbf,0x00,0xf1,
-0x08,0x05,0x01,0x3f,0xf3,0xd1,0x26,0x69,0x16,0xf0,0x01,0x0f,0xfb,0xd1,0x05,0x4f,
-0x3e,0x42,0x03,0xd1,0x45,0x60,0x01,0x3b,0xdb,0xd1,0x01,0xe0,0x00,0x27,0x47,0x60,
-0x30,0x46,0x00,0xbe,0x00,0x00,0xee,0x03,
+0x45,0x68,0x06,0x68,0x36,0xb3,0x76,0x1b,0x42,0xbf,0x76,0x18,0x36,0x1a,0x08,0x3e,
+0x20,0x2e,0xf6,0xd3,0x4f,0xf0,0x32,0x06,0xe6,0x60,0x4f,0xf0,0x08,0x07,0xbf,0xf3,
+0x4f,0x8f,0x55,0xf8,0x04,0x6b,0x42,0xf8,0x04,0x6b,0xbf,0xf3,0x4f,0x8f,0x8d,0x42,
+0x28,0xbf,0x00,0xf1,0x08,0x05,0x01,0x3f,0xf1,0xd1,0x26,0x69,0x16,0xf0,0x04,0x0f,
+0xfb,0xd1,0x05,0x4f,0x3e,0x42,0x03,0xd1,0x45,0x60,0x01,0x3b,0xd9,0xd1,0x01,0xe0,
+0x00,0x27,0x47,0x60,0x30,0x46,0x00,0xbe,0x00,0x00,0xee,0x07,

contrib/rpc_examples/ocd_rpc_example.py

@@ -85,16 +85,17 @@ class OpenOcd:
         return data
 
     def readVariable(self, address):
-        raw = self.send("ocd_mdw 0x%x" % address).split(": ")
+        raw = self.send("mdw 0x%x" % address).split(": ")
         return None if (len(raw) < 2) else strToHex(raw[1])
 
     def readMemory(self, wordLen, address, n):
         self.send("array unset output") # better to clear the array before
         self.send("mem2array output %d 0x%x %d" % (wordLen, address, n))
 
-        output = self.send("ocd_echo $output").split(" ")
+        output = [*map(int, self.send("return $output").split(" "))]
+        d = dict([tuple(output[i:i + 2]) for i in range(0, len(output), 2)])
 
-        return [int(output[2*i+1]) for i in range(len(output)//2)]
+        return [d[k] for k in sorted(d.keys())]
 
     def writeVariable(self, address, value):
         assert value is not None
@@ -115,8 +116,8 @@ if __name__ == "__main__":
     with OpenOcd() as ocd:
         ocd.send("reset")
 
-        show(ocd.send("ocd_echo \"echo says hi!\"")[:-1])
-        show(ocd.send("capture \"ocd_halt\"")[:-1])
+        show(ocd.send("capture { echo \"echo says hi!\" }")[:-1])
+        show(ocd.send("capture \"halt\"")[:-1])
 
         # Read the first few words at the RAM region (put starting adress of RAM
         # region into 'addr')

contrib/rpc_examples/ocdrpc.hs

@@ -39,7 +39,7 @@ mdwParser = (manyTill anyChar (string ": ") *>
 
 ocdMdw :: (InputStream ByteString, OutputStream ByteString) -> Integer -> Integer -> IO [Integer]
 ocdMdw s start count = do
-  s <- ocdExec s $ "ocd_mdw " ++ show start ++ " " ++ show count
+  s <- ocdExec s $ "mdw " ++ show start ++ " " ++ show count
   case parseOnly mdwParser (pack s) of
     Right r -> return $ concat r