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Merge branch 'master' into from_upstream

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Change-Id: I036350ee06aa396344fb8a80c7dba148ec24c9c8
This commit is contained in:
Tim Newsome
2019-09-27 12:07:00 -07:00
parent bbdc28e0f5 3110092720
commit 9aac179cf2
194 changed files with 3445 additions and 4571 deletions
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src/flash/Makefile.am
+1 -2
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@@ -1,7 +1,6 @@
noinst_LTLIBRARIES += %D%/libflash.la
%C%_libflash_la_SOURCES = \
%D%/common.c %D%/common.h \
%D%/mflash.c %D%/mflash.h
%D%/common.c %D%/common.h
%C%_libflash_la_LIBADD = \
%D%/nor/libocdflashnor.la \
src/flash/mflash.c
-1449
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File diff suppressed because it is too large Load Diff
src/flash/mflash.h
-289
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@@ -1,289 +0,0 @@
/***************************************************************************
* Copyright (C) 2007-2008 by unsik Kim <donari75@gmail.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_FLASH_MFLASH_H
#define OPENOCD_FLASH_MFLASH_H
struct command_context;
typedef unsigned long mg_io_uint32;
typedef unsigned short mg_io_uint16;
typedef unsigned char mg_io_uint8;
struct mflash_gpio_num {
char port[2];
signed short num;
};
struct mflash_gpio_drv {
const char *name;
int (*set_gpio_to_output)(struct mflash_gpio_num gpio);
int (*set_gpio_output_val)(struct mflash_gpio_num gpio, uint8_t val);
};
typedef struct _mg_io_type_drv_info {
mg_io_uint16 general_configuration; /* 00 */
mg_io_uint16 number_of_cylinders; /* 01 */
mg_io_uint16 reserved1; /* 02 */
mg_io_uint16 number_of_heads; /* 03 */
mg_io_uint16 unformatted_bytes_per_track; /* 04 */
mg_io_uint16 unformatted_bytes_per_sector; /* 05 */
mg_io_uint16 sectors_per_track; /* 06 */
mg_io_uint16 vendor_unique1[3]; /* 07/08/09 */
mg_io_uint8 serial_number[20]; /* 10~19 */
mg_io_uint16 buffer_type; /* 20 */
mg_io_uint16 buffer_sector_size; /* 21 */
mg_io_uint16 number_of_ecc_bytes; /* 22 */
mg_io_uint8 firmware_revision[8]; /* 23~26 */
mg_io_uint8 model_number[40]; /* 27 */
mg_io_uint8 maximum_block_transfer; /* 47 low byte */
mg_io_uint8 vendor_unique2; /* 47 high byte */
mg_io_uint16 dword_io; /* 48 */
mg_io_uint16 capabilities; /* 49 */
mg_io_uint16 reserved2; /* 50 */
mg_io_uint8 vendor_unique3; /* 51 low byte */
mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */
mg_io_uint8 vendor_unique4; /* 52 low byte */
mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */
mg_io_uint16 translation_fields_valid; /* 53 (low bit) */
mg_io_uint16 number_of_current_cylinders; /* 54 */
mg_io_uint16 number_of_current_heads; /* 55 */
mg_io_uint16 current_sectors_per_track; /* 56 */
mg_io_uint16 current_sector_capacity_lo; /* 57 & 58 */
mg_io_uint16 current_sector_capacity_hi; /* 57 & 58 */
mg_io_uint8 multi_sector_count; /* 59 low */
mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */
mg_io_uint16 total_user_addressable_sectors_lo; /* 60 & 61 */
mg_io_uint16 total_user_addressable_sectors_hi; /* 60 & 61 */
mg_io_uint8 single_dma_modes_supported; /* 62 low byte */
mg_io_uint8 single_dma_transfer_active; /* 62 high byte */
mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */
mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */
mg_io_uint16 adv_pio_mode;
mg_io_uint16 min_dma_cyc;
mg_io_uint16 recommend_dma_cyc;
mg_io_uint16 min_pio_cyc_no_iordy;
mg_io_uint16 min_pio_cyc_with_iordy;
mg_io_uint8 reserved3[22];
mg_io_uint16 major_ver_num;
mg_io_uint16 minor_ver_num;
mg_io_uint16 feature_cmd_set_suprt0;
mg_io_uint16 feature_cmd_set_suprt1;
mg_io_uint16 feature_cmd_set_suprt2;
mg_io_uint16 feature_cmd_set_en0;
mg_io_uint16 feature_cmd_set_en1;
mg_io_uint16 feature_cmd_set_en2;
mg_io_uint16 reserved4;
mg_io_uint16 req_time_for_security_er_done;
mg_io_uint16 req_time_for_enhan_security_er_done;
mg_io_uint16 adv_pwr_mgm_lvl_val;
mg_io_uint16 reserved5;
mg_io_uint16 re_of_hw_rst;
mg_io_uint8 reserved6[68];
mg_io_uint16 security_stas;
mg_io_uint8 vendor_uniq_bytes[62];
mg_io_uint16 cfa_pwr_mode;
mg_io_uint8 reserved7[186];
mg_io_uint16 scts_per_secure_data_unit;
mg_io_uint16 integrity_word;
} mg_io_type_drv_info;
typedef struct _mg_pll_t {
unsigned int lock_cyc;
unsigned short feedback_div; /* 9bit divider */
unsigned char input_div; /* 5bit divider */
unsigned char output_div; /* 2bit divider */
} mg_pll_t;
struct mg_drv_info {
mg_io_type_drv_info drv_id;
uint32_t tot_sects;
};
struct mflash_bank {
uint32_t base;
struct mflash_gpio_num rst_pin;
struct mflash_gpio_drv *gpio_drv;
struct target *target;
struct mg_drv_info *drv_info;
};
int mflash_register_commands(struct command_context *cmd_ctx);
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
#define MG_BUFFER_OFFSET 0x8000
#define MG_REG_OFFSET 0xC000
#define MG_REG_FEATURE 0x2 /* write case */
#define MG_REG_ERROR 0x2 /* read case */
#define MG_REG_SECT_CNT 0x4
#define MG_REG_SECT_NUM 0x6
#define MG_REG_CYL_LOW 0x8
#define MG_REG_CYL_HIGH 0xA
#define MG_REG_DRV_HEAD 0xC
#define MG_REG_COMMAND 0xE /* write case */
#define MG_REG_STATUS 0xE /* read case */
#define MG_REG_DRV_CTRL 0x10
#define MG_REG_BURST_CTRL 0x12
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */
#define MG_PLL_CLK_OUT 66000000.0 /* 66Mhz */
#define MG_PLL_MAX_FEEDBACKDIV_VAL 512
#define MG_PLL_MAX_INPUTDIV_VAL 32
#define MG_PLL_MAX_OUTPUTDIV_VAL 4
#define MG_PLL_STD_INPUTCLK 12000000.0 /* 12Mhz */
#define MG_PLL_STD_LOCKCYCLE 10000
#define MG_UNLOCK_OTP_AREA 0xFF
#define MG_FILEIO_CHUNK 1048576
#define ERROR_MG_IO (-1600)
#define ERROR_MG_TIMEOUT (-1601)
#define ERROR_MG_INVALID_PLL (-1603)
#define ERROR_MG_INTERFACE (-1604)
#define ERROR_MG_INVALID_OSC (-1605)
#define ERROR_MG_UNSUPPORTED_SOC (-1606)
typedef enum _mg_io_type_wait {
mg_io_wait_bsy = 1,
mg_io_wait_not_bsy = 2,
mg_io_wait_rdy = 3,
mg_io_wait_drq = 4, /* wait for data request */
mg_io_wait_drq_noerr = 5, /* wait for DRQ but ignore the error status bit */
mg_io_wait_rdy_noerr = 6 /* wait for ready, but ignore error status bit */
} mg_io_type_wait;
/*= "Status Register" bit masks. */
typedef enum _mg_io_type_rbit_status {
mg_io_rbit_status_error = 0x01, /* error bit in status register */
mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */
mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */
mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */
mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */
mg_io_rbit_status_ready = 0x40,
mg_io_rbit_status_busy = 0x80
} mg_io_type_rbit_status;
/*= "Error Register" bit masks. */
typedef enum _mg_io_type_rbit_error {
mg_io_rbit_err_general = 0x01,
mg_io_rbit_err_aborted = 0x04,
mg_io_rbit_err_bad_sect_num = 0x10,
mg_io_rbit_err_uncorrectable = 0x40,
mg_io_rbit_err_bad_block = 0x80
} mg_io_type_rbit_error;
/* = "Device Control Register" bit. */
typedef enum _mg_io_type_rbit_devc {
mg_io_rbit_devc_intr = 0x02, /* interrupt enable bit (1:disable, 0:enable) */
mg_io_rbit_devc_srst = 0x04 /* softwrae reset bit (1:assert, 0:de-assert) */
} mg_io_type_rbit_devc;
/* "Drive Select/Head Register" values. */
typedef enum _mg_io_type_rval_dev {
mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on)
} mg_io_type_rval_dev;
typedef enum _mg_io_type_cmd {
mg_io_cmd_read = 0x20,
mg_io_cmd_write = 0x30,
mg_io_cmd_setmul = 0xC6,
mg_io_cmd_readmul = 0xC4,
mg_io_cmd_writemul = 0xC5,
mg_io_cmd_idle = 0x97, /* 0xE3 */
mg_io_cmd_idle_immediate = 0x95, /* 0xE1 */
mg_io_cmd_setsleep = 0x99, /* 0xE6 */
mg_io_cmd_stdby = 0x96, /* 0xE2 */
mg_io_cmd_stdby_immediate = 0x94, /* 0xE0 */
mg_io_cmd_identify = 0xEC,
mg_io_cmd_set_feature = 0xEF,
mg_io_cmd_confirm_write = 0x3C,
mg_io_cmd_confirm_read = 0x40,
mg_io_cmd_wakeup = 0xC3
} mg_io_type_cmd;
typedef enum _mg_feature_id {
mg_feature_id_transmode = 0x3
} mg_feature_id;
typedef enum _mg_feature_val {
mg_feature_val_trans_default = 0x0,
mg_feature_val_trans_vcmd = 0x3,
mg_feature_val_trand_vcmds = 0x2
} mg_feature_val;
typedef enum _mg_vcmd {
mg_vcmd_update_xipinfo = 0xFA, /* FWPATCH commmand through IOM I/O */
mg_vcmd_verify_fwpatch = 0xFB, /* FWPATCH commmand through IOM I/O */
mg_vcmd_update_stgdrvinfo = 0xFC, /* IOM identificatin info program command */
mg_vcmd_prep_fwpatch = 0xFD, /* FWPATCH commmand through IOM I/O */
mg_vcmd_exe_fwpatch = 0xFE, /* FWPATCH commmand through IOM I/O */
mg_vcmd_wr_pll = 0x8B,
mg_vcmd_purge_nand = 0x8C, /* Only for Seagle */
mg_vcmd_lock_otp = 0x8D,
mg_vcmd_rd_otp = 0x8E,
mg_vcmd_wr_otp = 0x8F
} mg_vcmd;
typedef enum _mg_opmode {
mg_op_mode_xip = 1, /* TRUE XIP */
mg_op_mode_snd = 2, /* BOOT + Storage */
mg_op_mode_stg = 0 /* Only Storage */
} mg_opmode;
#endif /* OPENOCD_FLASH_MFLASH_H */
src/flash/nand/at91sam9.c
+5 -5
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@@ -547,14 +547,14 @@ COMMAND_HANDLER(handle_at91sam9_cle_command)
unsigned num, address_line;
if (CMD_ARGC != 2) {
command_print(CMD_CTX, "incorrect number of arguments for 'at91sam9 cle' command");
command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command");
return ERROR_OK;
}
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -582,7 +582,7 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -610,7 +610,7 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -641,7 +641,7 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
nand = get_nand_device_by_num(num);
if (!nand) {
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
src/flash/nand/core.c
+1 -1
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@@ -217,7 +217,7 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index,
COMMAND_PARSE_NUMBER(uint, str, num);
*nand = get_nand_device_by_num(num);
if (!*nand) {
command_print(CMD_CTX, "NAND flash device '%s' not found", str);
command_print(CMD, "NAND flash device '%s' not found", str);
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
src/flash/nand/fileio.c
+7 -7
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@@ -54,12 +54,12 @@ void nand_fileio_init(struct nand_fileio_state *state)
state->oob_format = NAND_OOB_NONE;
}
int nand_fileio_start(struct command_context *cmd_ctx,
int nand_fileio_start(struct command_invocation *cmd,
struct nand_device *nand, const char *filename, int filemode,
struct nand_fileio_state *state)
{
if (state->address % nand->page_size) {
command_print(cmd_ctx, "only page-aligned addresses are supported");
command_print(cmd, "only page-aligned addresses are supported");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -69,7 +69,7 @@ int nand_fileio_start(struct command_context *cmd_ctx,
int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
if (ERROR_OK != retval) {
const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
command_print(cmd_ctx, "failed to open '%s' for %s access",
command_print(cmd, "failed to open '%s' for %s access",
filename, msg);
return retval;
}
@@ -131,7 +131,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
return retval;
if (NULL == nand->device) {
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
return ERROR_NAND_DEVICE_NOT_PROBED;
}
@@ -139,7 +139,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
if (need_size) {
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
if (state->size % nand->page_size) {
command_print(CMD_CTX, "only page-aligned sizes are supported");
command_print(CMD, "only page-aligned sizes are supported");
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
@@ -155,13 +155,13 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw"))
state->oob_format |= NAND_OOB_SW_ECC_KW;
else {
command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]);
command_print(CMD, "unknown option: %s", CMD_ARGV[i]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
}
retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state);
retval = nand_fileio_start(CMD, nand, CMD_ARGV[1], filemode, state);
if (ERROR_OK != retval)
return retval;
src/flash/nand/fileio.h
+1 -1
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@@ -41,7 +41,7 @@ struct nand_fileio_state {
};
void nand_fileio_init(struct nand_fileio_state *state);
int nand_fileio_start(struct command_context *cmd_ctx,
int nand_fileio_start(struct command_invocation *cmd,
struct nand_device *nand, const char *filename, int filemode,
struct nand_fileio_state *state);
int nand_fileio_cleanup(struct nand_fileio_state *state);
src/flash/nand/lpc3180.c
+4 -4
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@@ -237,7 +237,7 @@ static int lpc3180_init(struct nand_device *nand)
/* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled,
*DMA read from SLC, WIDTH = bus_width) */
target_write_u32(target, 0x20020014, 0x3e | (bus_width == 16) ? 1 : 0);
target_write_u32(target, 0x20020014, 0x3e | ((bus_width == 16) ? 1 : 0));
/* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
target_write_u32(target, 0x20020020, 0x03);
@@ -1290,7 +1290,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
struct nand_device *nand = get_nand_device_by_num(num);
if (!nand) {
command_print(CMD_CTX, "nand device '#%s' is out of bounds", CMD_ARGV[0]);
command_print(CMD, "nand device '#%s' is out of bounds", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -1310,10 +1310,10 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
}
if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
command_print(CMD_CTX, "%s controller selected",
command_print(CMD, "%s controller selected",
selected[lpc3180_info->selected_controller]);
else
command_print(CMD_CTX,
command_print(CMD,
lpc3180_info->is_bulk ? "%s controller selected bulk mode is available" :
"%s controller selected bulk mode is not available",
selected[lpc3180_info->selected_controller]);
src/flash/nand/lpc32xx.c
+3 -3
View File
@@ -332,7 +332,7 @@ static int lpc32xx_init(struct nand_device *nand)
WIDTH = bus_width)
*/
retval = target_write_u32(target, 0x20020014,
0x3e | (bus_width == 16) ? 1 : 0);
0x3e | ((bus_width == 16) ? 1 : 0));
if (ERROR_OK != retval) {
LOG_ERROR("could not set SLC_CFG");
return ERROR_NAND_OPERATION_FAILED;
@@ -1760,7 +1760,7 @@ COMMAND_HANDLER(handle_lpc32xx_select_command)
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
struct nand_device *nand = get_nand_device_by_num(num);
if (!nand) {
command_print(CMD_CTX, "nand device '#%s' is out of bounds",
command_print(CMD, "nand device '#%s' is out of bounds",
CMD_ARGV[0]);
return ERROR_OK;
}
@@ -1778,7 +1778,7 @@ COMMAND_HANDLER(handle_lpc32xx_select_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
command_print(CMD_CTX, "%s controller selected",
command_print(CMD, "%s controller selected",
selected[lpc32xx_info->selected_controller]);
return ERROR_OK;
src/flash/nand/mxc.c
+5 -4
View File
@@ -157,7 +157,7 @@ COMMAND_HANDLER(handle_mxc_biswap_command)
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "invalid nand device number or name: %s", CMD_ARGV[0]);
command_print(CMD, "invalid nand device number or name: %s", CMD_ARGV[0]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -169,9 +169,9 @@ COMMAND_HANDLER(handle_mxc_biswap_command)
mxc_nf_info->flags.biswap_enabled = false;
}
if (mxc_nf_info->flags.biswap_enabled)
command_print(CMD_CTX, "BI-swapping enabled on %s", nand->name);
command_print(CMD, "BI-swapping enabled on %s", nand->name);
else
command_print(CMD_CTX, "BI-swapping disabled on %s", nand->name);
command_print(CMD, "BI-swapping disabled on %s", nand->name);
return ERROR_OK;
}
@@ -193,7 +193,8 @@ static const struct command_registration mxc_nand_command_handler[] = {
.name = "mxc",
.mode = COMMAND_ANY,
.help = "MXC NAND flash controller commands",
.chain = mxc_sub_command_handlers
.chain = mxc_sub_command_handlers,
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nand/tcl.c
+26 -25
View File
@@ -37,20 +37,20 @@ COMMAND_HANDLER(handle_nand_list_command)
int i;
if (!nand_devices) {
command_print(CMD_CTX, "no NAND flash devices configured");
command_print(CMD, "no NAND flash devices configured");
return ERROR_OK;
}
for (p = nand_devices, i = 0; p; p = p->next, i++) {
if (p->device)
command_print(CMD_CTX, "#%i: %s (%s) "
command_print(CMD, "#%i: %s (%s) "
"pagesize: %i, buswidth: %i,\n\t"
"blocksize: %i, blocks: %i",
i, p->device->name, p->manufacturer->name,
p->page_size, p->bus_width,
p->erase_size, p->num_blocks);
else
command_print(CMD_CTX, "#%i: not probed", i);
command_print(CMD, "#%i: not probed", i);
}
return ERROR_OK;
@@ -87,7 +87,7 @@ COMMAND_HANDLER(handle_nand_info_command)
return retval;
if (NULL == p->device) {
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -97,7 +97,7 @@ COMMAND_HANDLER(handle_nand_info_command)
if (last >= p->num_blocks)
last = p->num_blocks - 1;
command_print(CMD_CTX,
command_print(CMD,
"#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
i++,
p->device->name,
@@ -123,7 +123,7 @@ COMMAND_HANDLER(handle_nand_info_command)
else
bad_state = " (block condition unknown)";
command_print(CMD_CTX,
command_print(CMD,
"\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
j,
p->blocks[j].offset,
@@ -147,7 +147,7 @@ COMMAND_HANDLER(handle_nand_probe_command)
retval = nand_probe(p);
if (retval == ERROR_OK) {
command_print(CMD_CTX, "NAND flash device '%s (%s)' found",
command_print(CMD, "NAND flash device '%s (%s)' found",
p->device->name, p->manufacturer->name);
}
@@ -189,7 +189,7 @@ COMMAND_HANDLER(handle_nand_erase_command)
retval = nand_erase(p, offset, offset + length - 1);
if (retval == ERROR_OK) {
command_print(CMD_CTX, "erased blocks %lu to %lu "
command_print(CMD, "erased blocks %lu to %lu "
"on NAND flash device #%s '%s'",
offset, offset + length - 1,
CMD_ARGV[0], p->device->name);
@@ -233,7 +233,7 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
retval = nand_build_bbt(p, first, last);
if (retval == ERROR_OK) {
command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
command_print(CMD, "checked NAND flash device for bad blocks, "
"use \"nand info\" command to list blocks");
}
@@ -253,7 +253,7 @@ COMMAND_HANDLER(handle_nand_write_command)
while (s.size > 0) {
int bytes_read = nand_fileio_read(nand, &s);
if (bytes_read <= 0) {
command_print(CMD_CTX, "error while reading file");
command_print(CMD, "error while reading file");
nand_fileio_cleanup(&s);
return ERROR_FAIL;
}
@@ -262,7 +262,7 @@ COMMAND_HANDLER(handle_nand_write_command)
retval = nand_write_page(nand, s.address / nand->page_size,
s.page, s.page_size, s.oob, s.oob_size);
if (ERROR_OK != retval) {
command_print(CMD_CTX, "failed writing file %s "
command_print(CMD, "failed writing file %s "
"to NAND flash %s at offset 0x%8.8" PRIx32,
CMD_ARGV[1], CMD_ARGV[0], s.address);
nand_fileio_cleanup(&s);
@@ -272,7 +272,7 @@ COMMAND_HANDLER(handle_nand_write_command)
}
if (nand_fileio_finish(&s) == ERROR_OK) {
command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
command_print(CMD, "wrote file %s to NAND flash %s up to "
"offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
duration_kbps(&s.bench, total_bytes));
@@ -294,7 +294,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
dev.address = file.address;
dev.size = file.size;
dev.oob_format = file.oob_format;
retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev);
retval = nand_fileio_start(CMD, nand, NULL, FILEIO_NONE, &dev);
if (ERROR_OK != retval)
return retval;
@@ -302,7 +302,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
retval = nand_read_page(nand, dev.address / dev.page_size,
dev.page, dev.page_size, dev.oob, dev.oob_size);
if (ERROR_OK != retval) {
command_print(CMD_CTX, "reading NAND flash page failed");
command_print(CMD, "reading NAND flash page failed");
nand_fileio_cleanup(&dev);
nand_fileio_cleanup(&file);
return retval;
@@ -310,7 +310,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
int bytes_read = nand_fileio_read(nand, &file);
if (bytes_read <= 0) {
command_print(CMD_CTX, "error while reading file");
command_print(CMD, "error while reading file");
nand_fileio_cleanup(&dev);
nand_fileio_cleanup(&file);
return ERROR_FAIL;
@@ -318,7 +318,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
(dev.oob && memcmp(dev.oob, file.oob, dev.oob_size))) {
command_print(CMD_CTX, "NAND flash contents differ "
command_print(CMD, "NAND flash contents differ "
"at 0x%8.8" PRIx32, dev.address);
nand_fileio_cleanup(&dev);
nand_fileio_cleanup(&file);
@@ -330,7 +330,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
}
if (nand_fileio_finish(&file) == ERROR_OK) {
command_print(CMD_CTX, "verified file %s in NAND flash %s "
command_print(CMD, "verified file %s in NAND flash %s "
"up to offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
duration_kbps(&file.bench, dev.size));
@@ -354,7 +354,7 @@ COMMAND_HANDLER(handle_nand_dump_command)
retval = nand_read_page(nand, s.address / nand->page_size,
s.page, s.page_size, s.oob, s.oob_size);
if (ERROR_OK != retval) {
command_print(CMD_CTX, "reading NAND flash page failed");
command_print(CMD, "reading NAND flash page failed");
nand_fileio_cleanup(&s);
return retval;
}
@@ -374,7 +374,7 @@ COMMAND_HANDLER(handle_nand_dump_command)
return retval;
if (nand_fileio_finish(&s) == ERROR_OK) {
command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f KiB/s)",
command_print(CMD, "dumped %zu bytes in %fs (%0.3f KiB/s)",
filesize, duration_elapsed(&s.bench),
duration_kbps(&s.bench, filesize));
}
@@ -392,7 +392,7 @@ COMMAND_HANDLER(handle_nand_raw_access_command)
return retval;
if (NULL == p->device) {
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -400,7 +400,7 @@ COMMAND_HANDLER(handle_nand_raw_access_command)
COMMAND_PARSE_ENABLE(CMD_ARGV[1], p->use_raw);
const char *msg = p->use_raw ? "enabled" : "disabled";
command_print(CMD_CTX, "raw access is %s", msg);
command_print(CMD, "raw access is %s", msg);
return ERROR_OK;
}
@@ -411,6 +411,7 @@ static const struct command_registration nand_exec_command_handlers[] = {
.handler = handle_nand_list_command,
.mode = COMMAND_EXEC,
.help = "list configured NAND flash devices",
.usage = "",
},
{
.name = "info",
@@ -500,15 +501,15 @@ COMMAND_HANDLER(handle_nand_init_command)
static int nand_list_walker(struct nand_flash_controller *c, void *x)
{
struct command_context *cmd_ctx = x;
command_print(cmd_ctx, " %s", c->name);
struct command_invocation *cmd = x;
command_print(cmd, " %s", c->name);
return ERROR_OK;
}
COMMAND_HANDLER(handle_nand_list_drivers)
{
command_print(CMD_CTX, "Available NAND flash controller drivers:");
return nand_driver_walk(&nand_list_walker, CMD_CTX);
command_print(CMD, "Available NAND flash controller drivers:");
return nand_driver_walk(&nand_list_walker, CMD);
}
static COMMAND_HELPER(create_nand_device, const char *bank_name,
src/flash/nor/Makefile.am
+1
View File
@@ -63,6 +63,7 @@ NOR_DRIVERS = \
%D%/str7x.c \
%D%/str9x.c \
%D%/str9xpec.c \
%D%/swm050.c \
%D%/tms470.c \
%D%/virtual.c \
%D%/w600.c \
src/flash/nor/ambiqmicro.c
+5 -5
View File
@@ -791,9 +791,9 @@ COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "ambiqmicro mass erase complete");
command_print(CMD, "ambiqmicro mass erase complete");
} else
command_print(CMD_CTX, "ambiqmicro mass erase failed");
command_print(CMD, "ambiqmicro mass erase failed");
return ERROR_OK;
}
@@ -815,9 +815,9 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command)
return retval;
if (ambiqmicro_erase(bank, first, last) == ERROR_OK)
command_print(CMD_CTX, "ambiqmicro page erase complete");
command_print(CMD, "ambiqmicro page erase complete");
else
command_print(CMD_CTX, "ambiqmicro page erase failed");
command_print(CMD, "ambiqmicro page erase failed");
return ERROR_OK;
}
@@ -838,7 +838,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], offset);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count);
command_print(CMD_CTX, "offset=0x%08x count=%d", offset, count);
command_print(CMD, "offset=0x%08x count=%d", offset, count);
CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
src/flash/nor/at91sam3.c
+19 -18
View File
@@ -249,14 +249,14 @@ struct sam3_reg_list {
static struct sam3_chip *all_sam3_chips;
static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
static struct sam3_chip *get_current_sam3(struct command_invocation *cmd)
{
struct target *t;
static struct sam3_chip *p;
t = get_current_target(cmd_ctx);
t = get_current_target(cmd->ctx);
if (!t) {
command_print(cmd_ctx, "No current target?");
command_print(cmd, "No current target?");
return NULL;
}
@@ -264,7 +264,7 @@ static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
if (!p) {
/* this should not happen */
/* the command is not registered until the chip is created? */
command_print(cmd_ctx, "No SAM3 chips exist?");
command_print(cmd, "No SAM3 chips exist?");
return NULL;
}
@@ -273,7 +273,7 @@ static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
return p;
p = p->next;
}
command_print(cmd_ctx, "Cannot find SAM3 chip?");
command_print(cmd, "Cannot find SAM3 chip?");
return NULL;
}
@@ -3538,7 +3538,7 @@ done:
COMMAND_HANDLER(sam3_handle_info_command)
{
struct sam3_chip *pChip;
pChip = get_current_sam3(CMD_CTX);
pChip = get_current_sam3(CMD);
if (!pChip)
return ERROR_OK;
@@ -3549,7 +3549,7 @@ COMMAND_HANDLER(sam3_handle_info_command)
if (pChip->details.bank[0].pBank == NULL) {
x = 0;
need_define:
command_print(CMD_CTX,
command_print(CMD,
"Please define bank %d via command: flash bank %s ... ",
x,
at91sam3_flash.name);
@@ -3598,7 +3598,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
int r, who;
struct sam3_chip *pChip;
pChip = get_current_sam3(CMD_CTX);
pChip = get_current_sam3(CMD);
if (!pChip)
return ERROR_OK;
@@ -3608,7 +3608,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
}
if (pChip->details.bank[0].pBank == NULL) {
command_print(CMD_CTX, "Bank0 must be defined first via: flash bank %s ...",
command_print(CMD, "Bank0 must be defined first via: flash bank %s ...",
at91sam3_flash.name);
return ERROR_FAIL;
}
@@ -3647,22 +3647,22 @@ showall:
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v);
if (r != ERROR_OK)
break;
command_print(CMD_CTX, "sam3-gpnvm%u: %u", x, v);
command_print(CMD, "sam3-gpnvm%u: %u", x, v);
}
return r;
}
if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) {
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v);
command_print(CMD_CTX, "sam3-gpnvm%u: %u", who, v);
command_print(CMD, "sam3-gpnvm%u: %u", who, v);
return r;
} else {
command_print(CMD_CTX, "sam3-gpnvm invalid GPNVM: %u", who);
command_print(CMD, "sam3-gpnvm invalid GPNVM: %u", who);
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
if (who == -1) {
command_print(CMD_CTX, "Missing GPNVM number");
command_print(CMD, "Missing GPNVM number");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -3672,7 +3672,7 @@ showall:
(0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */
r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
else {
command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
command_print(CMD, "Unknown command: %s", CMD_ARGV[0]);
r = ERROR_COMMAND_SYNTAX_ERROR;
}
return r;
@@ -3682,7 +3682,7 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
{
struct sam3_chip *pChip;
pChip = get_current_sam3(CMD_CTX);
pChip = get_current_sam3(CMD);
if (!pChip)
return ERROR_OK;
@@ -3697,7 +3697,7 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
if (v > 200000) {
/* absurd slow clock of 200Khz? */
command_print(CMD_CTX, "Absurd/illegal slow clock freq: %d\n", (int)(v));
command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v));
return ERROR_COMMAND_SYNTAX_ERROR;
}
pChip->cfg.slow_freq = v;
@@ -3705,11 +3705,11 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
}
default:
/* error */
command_print(CMD_CTX, "Too many parameters");
command_print(CMD, "Too many parameters");
return ERROR_COMMAND_SYNTAX_ERROR;
break;
}
command_print(CMD_CTX, "Slowclk freq: %d.%03dkhz",
command_print(CMD, "Slowclk freq: %d.%03dkhz",
(int)(pChip->cfg.slow_freq / 1000),
(int)(pChip->cfg.slow_freq % 1000));
return ERROR_OK;
@@ -3731,6 +3731,7 @@ static const struct command_registration at91sam3_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.help = "Print information about the current at91sam3 chip"
"and its flash configuration.",
.usage = "",
},
{
.name = "slowclk",
src/flash/nor/at91sam4.c
+19 -18
View File
@@ -228,14 +228,14 @@ struct sam4_reg_list {
static struct sam4_chip *all_sam4_chips;
static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
static struct sam4_chip *get_current_sam4(struct command_invocation *cmd)
{
struct target *t;
static struct sam4_chip *p;
t = get_current_target(cmd_ctx);
t = get_current_target(cmd->ctx);
if (!t) {
command_print(cmd_ctx, "No current target?");
command_print(cmd, "No current target?");
return NULL;
}
@@ -243,7 +243,7 @@ static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
if (!p) {
/* this should not happen */
/* the command is not registered until the chip is created? */
command_print(cmd_ctx, "No SAM4 chips exist?");
command_print(cmd, "No SAM4 chips exist?");
return NULL;
}
@@ -252,7 +252,7 @@ static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
return p;
p = p->next;
}
command_print(cmd_ctx, "Cannot find SAM4 chip?");
command_print(cmd, "Cannot find SAM4 chip?");
return NULL;
}
@@ -3018,7 +3018,7 @@ done:
COMMAND_HANDLER(sam4_handle_info_command)
{
struct sam4_chip *pChip;
pChip = get_current_sam4(CMD_CTX);
pChip = get_current_sam4(CMD);
if (!pChip)
return ERROR_OK;
@@ -3029,7 +3029,7 @@ COMMAND_HANDLER(sam4_handle_info_command)
if (pChip->details.bank[0].pBank == NULL) {
x = 0;
need_define:
command_print(CMD_CTX,
command_print(CMD,
"Please define bank %d via command: flash bank %s ... ",
x,
at91sam4_flash.name);
@@ -3078,7 +3078,7 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command)
int r, who;
struct sam4_chip *pChip;
pChip = get_current_sam4(CMD_CTX);
pChip = get_current_sam4(CMD);
if (!pChip)
return ERROR_OK;
@@ -3088,7 +3088,7 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command)
}
if (pChip->details.bank[0].pBank == NULL) {
command_print(CMD_CTX, "Bank0 must be defined first via: flash bank %s ...",
command_print(CMD, "Bank0 must be defined first via: flash bank %s ...",
at91sam4_flash.name);
return ERROR_FAIL;
}
@@ -3127,23 +3127,23 @@ showall:
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v);
if (r != ERROR_OK)
break;
command_print(CMD_CTX, "sam4-gpnvm%u: %u", x, v);
command_print(CMD, "sam4-gpnvm%u: %u", x, v);
}
return r;
}
if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) {
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v);
if (r == ERROR_OK)
command_print(CMD_CTX, "sam4-gpnvm%u: %u", who, v);
command_print(CMD, "sam4-gpnvm%u: %u", who, v);
return r;
} else {
command_print(CMD_CTX, "sam4-gpnvm invalid GPNVM: %u", who);
command_print(CMD, "sam4-gpnvm invalid GPNVM: %u", who);
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
if (who == -1) {
command_print(CMD_CTX, "Missing GPNVM number");
command_print(CMD, "Missing GPNVM number");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -3153,7 +3153,7 @@ showall:
(0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */
r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
else {
command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
command_print(CMD, "Unknown command: %s", CMD_ARGV[0]);
r = ERROR_COMMAND_SYNTAX_ERROR;
}
return r;
@@ -3163,7 +3163,7 @@ COMMAND_HANDLER(sam4_handle_slowclk_command)
{
struct sam4_chip *pChip;
pChip = get_current_sam4(CMD_CTX);
pChip = get_current_sam4(CMD);
if (!pChip)
return ERROR_OK;
@@ -3178,7 +3178,7 @@ COMMAND_HANDLER(sam4_handle_slowclk_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
if (v > 200000) {
/* absurd slow clock of 200Khz? */
command_print(CMD_CTX, "Absurd/illegal slow clock freq: %d\n", (int)(v));
command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v));
return ERROR_COMMAND_SYNTAX_ERROR;
}
pChip->cfg.slow_freq = v;
@@ -3186,11 +3186,11 @@ COMMAND_HANDLER(sam4_handle_slowclk_command)
}
default:
/* error */
command_print(CMD_CTX, "Too many parameters");
command_print(CMD, "Too many parameters");
return ERROR_COMMAND_SYNTAX_ERROR;
break;
}
command_print(CMD_CTX, "Slowclk freq: %d.%03dkhz",
command_print(CMD, "Slowclk freq: %d.%03dkhz",
(int)(pChip->cfg.slow_freq / 1000),
(int)(pChip->cfg.slow_freq % 1000));
return ERROR_OK;
@@ -3212,6 +3212,7 @@ static const struct command_registration at91sam4_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.help = "Print information about the current at91sam4 chip"
"and its flash configuration.",
.usage = "",
},
{
.name = "slowclk",
src/flash/nor/at91sam4l.c
+2 -1
View File
@@ -668,7 +668,8 @@ static const struct command_registration at91sam4l_exec_command_handlers[] = {
.name = "smap_reset_deassert",
.handler = sam4l_handle_reset_deassert,
.mode = COMMAND_EXEC,
.help = "deasert internal reset held by SMAP"
.help = "deassert internal reset held by SMAP",
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/at91sam7.c
+2 -2
View File
@@ -1067,7 +1067,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
if (bank == NULL)
return ERROR_FLASH_BANK_INVALID;
if (strcmp(bank->driver->name, "at91sam7")) {
command_print(CMD_CTX, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]);
command_print(CMD, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]);
return ERROR_FLASH_BANK_INVALID;
}
if (bank->target->state != TARGET_HALTED) {
@@ -1091,7 +1091,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], bit);
if ((bit < 0) || (bit >= at91sam7_info->num_nvmbits)) {
command_print(CMD_CTX,
command_print(CMD,
"gpnvm bit '#%s' is out of bounds for target %s",
CMD_ARGV[0],
at91sam7_info->target_name);
src/flash/nor/at91samd.c
+20 -16
View File
@@ -947,9 +947,9 @@ COMMAND_HANDLER(samd_handle_chip_erase_command)
* perform the erase. */
res = target_write_u8(target, SAMD_DSU + SAMD_DSU_CTRL_EXT, (1<<4));
if (res == ERROR_OK)
command_print(CMD_CTX, "chip erase started");
command_print(CMD, "chip erase started");
else
command_print(CMD_CTX, "write to DSU CTRL failed");
command_print(CMD, "write to DSU CTRL failed");
}
return res;
@@ -961,7 +961,7 @@ COMMAND_HANDLER(samd_handle_set_security_command)
struct target *target = get_current_target(CMD_CTX);
if (CMD_ARGC < 1 || (CMD_ARGC >= 1 && (strcmp(CMD_ARGV[0], "enable")))) {
command_print(CMD_CTX, "supply the \"enable\" argument to proceed.");
command_print(CMD, "supply the \"enable\" argument to proceed.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -975,9 +975,9 @@ COMMAND_HANDLER(samd_handle_set_security_command)
/* Check (and clear) error conditions */
if (res == ERROR_OK)
command_print(CMD_CTX, "chip secured on next power-cycle");
command_print(CMD, "chip secured on next power-cycle");
else
command_print(CMD_CTX, "failed to secure chip");
command_print(CMD, "failed to secure chip");
}
return res;
@@ -1008,7 +1008,7 @@ COMMAND_HANDLER(samd_handle_eeprom_command)
}
if (code > 6) {
command_print(CMD_CTX, "Invalid EEPROM size. Please see "
command_print(CMD, "Invalid EEPROM size. Please see "
"datasheet for a list valid sizes.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1022,10 +1022,10 @@ COMMAND_HANDLER(samd_handle_eeprom_command)
uint32_t size = ((val >> 4) & 0x7); /* grab size code */
if (size == 0x7)
command_print(CMD_CTX, "EEPROM is disabled");
command_print(CMD, "EEPROM is disabled");
else {
/* Otherwise, 6 is 256B, 0 is 16KB */
command_print(CMD_CTX, "EEPROM size is %u bytes",
command_print(CMD, "EEPROM size is %u bytes",
(2 << (13 - size)));
}
}
@@ -1038,7 +1038,7 @@ COMMAND_HANDLER(samd_handle_eeprom_command)
static COMMAND_HELPER(get_u64_from_hexarg, unsigned int num, uint64_t *value)
{
if (num >= CMD_ARGC) {
command_print(CMD_CTX, "Too few Arguments.");
command_print(CMD, "Too few Arguments.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1049,12 +1049,12 @@ static COMMAND_HELPER(get_u64_from_hexarg, unsigned int num, uint64_t *value)
*value = strtoull(&(CMD_ARGV[num][2]), &check, 16);
if ((value == 0 && errno == ERANGE) ||
check == NULL || *check != 0) {
command_print(CMD_CTX, "Invalid 64-bit hex value in argument %d.",
command_print(CMD, "Invalid 64-bit hex value in argument %d.",
num + 1);
return ERROR_COMMAND_SYNTAX_ERROR;
}
} else {
command_print(CMD_CTX, "Argument %d needs to be a hex value.", num + 1);
command_print(CMD, "Argument %d needs to be a hex value.", num + 1);
return ERROR_COMMAND_SYNTAX_ERROR;
}
return ERROR_OK;
@@ -1067,7 +1067,7 @@ COMMAND_HANDLER(samd_handle_nvmuserrow_command)
if (target) {
if (CMD_ARGC > 2) {
command_print(CMD_CTX, "Too much Arguments given.");
command_print(CMD, "Too much Arguments given.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1105,7 +1105,7 @@ COMMAND_HANDLER(samd_handle_nvmuserrow_command)
uint64_t value;
res = read_userrow(target, &value);
if (res == ERROR_OK)
command_print(CMD_CTX, "NVMUSERROW: 0x%016"PRIX64, value);
command_print(CMD, "NVMUSERROW: 0x%016"PRIX64, value);
else
LOG_ERROR("NVMUSERROW could not be read.");
}
@@ -1145,7 +1145,7 @@ COMMAND_HANDLER(samd_handle_bootloader_command)
}
if (code > 6) {
command_print(CMD_CTX, "Invalid bootloader size. Please "
command_print(CMD, "Invalid bootloader size. Please "
"see datasheet for a list valid sizes.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1166,7 +1166,7 @@ COMMAND_HANDLER(samd_handle_bootloader_command)
nb = (2 << (8 - size)) * page_size;
/* There are 4 pages per row */
command_print(CMD_CTX, "Bootloader size is %" PRIu32 " bytes (%" PRIu32 " rows)",
command_print(CMD, "Bootloader size is %" PRIu32 " bytes (%" PRIu32 " rows)",
nb, (uint32_t)(nb / (page_size * 4)));
}
}
@@ -1217,7 +1217,8 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
.name = "dsu_reset_deassert",
.handler = samd_handle_reset_deassert,
.mode = COMMAND_EXEC,
.help = "Deasert internal reset held by DSU."
.help = "Deassert internal reset held by DSU.",
.usage = "",
},
{
.name = "info",
@@ -1225,6 +1226,7 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.help = "Print information about the current at91samd chip "
"and its flash configuration.",
.usage = "",
},
{
.name = "chip-erase",
@@ -1232,6 +1234,7 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
.mode = COMMAND_EXEC,
.help = "Erase the entire Flash by using the Chip-"
"Erase feature in the Device Service Unit (DSU).",
.usage = "",
},
{
.name = "set-security",
@@ -1241,6 +1244,7 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
"This makes it impossible to read the Flash contents. "
"The only way to undo this is to issue the chip-erase "
"command.",
.usage = "'enable'",
},
{
.name = "eeprom",
src/flash/nor/atsame5.c
+9 -7
View File
@@ -765,9 +765,9 @@ COMMAND_HANDLER(same5_handle_chip_erase_command)
* perform the erase. */
int res = target_write_u8(target, SAMD_DSU + SAMD_DSU_CTRL_EXT, (1<<4));
if (res == ERROR_OK)
command_print(CMD_CTX, "chip erase started");
command_print(CMD, "chip erase started");
else
command_print(CMD_CTX, "write to DSU CTRL failed");
command_print(CMD, "write to DSU CTRL failed");
return res;
}
@@ -781,7 +781,7 @@ COMMAND_HANDLER(same5_handle_userpage_command)
return ERROR_FAIL;
if (CMD_ARGC > 2) {
command_print(CMD_CTX, "Too much Arguments given.");
command_print(CMD, "Too much Arguments given.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -806,7 +806,7 @@ COMMAND_HANDLER(same5_handle_userpage_command)
int res2 = target_read_memory(target, SAMD_USER_ROW, 4, 2, buffer);
if (res2 == ERROR_OK) {
uint64_t value = target_buffer_get_u64(target, buffer);
command_print(CMD_CTX, "USER PAGE: 0x%016"PRIX64, value);
command_print(CMD, "USER PAGE: 0x%016"PRIX64, value);
} else {
LOG_ERROR("USER PAGE could not be read.");
}
@@ -829,7 +829,7 @@ COMMAND_HANDLER(same5_handle_bootloader_command)
unsigned long size = strtoul(CMD_ARGV[0], NULL, 0);
uint32_t code = (size + 8191) / 8192;
if (code > 15) {
command_print(CMD_CTX, "Invalid bootloader size. Please "
command_print(CMD, "Invalid bootloader size. Please "
"see datasheet for a list valid sizes.");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -842,7 +842,7 @@ COMMAND_HANDLER(same5_handle_bootloader_command)
if (res2 == ERROR_OK) {
uint32_t code = (val >> 26) & 0xf; /* grab size code */
uint32_t size = (15 - code) * 8192;
command_print(CMD_CTX, "Bootloader protected in the first %"
command_print(CMD, "Bootloader protected in the first %"
PRIu32 " bytes", size);
}
@@ -893,12 +893,14 @@ COMMAND_HANDLER(samd_handle_reset_deassert)
static const struct command_registration same5_exec_command_handlers[] = {
{
.name = "dsu_reset_deassert",
.usage = "",
.handler = samd_handle_reset_deassert,
.mode = COMMAND_EXEC,
.help = "Deasert internal reset held by DSU."
.help = "Deassert internal reset held by DSU."
},
{
.name = "chip-erase",
.usage = "",
.handler = same5_handle_chip_erase_command,
.mode = COMMAND_EXEC,
.help = "Erase the entire Flash by using the Chip-"
src/flash/nor/atsamv.c
+5 -5
View File
@@ -672,22 +672,22 @@ showall:
r = samv_get_gpnvm(target, x, &v);
if (r != ERROR_OK)
break;
command_print(CMD_CTX, "samv-gpnvm%u: %u", x, v);
command_print(CMD, "samv-gpnvm%u: %u", x, v);
}
return r;
}
if ((who >= 0) && (((unsigned)who) < SAMV_NUM_GPNVM_BITS)) {
r = samv_get_gpnvm(target, who, &v);
command_print(CMD_CTX, "samv-gpnvm%u: %u", who, v);
command_print(CMD, "samv-gpnvm%u: %u", who, v);
return r;
} else {
command_print(CMD_CTX, "invalid gpnvm: %u", who);
command_print(CMD, "invalid gpnvm: %u", who);
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
if (who == -1) {
command_print(CMD_CTX, "missing gpnvm number");
command_print(CMD, "missing gpnvm number");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -696,7 +696,7 @@ showall:
else if (!strcmp("clr", CMD_ARGV[0]) || !strcmp("clear", CMD_ARGV[0]))
r = samv_clear_gpnvm(target, who);
else {
command_print(CMD_CTX, "unknown command: %s", CMD_ARGV[0]);
command_print(CMD, "unknown command: %s", CMD_ARGV[0]);
r = ERROR_COMMAND_SYNTAX_ERROR;
}
return r;
src/flash/nor/avrf.c
+2 -2
View File
@@ -433,9 +433,9 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "avr mass erase complete");
command_print(CMD, "avr mass erase complete");
} else
command_print(CMD_CTX, "avr mass erase failed");
command_print(CMD, "avr mass erase failed");
LOG_DEBUG("%s", __func__);
return ERROR_OK;
src/flash/nor/core.h
+10 -7
View File
@@ -45,9 +45,12 @@ struct flash_sector {
uint32_t size;
/**
* Indication of erasure status: 0 = not erased, 1 = erased,
* other = unknown. Set by @c flash_driver_s::erase_check.
* other = unknown. Set by @c flash_driver_s::erase_check only.
*
* Flag is not used in protection block
* This information must be considered stale immediately.
* Don't set it in flash_driver_s::erase or a device mass_erase
* Don't clear it in flash_driver_s::write
* The flag is not used in a protection block
*/
int is_erased;
/**
@@ -118,7 +121,7 @@ struct flash_bank {
/**
* The number of sectors on this chip. This value will
* be set intially to 0, and the flash driver must set this to
* be set initially to 0, and the flash driver must set this to
* some non-zero value during "probe()" or "auto_probe()".
*/
int num_sectors;
@@ -127,12 +130,12 @@ struct flash_bank {
/**
* The number of protection blocks in this bank. This value
* is set intially to 0 and sectors are used as protection blocks.
* is set initially to 0 and sectors are used as protection blocks.
* Driver probe can set protection blocks array to work with
* protection granularity different than sector size.
*/
int num_prot_blocks;
/** Array of protection blocks, allocated and initilized by the flash driver */
/** Array of protection blocks, allocated and initialized by the flash driver */
struct flash_sector *prot_blocks;
struct flash_bank *next; /**< The next flash bank on this chip */
@@ -239,8 +242,8 @@ struct flash_bank *get_flash_bank_by_name_noprobe(const char *name);
*/
int get_flash_bank_by_num(int num, struct flash_bank **bank);
/**
* Retreives @a bank from a command argument, reporting errors parsing
* the bank identifier or retreiving the specified bank. The bank
* Retrieves @a bank from a command argument, reporting errors parsing
* the bank identifier or retrieving the specified bank. The bank
* may be identified by its bank number or by @c name.instance, where
* @a instance is driver-specific.
* @param name_index The index to the string in args containing the
src/flash/nor/drivers.c
+2
View File
@@ -77,6 +77,7 @@ extern const struct flash_driver stmsmi_flash;
extern const struct flash_driver str7x_flash;
extern const struct flash_driver str9x_flash;
extern const struct flash_driver str9xpec_flash;
extern const struct flash_driver swm050_flash;
extern const struct flash_driver tms470_flash;
extern const struct flash_driver virtual_flash;
extern const struct flash_driver w600_flash;
@@ -146,6 +147,7 @@ static const struct flash_driver * const flash_drivers[] = {
&str7x_flash,
&str9x_flash,
&str9xpec_flash,
&swm050_flash,
&tms470_flash,
&virtual_flash,
&xcf_flash,
src/flash/nor/efm32.c
+1 -1
View File
@@ -1093,7 +1093,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command)
return retval;
}
command_print(CMD_CTX, "efm32x debug interface locked, reset the device to apply");
command_print(CMD, "efm32x debug interface locked, reset the device to apply");
return ERROR_OK;
}
src/flash/nor/em357.c
+8 -8
View File
@@ -776,7 +776,7 @@ COMMAND_HANDLER(em357_handle_lock_command)
}
if (em357_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "em357 failed to erase options");
command_print(CMD, "em357 failed to erase options");
return ERROR_OK;
}
@@ -784,11 +784,11 @@ COMMAND_HANDLER(em357_handle_lock_command)
em357_info->option_bytes.RDP = 0;
if (em357_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "em357 failed to lock device");
command_print(CMD, "em357 failed to lock device");
return ERROR_OK;
}
command_print(CMD_CTX, "em357 locked");
command_print(CMD, "em357 locked");
return ERROR_OK;
}
@@ -813,16 +813,16 @@ COMMAND_HANDLER(em357_handle_unlock_command)
}
if (em357_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "em357 failed to unlock device");
command_print(CMD, "em357 failed to unlock device");
return ERROR_OK;
}
if (em357_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "em357 failed to lock device");
command_print(CMD, "em357 failed to lock device");
return ERROR_OK;
}
command_print(CMD_CTX, "em357 unlocked.\n"
command_print(CMD, "em357 unlocked.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");
@@ -886,9 +886,9 @@ COMMAND_HANDLER(em357_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "em357 mass erase complete");
command_print(CMD, "em357 mass erase complete");
} else
command_print(CMD_CTX, "em357 mass erase failed");
command_print(CMD, "em357 mass erase failed");
return retval;
}
src/flash/nor/esirisc_flash.c
+6 -6
View File
@@ -92,7 +92,7 @@
#endif
#define CONTROL_TIMEOUT 5000 /* 5s */
#define PAGE_SIZE 4096
#define FLASH_PAGE_SIZE 4096
#define PB_MAX 32
#define NUM_NS_PER_S 1000000000ULL
@@ -264,7 +264,7 @@ static int esirisc_flash_erase(struct flash_bank *bank, int first, int last)
(void)esirisc_flash_disable_protect(bank);
for (int page = first; page < last; ++page) {
uint32_t address = page * PAGE_SIZE;
uint32_t address = page * FLASH_PAGE_SIZE;
target_write_u32(target, esirisc_info->cfg + ADDRESS, address);
@@ -464,8 +464,8 @@ static int esirisc_flash_probe(struct flash_bank *bank)
if (target->state != TARGET_HALTED)
return ERROR_TARGET_NOT_HALTED;
bank->num_sectors = bank->size / PAGE_SIZE;
bank->sectors = alloc_block_array(0, PAGE_SIZE, bank->num_sectors);
bank->num_sectors = bank->size / FLASH_PAGE_SIZE;
bank->sectors = alloc_block_array(0, FLASH_PAGE_SIZE, bank->num_sectors);
retval = esirisc_flash_init(bank);
if (retval != ERROR_OK) {
@@ -516,7 +516,7 @@ COMMAND_HANDLER(handle_esirisc_flash_mass_erase_command)
retval = esirisc_flash_mass_erase(bank);
command_print(CMD_CTX, "mass erase %s",
command_print(CMD, "mass erase %s",
(retval == ERROR_OK) ? "successful" : "failed");
return retval;
@@ -536,7 +536,7 @@ COMMAND_HANDLER(handle_esirisc_flash_ref_erase_command)
retval = esirisc_flash_ref_erase(bank);
command_print(CMD_CTX, "erase reference cell %s",
command_print(CMD, "erase reference cell %s",
(retval == ERROR_OK) ? "successful" : "failed");
return retval;
src/flash/nor/faux.c
+1
View File
@@ -109,6 +109,7 @@ static const struct command_registration faux_command_handlers[] = {
.mode = COMMAND_ANY,
.help = "faux flash command group",
.chain = hello_command_handlers,
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/fm3.c
+2 -2
View File
@@ -958,9 +958,9 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "fm3 chip erase complete");
command_print(CMD, "fm3 chip erase complete");
} else {
command_print(CMD_CTX, "fm3 chip erase failed");
command_print(CMD, "fm3 chip erase failed");
}
return ERROR_OK;
src/flash/nor/kinetis.c
+16 -14
View File
@@ -2895,7 +2895,7 @@ COMMAND_HANDLER(kinetis_nvm_partition)
flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f);
switch (flex_nvm_partition_code) {
case 0:
command_print(CMD_CTX, "No EEPROM backup, data flash only");
command_print(CMD, "No EEPROM backup, data flash only");
break;
case 1:
case 2:
@@ -2903,10 +2903,10 @@ COMMAND_HANDLER(kinetis_nvm_partition)
case 4:
case 5:
case 6:
command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
command_print(CMD, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
break;
case 8:
command_print(CMD_CTX, "No data flash, EEPROM backup only");
command_print(CMD, "No data flash, EEPROM backup only");
break;
case 0x9:
case 0xA:
@@ -2914,13 +2914,13 @@ COMMAND_HANDLER(kinetis_nvm_partition)
case 0xC:
case 0xD:
case 0xE:
command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
command_print(CMD, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
break;
case 0xf:
command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)");
command_print(CMD, "No EEPROM backup, data flash only (DEPART not set)");
break;
default:
command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
command_print(CMD, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
}
return ERROR_OK;
@@ -2986,7 +2986,7 @@ COMMAND_HANDLER(kinetis_nvm_partition)
if (result != ERROR_OK)
return result;
command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU.");
command_print(CMD, "FlexNVM partition set. Please reset MCU.");
if (k_chip) {
first_nvm_bank = k_chip->num_pflash_blocks;
@@ -2996,7 +2996,7 @@ COMMAND_HANDLER(kinetis_nvm_partition)
k_chip->probed = false;
}
command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size.");
command_print(CMD, "FlexNVM banks will be re-probed to set new data flash size.");
return ERROR_OK;
}
@@ -3015,12 +3015,12 @@ COMMAND_HANDLER(kinetis_fcf_source_handler)
}
if (allow_fcf_writes) {
command_print(CMD_CTX, "Arbitrary Flash Configuration Field writes enabled.");
command_print(CMD_CTX, "Protection info writes to FCF disabled.");
command_print(CMD, "Arbitrary Flash Configuration Field writes enabled.");
command_print(CMD, "Protection info writes to FCF disabled.");
LOG_WARNING("BEWARE: incorrect flash configuration may permanently lock the device.");
} else {
command_print(CMD_CTX, "Protection info writes to Flash Configuration Field enabled.");
command_print(CMD_CTX, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
command_print(CMD, "Protection info writes to Flash Configuration Field enabled.");
command_print(CMD, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
}
return ERROR_OK;
@@ -3035,7 +3035,7 @@ COMMAND_HANDLER(kinetis_fopt_handler)
fcf_fopt = (uint8_t)strtoul(CMD_ARGV[0], NULL, 0);
fcf_fopt_configured = true;
} else {
command_print(CMD_CTX, "FCF_FOPT 0x%02" PRIx8, fcf_fopt);
command_print(CMD, "FCF_FOPT 0x%02" PRIx8, fcf_fopt);
}
return ERROR_OK;
@@ -3074,7 +3074,8 @@ static const struct command_registration kinetis_security_command_handlers[] = {
.usage = "",
.handler = kinetis_mdm_mass_erase,
},
{ .name = "reset",
{
.name = "reset",
.mode = COMMAND_EXEC,
.help = "Issue a reset via the MDM-AP",
.usage = "",
@@ -3126,6 +3127,7 @@ static const struct command_registration kinetis_exec_command_handlers[] = {
.mode = COMMAND_CONFIG,
.help = "Driver creates additional banks if device with two/four flash blocks is probed",
.handler = kinetis_create_banks_handler,
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/lpc2000.c
+3 -3
View File
@@ -1579,11 +1579,11 @@ COMMAND_HANDLER(lpc2000_handle_part_id_command)
int status_code = get_lpc2000_part_id(bank, &part_id);
if (status_code != 0x0) {
if (status_code == ERROR_FLASH_OPERATION_FAILED) {
command_print(CMD_CTX, "no sufficient working area specified, can't access LPC2000 IAP interface");
command_print(CMD, "no sufficient working area specified, can't access LPC2000 IAP interface");
} else
command_print(CMD_CTX, "lpc2000 IAP returned status code %i", status_code);
command_print(CMD, "lpc2000 IAP returned status code %i", status_code);
} else
command_print(CMD_CTX, "lpc2000 part id: 0x%8.8" PRIx32, part_id);
command_print(CMD, "lpc2000 part id: 0x%8.8" PRIx32, part_id);
return retval;
}
src/flash/nor/lpc2900.c
+8 -8
View File
@@ -501,7 +501,7 @@ COMMAND_HANDLER(lpc2900_handle_signature_command)
if (status != ERROR_OK)
return status;
command_print(CMD_CTX, "signature: 0x%8.8" PRIx32
command_print(CMD, "signature: 0x%8.8" PRIx32
":0x%8.8" PRIx32
":0x%8.8" PRIx32
":0x%8.8" PRIx32,
@@ -595,11 +595,11 @@ COMMAND_HANDLER(lpc2900_handle_password_command)
lpc2900_info->risky = !strcmp(CMD_ARGV[1], ISS_PASSWORD);
if (!lpc2900_info->risky) {
command_print(CMD_CTX, "Wrong password (use '%s')", ISS_PASSWORD);
command_print(CMD, "Wrong password (use '%s')", ISS_PASSWORD);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
command_print(CMD_CTX,
command_print(CMD,
"Potentially dangerous operation allowed in next command!");
return ERROR_OK;
@@ -622,7 +622,7 @@ COMMAND_HANDLER(lpc2900_handle_write_custom_command)
/* Check if command execution is allowed. */
if (!lpc2900_info->risky) {
command_print(CMD_CTX, "Command execution not allowed!");
command_print(CMD, "Command execution not allowed!");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
lpc2900_info->risky = 0;
@@ -721,7 +721,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
/* Check if command execution is allowed. */
if (!lpc2900_info->risky) {
command_print(CMD_CTX, "Command execution not allowed! "
command_print(CMD, "Command execution not allowed! "
"(use 'password' command first)");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -734,7 +734,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
if ((first >= bank->num_sectors) ||
(last >= bank->num_sectors) ||
(first > last)) {
command_print(CMD_CTX, "Illegal sector range");
command_print(CMD, "Illegal sector range");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
@@ -773,7 +773,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
}
}
command_print(CMD_CTX,
command_print(CMD,
"Sectors security will become effective after next power cycle");
/* Update the sector security status */
@@ -803,7 +803,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_jtag_command)
/* Check if command execution is allowed. */
if (!lpc2900_info->risky) {
command_print(CMD_CTX, "Command execution not allowed! "
command_print(CMD, "Command execution not allowed! "
"(use 'password' command first)");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
src/flash/nor/max32xxx.c
+15 -14
View File
@@ -772,7 +772,7 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command)
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (CMD_ARGC < 1) {
command_print(CMD_CTX, "max32xxx mass_erase <bank>");
command_print(CMD, "max32xxx mass_erase <bank>");
return ERROR_OK;
}
@@ -784,9 +784,9 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "max32xxx mass erase complete");
command_print(CMD, "max32xxx mass erase complete");
} else
command_print(CMD_CTX, "max32xxx mass erase failed");
command_print(CMD, "max32xxx mass erase failed");
return ERROR_OK;
}
@@ -799,7 +799,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
uint32_t addr, len;
if (CMD_ARGC != 3) {
command_print(CMD_CTX, "max32xxx protection_set <bank> <addr> <size>");
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
return ERROR_OK;
}
@@ -811,7 +811,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
/* Convert the range to the page numbers */
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
LOG_WARNING("Error parsing address");
command_print(CMD_CTX, "max32xxx protection_set <bank> <addr> <size>");
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
return ERROR_FAIL;
}
/* Mask off the top portion on the address */
@@ -819,7 +819,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
LOG_WARNING("Error parsing length");
command_print(CMD_CTX, "max32xxx protection_set <bank> <addr> <size>");
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
return ERROR_FAIL;
}
@@ -840,9 +840,9 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
len = addr + (len / info->sector_size) - 1;
if (max32xxx_protect(bank, 1, addr, len) == ERROR_OK)
command_print(CMD_CTX, "max32xxx protection set complete");
command_print(CMD, "max32xxx protection set complete");
else
command_print(CMD_CTX, "max32xxx protection set failed");
command_print(CMD, "max32xxx protection set failed");
return ERROR_OK;
}
@@ -855,7 +855,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
uint32_t addr, len;
if (CMD_ARGC != 3) {
command_print(CMD_CTX, "max32xxx protection_clr <bank> <addr> <size>");
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
return ERROR_OK;
}
@@ -867,7 +867,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
/* Convert the range to the page numbers */
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
LOG_WARNING("Error parsing address");
command_print(CMD_CTX, "max32xxx protection_clr <bank> <addr> <size>");
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
return ERROR_FAIL;
}
/* Mask off the top portion on the address */
@@ -875,7 +875,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
LOG_WARNING("Error parsing length");
command_print(CMD_CTX, "max32xxx protection_clr <bank> <addr> <size>");
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
return ERROR_FAIL;
}
@@ -896,9 +896,9 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
len = addr + (len / info->sector_size) - 1;
if (max32xxx_protect(bank, 0, addr, len) == ERROR_OK)
command_print(CMD_CTX, "max32xxx protection clear complete");
command_print(CMD, "max32xxx protection clear complete");
else
command_print(CMD_CTX, "max32xxx protection clear failed");
command_print(CMD, "max32xxx protection clear failed");
return ERROR_OK;
}
@@ -911,7 +911,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command)
int i;
if (CMD_ARGC < 1) {
command_print(CMD_CTX, "max32xxx protection_check <bank>");
command_print(CMD, "max32xxx protection_check <bank>");
return ERROR_OK;
}
@@ -977,6 +977,7 @@ static const struct command_registration max32xxx_command_handlers[] = {
.mode = COMMAND_EXEC,
.help = "max32xxx flash command group",
.chain = max32xxx_exec_command_handlers,
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/niietcm4.c
+32 -32
View File
@@ -425,9 +425,9 @@ COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command)
retval = target_read_u32(target, UFMD, &uflash_data);
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "Read userflash %s region:\n"
"address = 0x%04x,\n"
"value = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data);
command_print(CMD, "Read userflash %s region:\n"
"address = 0x%04x,\n"
"value = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data);
return retval;
}
@@ -467,10 +467,10 @@ COMMAND_HANDLER(niietcm4_handle_uflash_write_byte_command)
int page_num = uflash_addr/USERFLASH_PAGE_SIZE;
command_print(CMD_CTX, "Write userflash %s region:\n"
"address = 0x%04x,\n"
"value = 0x%02x.\n"
"Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data);
command_print(CMD, "Write userflash %s region:\n"
"address = 0x%04x,\n"
"value = 0x%02x.\n"
"Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data);
/* dump */
uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
niietcm4_dump_uflash_page(bank, uflash_dump, page_num, mem_type);
@@ -483,7 +483,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_write_byte_command)
/* write dump to userflash */
niietcm4_load_uflash_page(bank, uflash_dump, page_num, mem_type);
command_print(CMD_CTX, "done!");
command_print(CMD, "done!");
return retval;
}
@@ -520,7 +520,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_full_erase_command)
retval = niietcm4_uopstatus_check(bank);
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "Userflash full erase done!");
command_print(CMD, "Userflash full erase done!");
return retval;
}
@@ -563,7 +563,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_erase_command)
return retval;
}
command_print(CMD_CTX, "Erase %s userflash pages %d through %d done!", CMD_ARGV[0], first, last);
command_print(CMD, "Erase %s userflash pages %d through %d done!", CMD_ARGV[0], first, last);
return retval;
}
@@ -621,9 +621,9 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_check_command)
return retval;
if (uflash_data & INFOWORD3_LOCK_IFB_UF)
command_print(CMD_CTX, "All sectors of info userflash are not protected!");
command_print(CMD, "All sectors of info userflash are not protected!");
else
command_print(CMD_CTX, "All sectors of info userflash are protected!");
command_print(CMD, "All sectors of info userflash are protected!");
} else {
uflash_addr = UF_LOCK_ADDR;
uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
@@ -645,10 +645,10 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_check_command)
for (j = 0; j < 8; j++) {
if (uflash_data & 0x1)
command_print(CMD_CTX, "Userflash sector #%03d: 0x%04x (0x100) is not protected!",
command_print(CMD, "Userflash sector #%03d: 0x%04x (0x100) is not protected!",
i*8+j, (i*8+j)*USERFLASH_PAGE_SIZE);
else
command_print(CMD_CTX, "Userflash sector #%03d: 0x%04x (0x100) is protected!",
command_print(CMD, "Userflash sector #%03d: 0x%04x (0x100) is protected!",
i*8+j, (i*8+j)*USERFLASH_PAGE_SIZE);
uflash_data = uflash_data >> 1;
}
@@ -693,11 +693,11 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_command)
int set;
if (strcmp("on", CMD_ARGV[3]) == 0) {
command_print(CMD_CTX, "Try to enable %s userflash sectors %d through %d protection. Please wait ... ",
command_print(CMD, "Try to enable %s userflash sectors %d through %d protection. Please wait ... ",
CMD_ARGV[0], first, last);
set = 1;
} else if (strcmp("off", CMD_ARGV[3]) == 0) {
command_print(CMD_CTX, "Try to disable %s userflash sectors %d through %d protection. Please wait ... ",
command_print(CMD, "Try to disable %s userflash sectors %d through %d protection. Please wait ... ",
CMD_ARGV[0], first, last);
set = 0;
} else
@@ -707,7 +707,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "done!");
command_print(CMD, "done!");
return retval;
}
@@ -733,10 +733,10 @@ COMMAND_HANDLER(niietcm4_handle_bflash_info_remap_command)
int set;
if (strcmp("on", CMD_ARGV[0]) == 0) {
command_print(CMD_CTX, "Try to enable bootflash info region remap. Please wait ...");
command_print(CMD, "Try to enable bootflash info region remap. Please wait ...");
set = 1;
} else if (strcmp("off", CMD_ARGV[0]) == 0) {
command_print(CMD_CTX, "Try to disable bootflash info region remap. Please wait ...");
command_print(CMD, "Try to disable bootflash info region remap. Please wait ...");
set = 0;
} else
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -756,7 +756,7 @@ COMMAND_HANDLER(niietcm4_handle_bflash_info_remap_command)
/* write dump to userflash */
niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
command_print(CMD_CTX, "done!");
command_print(CMD, "done!");
return retval;
}
@@ -814,11 +814,11 @@ COMMAND_HANDLER(niietcm4_handle_extmem_cfg_command)
else
return ERROR_COMMAND_SYNTAX_ERROR;
command_print(CMD_CTX, "Try to configure external memory boot interface:\n"
"port = %s\n"
"pin = %s\n"
"func = %s\n"
"Please wait ...", CMD_ARGV[0], CMD_ARGV[1], CMD_ARGV[2]);
command_print(CMD, "Try to configure external memory boot interface:\n"
"port = %s\n"
"pin = %s\n"
"func = %s\n"
"Please wait ...", CMD_ARGV[0], CMD_ARGV[1], CMD_ARGV[2]);
/* dump */
uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
@@ -833,7 +833,7 @@ COMMAND_HANDLER(niietcm4_handle_extmem_cfg_command)
/* write dump to userflash */
niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
command_print(CMD_CTX, "done!");
command_print(CMD, "done!");
return retval;
}
@@ -861,10 +861,10 @@ COMMAND_HANDLER(niietcm4_handle_extmem_boot_command)
int set;
if (strcmp("on", CMD_ARGV[0]) == 0) {
command_print(CMD_CTX, "Try to enable boot from external memory. Please wait ...");
command_print(CMD, "Try to enable boot from external memory. Please wait ...");
set = 1;
} else if (strcmp("off", CMD_ARGV[0]) == 0) {
command_print(CMD_CTX, "Try to disable boot from external memory. Please wait ...");
command_print(CMD, "Try to disable boot from external memory. Please wait ...");
set = 0;
} else
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -884,7 +884,7 @@ COMMAND_HANDLER(niietcm4_handle_extmem_boot_command)
/* write dump to userflash */
niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
command_print(CMD_CTX, "done!");
command_print(CMD, "done!");
return retval;
}
@@ -900,7 +900,7 @@ COMMAND_HANDLER(niietcm4_handle_service_mode_erase_command)
return retval;
struct target *target = bank->target;
command_print(CMD_CTX, "Try to perform service mode erase. Please wait ...");
command_print(CMD, "Try to perform service mode erase. Please wait ...");
retval = target_write_u32(target, SERVICE_MODE_ERASE_ADDR, 1);
if (retval != ERROR_OK)
@@ -923,7 +923,7 @@ COMMAND_HANDLER(niietcm4_handle_service_mode_erase_command)
}
busy_sleep(1); /* can use busy sleep for short times. */
}
command_print(CMD_CTX, "done! All data erased.");
command_print(CMD, "done! All data erased.");
return retval;
}
@@ -938,7 +938,7 @@ COMMAND_HANDLER(niietcm4_handle_driver_info_command)
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "niietcm4 flash driver\n"
command_print(CMD, "niietcm4 flash driver\n"
"version: %d.%d\n"
"author: Bogdan Kolbov\n"
"mail: kolbov@niiet.ru",
src/flash/nor/nrf5.c
+1
View File
@@ -1118,6 +1118,7 @@ static const struct command_registration nrf5_exec_command_handlers[] = {
.handler = nrf5_handle_mass_erase_command,
.mode = COMMAND_EXEC,
.help = "Erase all flash contents of the chip.",
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/numicro.c
+3 -2
View File
@@ -1827,11 +1827,11 @@ COMMAND_HANDLER(numicro_handle_chip_erase_command)
retval = numicro_fmc_cmd(target, ISPCMD_CHIPERASE, 0, 0, &rdat);
if (retval != ERROR_OK) {
command_print(CMD_CTX, "numicro chip_erase failed");
command_print(CMD, "numicro chip_erase failed");
return retval;
}
command_print(CMD_CTX, "numicro chip_erase complete");
command_print(CMD, "numicro chip_erase complete");
return ERROR_OK;
}
@@ -1856,6 +1856,7 @@ static const struct command_registration numicro_exec_command_handlers[] = {
.handler = numicro_handle_chip_erase_command,
.mode = COMMAND_EXEC,
.help = "chip erase through ISP.",
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/pic32mx.c
+6 -6
View File
@@ -858,7 +858,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
return retval;
if (address < bank->base || address >= (bank->base + bank->size)) {
command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
command_print(CMD, "flash address '%s' is out of bounds", CMD_ARGV[0]);
return ERROR_OK;
}
@@ -870,9 +870,9 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
res = ERROR_FLASH_OPERATION_FAILED;
if (res == ERROR_OK)
command_print(CMD_CTX, "pic32mx pgm word complete");
command_print(CMD, "pic32mx pgm word complete");
else
command_print(CMD_CTX, "pic32mx pgm word failed (status = 0x%x)", status);
command_print(CMD, "pic32mx pgm word failed (status = 0x%x)", status);
return ERROR_OK;
}
@@ -885,7 +885,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
int timeout = 10;
if (CMD_ARGC < 1) {
command_print(CMD_CTX, "pic32mx unlock <bank>");
command_print(CMD, "pic32mx unlock <bank>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -907,7 +907,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
if (mchip_cmd & (1 << 7)) {
/* device is not locked */
command_print(CMD_CTX, "pic32mx is already unlocked, erasing anyway");
command_print(CMD, "pic32mx is already unlocked, erasing anyway");
}
/* unlock/erase device */
@@ -931,7 +931,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
/* select ejtag tap */
mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
command_print(CMD_CTX, "pic32mx unlocked.\n"
command_print(CMD, "pic32mx unlocked.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");
src/flash/nor/psoc4.c
+2 -2
View File
@@ -913,9 +913,9 @@ COMMAND_HANDLER(psoc4_handle_mass_erase_command)
retval = psoc4_mass_erase(bank);
if (retval == ERROR_OK)
command_print(CMD_CTX, "psoc mass erase complete");
command_print(CMD, "psoc mass erase complete");
else
command_print(CMD_CTX, "psoc mass erase failed");
command_print(CMD, "psoc mass erase failed");
return retval;
}
src/flash/nor/psoc5lp.c
+2 -2
View File
@@ -1501,9 +1501,9 @@ COMMAND_HANDLER(psoc5lp_handle_mass_erase_command)
retval = psoc5lp_spc_erase_all(bank->target);
if (retval == ERROR_OK)
command_print(CMD_CTX, "PSoC 5LP erase succeeded");
command_print(CMD, "PSoC 5LP erase succeeded");
else
command_print(CMD_CTX, "PSoC 5LP erase failed");
command_print(CMD, "PSoC 5LP erase failed");
return retval;
}
src/flash/nor/stellaris.c
+2 -2
View File
@@ -1336,9 +1336,9 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "stellaris mass erase complete");
command_print(CMD, "stellaris mass erase complete");
} else
command_print(CMD_CTX, "stellaris mass erase failed");
command_print(CMD, "stellaris mass erase failed");
return ERROR_OK;
}
src/flash/nor/stm32f1x.c
+20 -20
View File
@@ -1186,7 +1186,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
return retval;
if (stm32x_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to erase options");
command_print(CMD, "stm32x failed to erase options");
return ERROR_OK;
}
@@ -1194,11 +1194,11 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
stm32x_info->option_bytes.rdp = 0;
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to lock device");
command_print(CMD, "stm32x failed to lock device");
return ERROR_OK;
}
command_print(CMD_CTX, "stm32x locked");
command_print(CMD, "stm32x locked");
return ERROR_OK;
}
@@ -1227,16 +1227,16 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
return retval;
if (stm32x_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to erase options");
command_print(CMD, "stm32x failed to erase options");
return ERROR_OK;
}
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to unlock device");
command_print(CMD, "stm32x failed to unlock device");
return ERROR_OK;
}
command_print(CMD_CTX, "stm32x unlocked.\n"
command_print(CMD, "stm32x unlocked.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");
@@ -1281,30 +1281,30 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
return retval;
if (optionbyte & (1 << OPT_ERROR))
command_print(CMD_CTX, "option byte complement error");
command_print(CMD, "option byte complement error");
command_print(CMD_CTX, "option byte register = 0x%" PRIx32 "", optionbyte);
command_print(CMD_CTX, "write protection register = 0x%" PRIx32 "", protection);
command_print(CMD, "option byte register = 0x%" PRIx32 "", optionbyte);
command_print(CMD, "write protection register = 0x%" PRIx32 "", protection);
command_print(CMD_CTX, "read protection: %s",
command_print(CMD, "read protection: %s",
(optionbyte & (1 << OPT_READOUT)) ? "on" : "off");
/* user option bytes are offset depending on variant */
optionbyte >>= stm32x_info->option_offset;
command_print(CMD_CTX, "watchdog: %sware",
command_print(CMD, "watchdog: %sware",
(optionbyte & (1 << OPT_RDWDGSW)) ? "soft" : "hard");
command_print(CMD_CTX, "stop mode: %sreset generated upon entry",
command_print(CMD, "stop mode: %sreset generated upon entry",
(optionbyte & (1 << OPT_RDRSTSTOP)) ? "no " : "");
command_print(CMD_CTX, "standby mode: %sreset generated upon entry",
command_print(CMD, "standby mode: %sreset generated upon entry",
(optionbyte & (1 << OPT_RDRSTSTDBY)) ? "no " : "");
if (stm32x_info->has_dual_banks)
command_print(CMD_CTX, "boot: bank %d", (optionbyte & (1 << OPT_BFB2)) ? 0 : 1);
command_print(CMD, "boot: bank %d", (optionbyte & (1 << OPT_BFB2)) ? 0 : 1);
command_print(CMD_CTX, "user data = 0x%02" PRIx16 "", user_data);
command_print(CMD, "user data = 0x%02" PRIx16 "", user_data);
return ERROR_OK;
}
@@ -1383,7 +1383,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
}
if (stm32x_erase_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to erase options");
command_print(CMD, "stm32x failed to erase options");
return ERROR_OK;
}
@@ -1391,11 +1391,11 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
stm32x_info->option_bytes.data = useropt;
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32x failed to write options");
command_print(CMD, "stm32x failed to write options");
return ERROR_OK;
}
command_print(CMD_CTX, "stm32x write options complete.\n"
command_print(CMD, "stm32x write options complete.\n"
"INFO: %spower cycle is required "
"for the new settings to take effect.",
stm32x_info->can_load_options
@@ -1504,9 +1504,9 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "stm32x mass erase complete");
command_print(CMD, "stm32x mass erase complete");
} else
command_print(CMD_CTX, "stm32x mass erase failed");
command_print(CMD, "stm32x mass erase failed");
return retval;
}
src/flash/nor/stm32f2x.c
+28 -28
View File
@@ -1415,7 +1415,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
}
if (stm32x_read_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
command_print(CMD, "%s failed to read options", bank->driver->name);
return ERROR_OK;
}
@@ -1423,11 +1423,11 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
stm32x_info->option_bytes.RDP = 0;
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to lock device", bank->driver->name);
command_print(CMD, "%s failed to lock device", bank->driver->name);
return ERROR_OK;
}
command_print(CMD_CTX, "%s locked", bank->driver->name);
command_print(CMD, "%s locked", bank->driver->name);
return ERROR_OK;
}
@@ -1454,7 +1454,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
}
if (stm32x_read_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
command_print(CMD, "%s failed to read options", bank->driver->name);
return ERROR_OK;
}
@@ -1466,11 +1466,11 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
}
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
command_print(CMD, "%s failed to unlock device", bank->driver->name);
return ERROR_OK;
}
command_print(CMD_CTX, "%s unlocked.\n"
command_print(CMD, "%s unlocked.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.", bank->driver->name);
@@ -1525,7 +1525,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
int i;
if (CMD_ARGC < 1) {
command_print(CMD_CTX, "stm32x mass_erase <bank>");
command_print(CMD, "stm32x mass_erase <bank>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1540,9 +1540,9 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "stm32x mass erase complete");
command_print(CMD, "stm32x mass erase complete");
} else {
command_print(CMD_CTX, "stm32x mass erase failed");
command_print(CMD, "stm32x mass erase failed");
}
return retval;
@@ -1555,7 +1555,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command)
struct stm32x_flash_bank *stm32x_info = NULL;
if (CMD_ARGC != 1) {
command_print(CMD_CTX, "stm32f2x options_read <bank>");
command_print(CMD, "stm32f2x options_read <bank>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1572,20 +1572,20 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command)
if (stm32x_info->has_boot_addr) {
uint32_t boot_addr = stm32x_info->option_bytes.boot_addr;
command_print(CMD_CTX, "stm32f2x user_options 0x%03X,"
command_print(CMD, "stm32f2x user_options 0x%03X,"
" boot_add0 0x%04X, boot_add1 0x%04X",
stm32x_info->option_bytes.user_options,
boot_addr & 0xffff, (boot_addr & 0xffff0000) >> 16);
if (stm32x_info->has_optcr2_pcrop) {
command_print(CMD_CTX, "stm32f2x optcr2_pcrop 0x%08X",
command_print(CMD, "stm32f2x optcr2_pcrop 0x%08X",
stm32x_info->option_bytes.optcr2_pcrop);
}
} else {
command_print(CMD_CTX, "stm32f2x user_options 0x%03X",
command_print(CMD, "stm32f2x user_options 0x%03X",
stm32x_info->option_bytes.user_options);
}
} else {
command_print(CMD_CTX, "stm32f2x user_options 0x%02X",
command_print(CMD, "stm32f2x user_options 0x%02X",
stm32x_info->option_bytes.user_options);
}
@@ -1601,7 +1601,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
uint16_t user_options, boot_addr0, boot_addr1, options_mask;
if (CMD_ARGC < 1) {
command_print(CMD_CTX, "stm32f2x options_write <bank> ...");
command_print(CMD, "stm32f2x options_write <bank> ...");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1616,7 +1616,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
stm32x_info = bank->driver_priv;
if (stm32x_info->has_boot_addr) {
if (CMD_ARGC != 4) {
command_print(CMD_CTX, "stm32f2x options_write <bank> <user_options>"
command_print(CMD, "stm32f2x options_write <bank> <user_options>"
" <boot_addr0> <boot_addr1>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1625,7 +1625,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
stm32x_info->option_bytes.boot_addr = boot_addr0 | (((uint32_t) boot_addr1) << 16);
} else {
if (CMD_ARGC != 2) {
command_print(CMD_CTX, "stm32f2x options_write <bank> <user_options>");
command_print(CMD, "stm32f2x options_write <bank> <user_options>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
}
@@ -1634,14 +1634,14 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
options_mask = !stm32x_info->has_extra_options ? ~0xfc :
~(((0xf00 << (stm32x_info->protection_bits - 12)) | 0xff) & 0xffc);
if (user_options & options_mask) {
command_print(CMD_CTX, "stm32f2x invalid user_options");
command_print(CMD, "stm32f2x invalid user_options");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
stm32x_info->option_bytes.user_options = user_options;
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32f2x failed to write options");
command_print(CMD, "stm32f2x failed to write options");
return ERROR_OK;
}
@@ -1649,7 +1649,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
/* ... and reprogramming of whole flash */
stm32x_info->probed = false;
command_print(CMD_CTX, "stm32f2x write options complete.\n"
command_print(CMD, "stm32f2x write options complete.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");
return retval;
@@ -1663,7 +1663,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
uint32_t optcr2_pcrop;
if (CMD_ARGC != 2) {
command_print(CMD_CTX, "stm32f2x optcr2_write <bank> <optcr2_value>");
command_print(CMD, "stm32f2x optcr2_write <bank> <optcr2_value>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1673,11 +1673,11 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
stm32x_info = bank->driver_priv;
if (!stm32x_info->has_optcr2_pcrop) {
command_print(CMD_CTX, "no optcr2 register");
command_print(CMD, "no optcr2 register");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
command_print(CMD_CTX, "INFO: To disable PCROP, set PCROP_RDP"
command_print(CMD, "INFO: To disable PCROP, set PCROP_RDP"
" with PCROPi bits STILL SET, then\nlock device and"
" finally unlock it. Clears PCROP and mass erases flash.");
@@ -1689,18 +1689,18 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
stm32x_info->option_bytes.optcr2_pcrop = optcr2_pcrop;
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "stm32f2x failed to write options");
command_print(CMD, "stm32f2x failed to write options");
return ERROR_OK;
}
command_print(CMD_CTX, "stm32f2x optcr2_write complete.");
command_print(CMD, "stm32f2x optcr2_write complete.");
return retval;
}
COMMAND_HANDLER(stm32x_handle_otp_command)
{
if (CMD_ARGC < 2) {
command_print(CMD_CTX, "stm32x otp <bank> (enable|disable|show)");
command_print(CMD, "stm32x otp <bank> (enable|disable|show)");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1714,7 +1714,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command)
} else if (strcmp(CMD_ARGV[1], "disable") == 0) {
stm32x_otp_disable(bank);
} else if (strcmp(CMD_ARGV[1], "show") == 0) {
command_print(CMD_CTX,
command_print(CMD,
"OTP memory bank #%d is %s for write commands.",
bank->bank_number,
stm32x_is_otp_unlocked(bank) ? "enabled" : "disabled");
@@ -1722,7 +1722,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command)
return ERROR_COMMAND_SYNTAX_ERROR;
}
} else {
command_print(CMD_CTX, "Failed: not an OTP bank.");
command_print(CMD, "Failed: not an OTP bank.");
}
return retval;
src/flash/nor/stm32h7x.c
+52 -52
View File
@@ -38,18 +38,18 @@
#define FLASH_SR 0x10
#define FLASH_CCR 0x14
#define FLASH_OPTCR 0x18
#define FLASH_OPTCUR 0x1C
#define FLASH_OPTPRG 0x20
#define FLASH_OPTSR_CUR 0x1C
#define FLASH_OPTSR_PRG 0x20
#define FLASH_OPTCCR 0x24
#define FLASH_WPSNCUR 0x38
#define FLASH_WPSNPRG 0x3C
#define FLASH_WPSN_CUR 0x38
#define FLASH_WPSN_PRG 0x3C
/* FLASH_CR register bits */
#define FLASH_LOCK (1 << 0)
#define FLASH_PG (1 << 1)
#define FLASH_SER (1 << 2)
#define FLASH_BER_CMD (1 << 3)
#define FLASH_BER (1 << 3)
#define FLASH_PSIZE_8 (0 << 4)
#define FLASH_PSIZE_16 (1 << 4)
#define FLASH_PSIZE_32 (2 << 4)
@@ -61,6 +61,7 @@
/* FLASH_SR register bits */
#define FLASH_BSY (1 << 0) /* Operation in progress */
#define FLASH_QW (1 << 2) /* Operation queue in progress */
#define FLASH_WRPERR (1 << 17) /* Write protection error */
#define FLASH_PGSERR (1 << 18) /* Programming sequence error */
#define FLASH_STRBERR (1 << 19) /* Strobe error */
@@ -114,7 +115,6 @@ struct stm32h7x_part_info {
const struct stm32h7x_rev *revs;
size_t num_revs;
unsigned int page_size;
unsigned int pages_per_sector;
uint16_t max_flash_size_kb;
uint8_t has_dual_bank;
uint16_t first_bank_size_kb; /* Used when has_dual_bank is true */
@@ -132,7 +132,7 @@ struct stm32h7x_flash_bank {
};
static const struct stm32h7x_rev stm32_450_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" },
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2001, "X" },
};
static const struct stm32h7x_part_info stm32h7x_parts[] = {
@@ -140,7 +140,7 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
.id = 0x450,
.revs = stm32_450_revs,
.num_revs = ARRAY_SIZE(stm32_450_revs),
.device_str = "STM32H7xx 2M",
.device_str = "STM32H74x/75x",
.page_size = 128, /* 128 KB */
.max_flash_size_kb = 2048,
.first_bank_size_kb = 1024,
@@ -184,33 +184,33 @@ static inline int stm32x_get_flash_status(struct flash_bank *bank, uint32_t *sta
return target_read_u32(target, stm32x_get_flash_reg(bank, FLASH_SR), status);
}
static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
static int stm32x_wait_flash_op_queue(struct flash_bank *bank, int timeout)
{
struct target *target = bank->target;
struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
uint32_t status;
int retval;
/* wait for busy to clear */
/* wait for flash operations completion */
for (;;) {
retval = stm32x_get_flash_status(bank, &status);
if (retval != ERROR_OK) {
LOG_INFO("wait_status_busy, target_read_u32 : error : remote address 0x%x", stm32x_info->flash_base);
LOG_INFO("wait_flash_op_queue, target_read_u32 : error : remote address 0x%x", stm32x_info->flash_base);
return retval;
}
if ((status & FLASH_BSY) == 0)
if ((status & FLASH_QW) == 0)
break;
if (timeout-- <= 0) {
LOG_INFO("wait_status_busy, time out expired, status: 0x%" PRIx32 "", status);
LOG_INFO("wait_flash_op_queue, time out expired, status: 0x%" PRIx32 "", status);
return ERROR_FAIL;
}
alive_sleep(1);
}
if (status & FLASH_WRPERR) {
LOG_INFO("wait_status_busy, WRPERR : error : remote address 0x%x", stm32x_info->flash_base);
LOG_INFO("wait_flash_op_queue, WRPERR : error : remote address 0x%x", stm32x_info->flash_base);
retval = ERROR_FAIL;
}
@@ -313,7 +313,7 @@ static int stm32x_read_options(struct flash_bank *bank)
stm32x_info = bank->driver_priv;
/* read current option bytes */
int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCUR, &optiondata);
int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_CUR, &optiondata);
if (retval != ERROR_OK)
return retval;
@@ -321,19 +321,19 @@ static int stm32x_read_options(struct flash_bank *bank)
stm32x_info->option_bytes.user_options = optiondata & 0xfc;
stm32x_info->option_bytes.RDP = (optiondata >> 8) & 0xff;
stm32x_info->option_bytes.user2_options = (optiondata >> 16) & 0xff;
stm32x_info->option_bytes.user3_options = (optiondata >> 24) & 0x83;
stm32x_info->option_bytes.user3_options = (optiondata >> 24) & 0xa3;
if (stm32x_info->option_bytes.RDP != 0xAA)
LOG_INFO("Device Security Bit Set");
/* read current WPSN option bytes */
retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNCUR, &optiondata);
retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_CUR, &optiondata);
if (retval != ERROR_OK)
return retval;
stm32x_info->option_bytes.protection = optiondata & 0xff;
/* read current WPSN2 option bytes */
retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNCUR, &optiondata);
retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_CUR, &optiondata);
if (retval != ERROR_OK)
return retval;
stm32x_info->option_bytes.protection2 = optiondata & 0xff;
@@ -357,30 +357,30 @@ static int stm32x_write_options(struct flash_bank *bank)
optiondata = stm32x_info->option_bytes.user_options;
optiondata |= (stm32x_info->option_bytes.RDP << 8);
optiondata |= (stm32x_info->option_bytes.user2_options & 0xff) << 16;
optiondata |= (stm32x_info->option_bytes.user3_options & 0x83) << 24;
optiondata |= (stm32x_info->option_bytes.user3_options & 0xa3) << 24;
/* program options */
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTPRG, optiondata);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_PRG, optiondata);
if (retval != ERROR_OK)
return retval;
optiondata = stm32x_info->option_bytes.protection & 0xff;
/* Program protection WPSNPRG */
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNPRG, optiondata);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_PRG, optiondata);
if (retval != ERROR_OK)
return retval;
optiondata = stm32x_info->option_bytes.protection2 & 0xff;
/* Program protection WPSNPRG2 */
retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNPRG, optiondata);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_PRG, optiondata);
if (retval != ERROR_OK)
return retval;
optiondata = 0x40000000;
/* Remove OPT error flag before programming */
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCCR, optiondata);
if (retval != ERROR_OK)
return retval;
if (retval != ERROR_OK)
return retval;
/* start programming cycle */
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCR, OPT_START);
@@ -393,14 +393,14 @@ static int stm32x_write_options(struct flash_bank *bank)
uint32_t status;
retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_SR, &status);
if (retval != ERROR_OK) {
LOG_INFO("stm32x_write_options: wait_status_busy : error");
LOG_INFO("stm32x_write_options: wait_flash_op_queue : error");
return retval;
}
if ((status & FLASH_BSY) == 0)
if ((status & FLASH_QW) == 0)
break;
if (timeout-- <= 0) {
LOG_INFO("wait_status_busy, time out expired, status: 0x%" PRIx32 "", status);
LOG_INFO("wait_flash_op_queue, time out expired, status: 0x%" PRIx32 "", status);
return ERROR_FAIL;
}
alive_sleep(1);
@@ -459,12 +459,12 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
/*
Sector Erase
To erase a sector, follow the procedure below:
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the
1. Check that no Flash memory operation is ongoing by checking the QW bit in the
FLASH_SR register
2. Set the SER bit and select the sector
you wish to erase (SNB) in the FLASH_CR register
3. Set the STRT bit in the FLASH_CR register
4. Wait for the BSY bit to be cleared
4. Wait for flash operations completion
*/
for (int i = first; i <= last; i++) {
LOG_DEBUG("erase sector %d", i);
@@ -480,7 +480,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
LOG_ERROR("Error erase sector %d", i);
return retval;
}
retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
retval = stm32x_wait_flash_op_queue(bank, FLASH_ERASE_TIMEOUT);
if (retval != ERROR_OK) {
LOG_ERROR("erase time-out or operation error sector %d", i);
@@ -687,11 +687,11 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
/*
Standard programming
The Flash memory programming sequence is as follows:
1. Check that no main Flash memory operation is ongoing by checking the BSY bit in the
1. Check that no main Flash memory operation is ongoing by checking the QW bit in the
FLASH_SR register.
2. Set the PG bit in the FLASH_CR register
3. 8 x Word access (or Force Write FW)
4. Wait for the BSY bit to be cleared
4. Wait for flash operations completion
*/
while (blocks_remaining > 0) {
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_PG | FLASH_PSIZE_64);
@@ -702,7 +702,7 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
if (retval != ERROR_OK)
goto flash_lock;
retval = stm32x_wait_status_busy(bank, FLASH_WRITE_TIMEOUT);
retval = stm32x_wait_flash_op_queue(bank, FLASH_WRITE_TIMEOUT);
if (retval != ERROR_OK)
goto flash_lock;
@@ -725,7 +725,7 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
if (retval != ERROR_OK)
goto flash_lock;
retval = stm32x_wait_status_busy(bank, FLASH_WRITE_TIMEOUT);
retval = stm32x_wait_flash_op_queue(bank, FLASH_WRITE_TIMEOUT);
if (retval != ERROR_OK)
goto flash_lock;
}
@@ -951,7 +951,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
}
if (stm32x_read_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to read options",
command_print(CMD, "%s failed to read options",
bank->driver->name);
return ERROR_OK;
}
@@ -959,11 +959,11 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
stm32x_info->option_bytes.RDP = 0;
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to lock device",
command_print(CMD, "%s failed to lock device",
bank->driver->name);
return ERROR_OK;
}
command_print(CMD_CTX, "%s locked", bank->driver->name);
command_print(CMD, "%s locked", bank->driver->name);
return ERROR_OK;
}
@@ -997,7 +997,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
}
if (stm32x_read_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
command_print(CMD, "%s failed to read options", bank->driver->name);
return ERROR_OK;
}
@@ -1006,10 +1006,10 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
stm32x_info->option_bytes.RDP = 0xAA;
if (stm32x_write_options(bank) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
command_print(CMD, "%s failed to unlock device", bank->driver->name);
return ERROR_OK;
}
command_print(CMD_CTX, "%s unlocked.\n", bank->driver->name);
command_print(CMD, "%s unlocked.\n", bank->driver->name);
return ERROR_OK;
}
@@ -1029,16 +1029,16 @@ static int stm32x_mass_erase(struct flash_bank *bank)
return retval;
/* mass erase flash memory bank */
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER_CMD | FLASH_PSIZE_64);
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER | FLASH_PSIZE_64);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR),
FLASH_BER_CMD | FLASH_PSIZE_64 | FLASH_START);
FLASH_BER | FLASH_PSIZE_64 | FLASH_START);
if (retval != ERROR_OK)
return retval;
retval = stm32x_wait_status_busy(bank, 30000);
retval = stm32x_wait_flash_op_queue(bank, 30000);
if (retval != ERROR_OK)
return retval;
@@ -1055,7 +1055,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
int i;
if (CMD_ARGC < 1) {
command_print(CMD_CTX, "stm32h7x mass_erase <bank>");
command_print(CMD, "stm32h7x mass_erase <bank>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -1070,9 +1070,9 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "stm32h7x mass erase complete");
command_print(CMD, "stm32h7x mass erase complete");
} else {
command_print(CMD_CTX, "stm32h7x mass erase failed");
command_print(CMD, "stm32h7x mass erase failed");
}
return retval;
src/flash/nor/stm32l4x.c
+10 -10
View File
@@ -835,7 +835,7 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
uint32_t action;
if (CMD_ARGC < 1) {
command_print(CMD_CTX, "stm32l4x mass_erase <STM32L4 bank>");
command_print(CMD, "stm32l4x mass_erase <STM32L4 bank>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -851,9 +851,9 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "stm32l4x mass erase complete");
command_print(CMD, "stm32l4x mass erase complete");
} else {
command_print(CMD_CTX, "stm32l4x mass erase failed");
command_print(CMD, "stm32l4x mass erase failed");
}
return retval;
@@ -862,7 +862,7 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
COMMAND_HANDLER(stm32l4_handle_option_read_command)
{
if (CMD_ARGC < 2) {
command_print(CMD_CTX, "stm32l4x option_read <STM32L4 bank> <option_reg offset>");
command_print(CMD, "stm32l4x option_read <STM32L4 bank> <option_reg offset>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -880,7 +880,7 @@ COMMAND_HANDLER(stm32l4_handle_option_read_command)
if (ERROR_OK != retval)
return retval;
command_print(CMD_CTX, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", reg_addr, value);
command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", reg_addr, value);
return retval;
}
@@ -888,7 +888,7 @@ COMMAND_HANDLER(stm32l4_handle_option_read_command)
COMMAND_HANDLER(stm32l4_handle_option_write_command)
{
if (CMD_ARGC < 3) {
command_print(CMD_CTX, "stm32l4x option_write <STM32L4 bank> <option_reg offset> <value> [mask]");
command_print(CMD, "stm32l4x option_write <STM32L4 bank> <option_reg offset> <value> [mask]");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -906,7 +906,7 @@ COMMAND_HANDLER(stm32l4_handle_option_write_command)
if (CMD_ARGC > 3)
mask = strtoul(CMD_ARGV[3], NULL, 16);
command_print(CMD_CTX, "%s Option written.\n"
command_print(CMD, "%s Option written.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.", bank->driver->name);
@@ -937,7 +937,7 @@ COMMAND_HANDLER(stm32l4_handle_option_load_command)
/* Write the OBLLAUNCH bit in CR -> Cause device "POR" and option bytes reload */
retval = target_write_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_OBLLAUNCH);
command_print(CMD_CTX, "stm32l4x option load (POR) completed.");
command_print(CMD, "stm32l4x option load (POR) completed.");
return retval;
}
@@ -962,7 +962,7 @@ COMMAND_HANDLER(stm32l4_handle_lock_command)
/* set readout protection level 1 by erasing the RDP option byte */
if (stm32l4_write_option(bank, STM32_FLASH_OPTR, 0, 0x000000FF) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to lock device", bank->driver->name);
command_print(CMD, "%s failed to lock device", bank->driver->name);
return ERROR_OK;
}
@@ -989,7 +989,7 @@ COMMAND_HANDLER(stm32l4_handle_unlock_command)
}
if (stm32l4_write_option(bank, STM32_FLASH_OPTR, RDP_LEVEL_0, 0x000000FF) != ERROR_OK) {
command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
command_print(CMD, "%s failed to unlock device", bank->driver->name);
return ERROR_OK;
}
src/flash/nor/stm32lx.c
+6 -6
View File
@@ -324,9 +324,9 @@ COMMAND_HANDLER(stm32lx_handle_mass_erase_command)
for (i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_erased = 1;
command_print(CMD_CTX, "stm32lx mass erase complete");
command_print(CMD, "stm32lx mass erase complete");
} else {
command_print(CMD_CTX, "stm32lx mass erase failed");
command_print(CMD, "stm32lx mass erase failed");
}
return retval;
@@ -345,9 +345,9 @@ COMMAND_HANDLER(stm32lx_handle_lock_command)
retval = stm32lx_lock(bank);
if (retval == ERROR_OK)
command_print(CMD_CTX, "STM32Lx locked, takes effect after power cycle.");
command_print(CMD, "STM32Lx locked, takes effect after power cycle.");
else
command_print(CMD_CTX, "STM32Lx lock failed");
command_print(CMD, "STM32Lx lock failed");
return retval;
}
@@ -365,9 +365,9 @@ COMMAND_HANDLER(stm32lx_handle_unlock_command)
retval = stm32lx_unlock(bank);
if (retval == ERROR_OK)
command_print(CMD_CTX, "STM32Lx unlocked, takes effect after power cycle.");
command_print(CMD, "STM32Lx unlocked, takes effect after power cycle.");
else
command_print(CMD_CTX, "STM32Lx unlock failed");
command_print(CMD, "STM32Lx unlock failed");
return retval;
}
src/flash/nor/str9xpec.c
+18 -17
View File
@@ -746,7 +746,7 @@ COMMAND_HANDLER(str9xpec_handle_part_id_command)
idcode = buf_get_u32(buffer, 0, 32);
command_print(CMD_CTX, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
command_print(CMD, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
free(buffer);
@@ -780,33 +780,33 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_read_command)
/* boot bank */
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1))
command_print(CMD_CTX, "CS Map: bank1");
command_print(CMD, "CS Map: bank1");
else
command_print(CMD_CTX, "CS Map: bank0");
command_print(CMD, "CS Map: bank0");
/* OTP lock */
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1))
command_print(CMD_CTX, "OTP Lock: OTP Locked");
command_print(CMD, "OTP Lock: OTP Locked");
else
command_print(CMD_CTX, "OTP Lock: OTP Unlocked");
command_print(CMD, "OTP Lock: OTP Unlocked");
/* LVD Threshold */
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1))
command_print(CMD_CTX, "LVD Threshold: 2.7v");
command_print(CMD, "LVD Threshold: 2.7v");
else
command_print(CMD_CTX, "LVD Threshold: 2.4v");
command_print(CMD, "LVD Threshold: 2.4v");
/* LVD reset warning */
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1))
command_print(CMD_CTX, "LVD Reset Warning: VDD or VDDQ Inputs");
command_print(CMD, "LVD Reset Warning: VDD or VDDQ Inputs");
else
command_print(CMD_CTX, "LVD Reset Warning: VDD Input Only");
command_print(CMD, "LVD Reset Warning: VDD Input Only");
/* LVD reset select */
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1))
command_print(CMD_CTX, "LVD Reset Selection: VDD or VDDQ Inputs");
command_print(CMD, "LVD Reset Selection: VDD or VDDQ Inputs");
else
command_print(CMD_CTX, "LVD Reset Selection: VDD Input Only");
command_print(CMD, "LVD Reset Selection: VDD Input Only");
return ERROR_OK;
}
@@ -885,7 +885,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_write_command)
if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
return ERROR_FLASH_OPERATION_FAILED;
command_print(CMD_CTX, "str9xpec write options complete.\n"
command_print(CMD, "str9xpec write options complete.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");
@@ -1017,7 +1017,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_unlock_command)
if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
return ERROR_FLASH_OPERATION_FAILED;
command_print(CMD_CTX, "str9xpec unlocked.\n"
command_print(CMD, "str9xpec unlocked.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");
@@ -1045,19 +1045,19 @@ COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command)
tap0 = str9xpec_info->tap;
if (tap0 == NULL) {
/* things are *WRONG* */
command_print(CMD_CTX, "**STR9FLASH** (tap0) invalid chain?");
command_print(CMD, "**STR9FLASH** (tap0) invalid chain?");
return ERROR_FAIL;
}
tap1 = tap0->next_tap;
if (tap1 == NULL) {
/* things are *WRONG* */
command_print(CMD_CTX, "**STR9FLASH** (tap1) invalid chain?");
command_print(CMD, "**STR9FLASH** (tap1) invalid chain?");
return ERROR_FAIL;
}
tap2 = tap1->next_tap;
if (tap2 == NULL) {
/* things are *WRONG* */
command_print(CMD_CTX, "**STR9FLASH** (tap2) invalid chain?");
command_print(CMD, "**STR9FLASH** (tap2) invalid chain?");
return ERROR_FAIL;
}
@@ -1177,9 +1177,10 @@ static const struct command_registration str9xpec_config_command_handlers[] = {
},
{
.name = "part_id",
.usage = "<bank>",
.handler = str9xpec_handle_part_id_command,
.mode = COMMAND_EXEC,
.help = "print part id of str9xpec flash bank <num>",
.help = "print part id of str9xpec flash bank",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/swm050.c
+211
View File
@@ -0,0 +1,211 @@
/***************************************************************************
* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io> *
* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "imp.h"
#include <target/image.h>
#define SWM050_DELAY 100
#define SWM050_FLASH_PAGE_SIZE 0x200
#define SWM050_FLASH_PAGES 16
#define SWM050_CPU_ID 0xE000ED00
#define SWM050_CPU_ID_VAL 0x410CC200
#define SWM050_FLASH_REG1 0x1F000000
#define SWM050_FLASH_REG2 0x1F000038
#define SWM050_FLASH_KEY 0xAAAAAAAA
#define SWM050_SYSCTL_CFG_0 0x400F0000
#define SWM050_SYSCTL_DBLF 0x400F0008
static int swm050_erase(struct flash_bank *bank, int first, int last)
{
struct target *target = bank->target;
int retval, curr_page;
uint32_t curr_addr;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* Perform erase */
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x4);
if (retval != ERROR_OK)
return retval;
for (curr_page = first; curr_page <= last; curr_page++) {
curr_addr = bank->base + (SWM050_FLASH_PAGE_SIZE * curr_page);
/* Perform write */
retval = target_write_u32(target, curr_addr, SWM050_FLASH_KEY);
if (retval != ERROR_OK)
return retval;
alive_sleep(SWM050_DELAY);
}
/* Close flash interface */
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
static int swm050_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
int retval;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
retval = ERROR_TARGET_NOT_HALTED;
return retval;
}
/* Perform write */
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x1);
if (retval != ERROR_OK)
return retval;
retval = target_write_memory(target, bank->base + offset, 4, count/4, buffer);
if (retval != ERROR_OK)
return retval;
/* Close flash interface */
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
static int swm050_probe(struct flash_bank *bank)
{
return ERROR_OK;
}
static int swm050_mass_erase(struct flash_bank *bank)
{
struct target *target = bank->target;
int retval;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
/* Perform mass erase */
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x6);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, SWM050_FLASH_REG2, 0x1);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, 0x0, SWM050_FLASH_KEY);
if (retval != ERROR_OK)
return retval;
alive_sleep(SWM050_DELAY);
/* Close flash interface */
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
COMMAND_HANDLER(swm050_handle_mass_erase_command)
{
if (CMD_ARGC < 1)
return ERROR_COMMAND_SYNTAX_ERROR;
struct flash_bank *bank;
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
if (ERROR_OK != retval)
return retval;
retval = swm050_mass_erase(bank);
if (retval == ERROR_OK)
command_print(CMD, "swm050 mass erase complete");
else
command_print(CMD, "swm050 mass erase failed");
return retval;
}
FLASH_BANK_COMMAND_HANDLER(swm050_flash_bank_command)
{
if (bank->sectors) {
free(bank->sectors);
bank->sectors = NULL;
}
bank->write_start_alignment = 4;
bank->write_end_alignment = 4;
bank->size = SWM050_FLASH_PAGE_SIZE * SWM050_FLASH_PAGES;
bank->num_sectors = SWM050_FLASH_PAGES;
bank->sectors = alloc_block_array(0, SWM050_FLASH_PAGE_SIZE, SWM050_FLASH_PAGES);
if (!bank->sectors)
return ERROR_FAIL;
for (int i = 0; i < bank->num_sectors; i++)
bank->sectors[i].is_protected = 0;
return ERROR_OK;
}
static const struct command_registration swm050_exec_command_handlers[] = {
{
.name = "mass_erase",
.handler = swm050_handle_mass_erase_command,
.mode = COMMAND_EXEC,
.usage = "bank_id",
.help = "Erase entire flash device.",
},
COMMAND_REGISTRATION_DONE
};
static const struct command_registration swm050_command_handlers[] = {
{
.name = "swm050",
.mode = COMMAND_ANY,
.help = "swm050 flash command group",
.usage = "",
.chain = swm050_exec_command_handlers,
},
COMMAND_REGISTRATION_DONE
};
struct flash_driver swm050_flash = {
.name = "swm050",
.commands = swm050_command_handlers,
.flash_bank_command = swm050_flash_bank_command,
.erase = swm050_erase,
.write = swm050_write,
.read = default_flash_read,
.probe = swm050_probe,
.auto_probe = swm050_probe,
.erase_check = default_flash_blank_check,
.free_driver_priv = default_flash_free_driver_priv,
};
src/flash/nor/tcl.c
+33 -30
View File
@@ -111,7 +111,7 @@ COMMAND_HANDLER(handle_flash_info_command)
if (retval == ERROR_FLASH_OPER_UNSUPPORTED)
LOG_WARNING("Flash protection check is not implemented.");
command_print(CMD_CTX,
command_print(CMD,
"#%d : %s at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32
", buswidth %i, chipwidth %i",
p->bank_number,
@@ -140,7 +140,7 @@ COMMAND_HANDLER(handle_flash_info_command)
else if (!show_sectors || !prot_block_available)
protect_state = "protection state unknown";
command_print(CMD_CTX,
command_print(CMD,
"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
j,
block_array[j].offset,
@@ -152,7 +152,7 @@ COMMAND_HANDLER(handle_flash_info_command)
if (p->driver->info != NULL) {
retval = p->driver->info(p, buf, sizeof(buf));
if (retval == ERROR_OK)
command_print(CMD_CTX, "%s", buf);
command_print(CMD, "%s", buf);
else
LOG_ERROR("error retrieving flash info");
}
@@ -176,12 +176,12 @@ COMMAND_HANDLER(handle_flash_probe_command)
if (p) {
retval = p->driver->probe(p);
if (retval == ERROR_OK)
command_print(CMD_CTX,
command_print(CMD,
"flash '%s' found at " TARGET_ADDR_FMT,
p->driver->name,
p->base);
} else {
command_print(CMD_CTX, "flash bank '#%s' is out of bounds", CMD_ARGV[0]);
command_print(CMD, "flash bank '#%s' is out of bounds", CMD_ARGV[0]);
retval = ERROR_FAIL;
}
@@ -202,9 +202,9 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
int j;
retval = p->driver->erase_check(p);
if (retval == ERROR_OK)
command_print(CMD_CTX, "successfully checked erase state");
command_print(CMD, "successfully checked erase state");
else {
command_print(CMD_CTX,
command_print(CMD,
"unknown error when checking erase state of flash bank #%s at "
TARGET_ADDR_FMT,
CMD_ARGV[0],
@@ -222,7 +222,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
erase_state = "erase state unknown";
blank = false;
command_print(CMD_CTX,
command_print(CMD,
"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
j,
p->sectors[j].offset,
@@ -232,7 +232,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
}
if (blank)
command_print(CMD_CTX, "\tBank is erased");
command_print(CMD, "\tBank is erased");
return retval;
}
@@ -267,7 +267,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], length);
if (length <= 0) {
command_print(CMD_CTX, "Length must be >0");
command_print(CMD, "Length must be >0");
return ERROR_COMMAND_SYNTAX_ERROR;
}
@@ -289,7 +289,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
retval = flash_erase_address_range(target, do_pad, address, length);
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "erased address " TARGET_ADDR_FMT " (length %"
command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %"
PRIi32 ")"
" in %fs (%0.3f KiB/s)", address, length,
duration_elapsed(&bench), duration_kbps(&bench, length));
@@ -320,13 +320,13 @@ COMMAND_HANDLER(handle_flash_erase_command)
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last);
if (!(first <= last)) {
command_print(CMD_CTX, "ERROR: "
command_print(CMD, "ERROR: "
"first sector must be <= last");
return ERROR_FAIL;
}
if (!(last <= (uint32_t)(p->num_sectors - 1))) {
command_print(CMD_CTX, "ERROR: "
command_print(CMD, "ERROR: "
"last sector must be <= %" PRIu32,
p->num_sectors - 1);
return ERROR_FAIL;
@@ -338,7 +338,7 @@ COMMAND_HANDLER(handle_flash_erase_command)
retval = flash_driver_erase(p, first, last);
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "erased sectors %" PRIu32 " "
command_print(CMD, "erased sectors %" PRIu32 " "
"through %" PRIu32 " on flash bank %d "
"in %fs", first, last, p->bank_number, duration_elapsed(&bench));
}
@@ -377,14 +377,14 @@ COMMAND_HANDLER(handle_flash_protect_command)
COMMAND_PARSE_ON_OFF(CMD_ARGV[3], set);
if (!(first <= last)) {
command_print(CMD_CTX, "ERROR: "
command_print(CMD, "ERROR: "
"first %s must be <= last",
(p->num_prot_blocks) ? "block" : "sector");
return ERROR_FAIL;
}
if (!(last <= (uint32_t)(num_blocks - 1))) {
command_print(CMD_CTX, "ERROR: "
command_print(CMD, "ERROR: "
"last %s must be <= %" PRIu32,
(p->num_prot_blocks) ? "block" : "sector",
num_blocks - 1);
@@ -393,7 +393,7 @@ COMMAND_HANDLER(handle_flash_protect_command)
retval = flash_driver_protect(p, set, first, last);
if (retval == ERROR_OK) {
command_print(CMD_CTX, "%s protection for %s %" PRIu32
command_print(CMD, "%s protection for %s %" PRIu32
" through %" PRIu32 " on flash bank %d",
(set) ? "set" : "cleared",
(p->num_prot_blocks) ? "blocks" : "sectors",
@@ -421,12 +421,12 @@ COMMAND_HANDLER(handle_flash_write_image_command)
auto_erase = 1;
CMD_ARGV++;
CMD_ARGC--;
command_print(CMD_CTX, "auto erase enabled");
command_print(CMD, "auto erase enabled");
} else if (strcmp(CMD_ARGV[0], "unlock") == 0) {
auto_unlock = true;
CMD_ARGV++;
CMD_ARGC--;
command_print(CMD_CTX, "auto unlock enabled");
command_print(CMD, "auto unlock enabled");
} else
break;
}
@@ -463,7 +463,7 @@ COMMAND_HANDLER(handle_flash_write_image_command)
}
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "wrote %" PRIu32 " bytes from file %s "
command_print(CMD, "wrote %" PRIu32 " bytes from file %s "
"in %fs (%0.3f KiB/s)", written, CMD_ARGV[0],
duration_elapsed(&bench), duration_kbps(&bench, written));
}
@@ -602,7 +602,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
}
if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "wrote %" PRIu32 " bytes to " TARGET_ADDR_FMT
command_print(CMD, "wrote %" PRIu32 " bytes to " TARGET_ADDR_FMT
" in %fs (%0.3f KiB/s)", size_bytes, address,
duration_elapsed(&bench), duration_kbps(&bench, size_bytes));
}
@@ -716,7 +716,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
free(buffer);
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
command_print(CMD_CTX, "wrote %zu bytes from file %s to flash bank %u"
command_print(CMD, "wrote %zu bytes from file %s to flash bank %u"
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
length, CMD_ARGV[1], bank->bank_number, offset,
duration_elapsed(&bench), duration_kbps(&bench, length));
@@ -798,7 +798,7 @@ COMMAND_HANDLER(handle_flash_read_bank_command)
}
if (duration_measure(&bench) == ERROR_OK)
command_print(CMD_CTX, "wrote %zd bytes to file %s from flash bank %u"
command_print(CMD, "wrote %zd bytes to file %s from flash bank %u"
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
written, CMD_ARGV[1], p->bank_number, offset,
duration_elapsed(&bench), duration_kbps(&bench, written));
@@ -900,23 +900,23 @@ COMMAND_HANDLER(handle_flash_verify_bank_command)
}
if (duration_measure(&bench) == ERROR_OK)
command_print(CMD_CTX, "read %zd bytes from file %s and flash bank %u"
command_print(CMD, "read %zd bytes from file %s and flash bank %u"
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
length, CMD_ARGV[1], p->bank_number, offset,
duration_elapsed(&bench), duration_kbps(&bench, length));
differ = memcmp(buffer_file, buffer_flash, length);
command_print(CMD_CTX, "contents %s", differ ? "differ" : "match");
command_print(CMD, "contents %s", differ ? "differ" : "match");
if (differ) {
uint32_t t;
int diffs = 0;
for (t = 0; t < length; t++) {
if (buffer_flash[t] == buffer_file[t])
continue;
command_print(CMD_CTX, "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
command_print(CMD, "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
diffs, t + offset, buffer_flash[t], buffer_file[t]);
if (diffs++ >= 127) {
command_print(CMD_CTX, "More than 128 errors, the rest are not printed.");
command_print(CMD, "More than 128 errors, the rest are not printed.");
break;
}
keep_alive();
@@ -952,7 +952,7 @@ COMMAND_HANDLER(handle_flash_padded_value_command)
COMMAND_PARSE_NUMBER(u8, CMD_ARGV[1], p->default_padded_value);
command_print(CMD_CTX, "Default padded value set to 0x%" PRIx8 " for flash bank %u", \
command_print(CMD, "Default padded value set to 0x%" PRIx8 " for flash bank %u", \
p->default_padded_value, p->bank_number);
return retval;
@@ -985,7 +985,7 @@ static const struct command_registration flash_exec_command_handlers[] = {
.name = "erase_sector",
.handler = handle_flash_erase_command,
.mode = COMMAND_EXEC,
.usage = "bank_id first_sector_num last_sector_num",
.usage = "bank_id first_sector_num (last_sector_num|'last')",
.help = "Erase a range of sectors in a flash bank.",
},
{
@@ -1167,7 +1167,7 @@ COMMAND_HANDLER(handle_flash_banks_command)
unsigned n = 0;
for (struct flash_bank *p = flash_bank_list(); p; p = p->next, n++) {
LOG_USER("#%d : %s (%s) at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 ", "
command_print(CMD, "#%d : %s (%s) at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 ", "
"buswidth %u, chipwidth %u", p->bank_number,
p->name, p->driver->name, p->base, p->size,
p->bus_width, p->chip_width);
@@ -1239,12 +1239,14 @@ static const struct command_registration flash_config_command_handlers[] = {
.mode = COMMAND_CONFIG,
.handler = handle_flash_init_command,
.help = "Initialize flash devices.",
.usage = "",
},
{
.name = "banks",
.mode = COMMAND_ANY,
.handler = handle_flash_banks_command,
.help = "Display table with information about flash banks.",
.usage = "",
},
{
.name = "list",
@@ -1260,6 +1262,7 @@ static const struct command_registration flash_command_handlers[] = {
.mode = COMMAND_ANY,
.help = "NOR flash command group",
.chain = flash_config_command_handlers,
.usage = "",
},
COMMAND_REGISTRATION_DONE
};
src/flash/nor/tms470.c
+7 -7
View File
@@ -301,7 +301,7 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
int start = (0 == strncmp(CMD_ARGV[i], "0x", 2)) ? 2 : 0;
if (1 != sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flashKeys[i])) {
command_print(CMD_CTX, "could not process flash key %s",
command_print(CMD, "could not process flash key %s",
CMD_ARGV[i]);
LOG_ERROR("could not process flash key %s", CMD_ARGV[i]);
return ERROR_COMMAND_SYNTAX_ERROR;
@@ -310,19 +310,19 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
keysSet = 1;
} else if (CMD_ARGC != 0) {
command_print(CMD_CTX, "tms470 flash_keyset <key0> <key1> <key2> <key3>");
command_print(CMD, "tms470 flash_keyset <key0> <key1> <key2> <key3>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (keysSet) {
command_print(CMD_CTX,
command_print(CMD,
"using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "",
flashKeys[0],
flashKeys[1],
flashKeys[2],
flashKeys[3]);
} else
command_print(CMD_CTX, "flash keys not set");
command_print(CMD, "flash keys not set");
return ERROR_OK;
}
@@ -352,12 +352,12 @@ COMMAND_HANDLER(tms470_handle_osc_megahertz_command)
if (oscMHz <= 0) {
LOG_ERROR("osc_megahertz must be positive and non-zero!");
command_print(CMD_CTX, "osc_megahertz must be positive and non-zero!");
command_print(CMD, "osc_megahertz must be positive and non-zero!");
oscMHz = 12;
return ERROR_COMMAND_SYNTAX_ERROR;
}
command_print(CMD_CTX, "osc_megahertz=%d", oscMHz);
command_print(CMD, "osc_megahertz=%d", oscMHz);
return ERROR_OK;
}
@@ -375,7 +375,7 @@ COMMAND_HANDLER(tms470_handle_plldis_command)
plldis = plldis ? 1 : 0;
}
command_print(CMD_CTX, "plldis=%d", plldis);
command_print(CMD, "plldis=%d", plldis);
return ERROR_OK;
}
src/flash/nor/xmc4xxx.c
+5 -4
View File
@@ -1284,9 +1284,9 @@ COMMAND_HANDLER(xmc4xxx_handle_flash_password_command)
fb->pw_set = true;
command_print(CMD_CTX, "XMC4xxx flash passwords set to:\n");
command_print(CMD_CTX, "-0x%08"PRIx32"\n", fb->pw1);
command_print(CMD_CTX, "-0x%08"PRIx32"\n", fb->pw2);
command_print(CMD, "XMC4xxx flash passwords set to:\n");
command_print(CMD, "-0x%08"PRIx32"\n", fb->pw1);
command_print(CMD, "-0x%08"PRIx32"\n", fb->pw2);
return ERROR_OK;
}
@@ -1329,7 +1329,8 @@ static const struct command_registration xmc4xxx_exec_command_handlers[] = {
.usage = "bank_id user_level[0-1]",
.help = "Permanently Removes flash protection (read and write) "
"for the specified user level",
}, COMMAND_REGISTRATION_DONE
},
COMMAND_REGISTRATION_DONE
};
static const struct command_registration xmc4xxx_command_handlers[] = {