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armv7m: add generic trace support (TPIU, ITM, etc.)

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This provides support for various trace-related subsystems in a
generic and expandable way.

Change-Id: I3a27fa7b8cfb111753088bb8c3d760dd12d1395f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2538
Tested-by: jenkins
This commit is contained in:
Paul Fertser
2015-02-09 17:04:52 +03:00
committed by Spencer Oliver
parent 3e1dfdcb85
commit a09a75653d
17 changed files with 584 additions and 12 deletions
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src/target/cortex_m.h
+9 -8
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@@ -33,10 +33,11 @@
#define SYSTEM_CONTROL_BASE 0x400FE000
#define ITM_TER 0xE0000E00
#define ITM_TER0 0xE0000E00
#define ITM_TPR 0xE0000E40
#define ITM_TCR 0xE0000E80
#define ITM_LAR 0xE0000FB0
#define ITM_LAR_KEY 0xC5ACCE55
#define CPUID 0xE000ED00
/* Debug Control Block */
@@ -69,13 +70,13 @@
#define FPU_FPCAR 0xE000EF38
#define FPU_FPDSCR 0xE000EF3C
#define TPI_SSPSR 0xE0040000
#define TPI_CSPSR 0xE0040004
#define TPI_ACPR 0xE0040010
#define TPI_SPPR 0xE00400F0
#define TPI_FFSR 0xE0040300
#define TPI_FFCR 0xE0040304
#define TPI_FSCR 0xE0040308
#define TPIU_SSPSR 0xE0040000
#define TPIU_CSPSR 0xE0040004
#define TPIU_ACPR 0xE0040010
#define TPIU_SPPR 0xE00400F0
#define TPIU_FFSR 0xE0040300
#define TPIU_FFCR 0xE0040304
#define TPIU_FSCR 0xE0040308
/* DCB_DHCSR bit and field definitions */
#define DBGKEY (0xA05F << 16)