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tcl/target/max32xxx: Update max32xxx tcl files to use new flashing algorithm

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The max32xxx tcl files have been updated to work with the new flashing
algorithm. A new max32xxx.cfg file contains common configuration and
functionality.

Change-Id: Ifaed58836d221ece6192faafa382b30fb72c77a6
Signed-off-by: Henrik Mau <henrik.mau@analog.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8976
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Henrik Mau
2025-06-30 10:48:04 +01:00
committed by Antonio Borneo
parent ff550ed0b0
commit a0ee225618
4 changed files with 189 additions and 73 deletions
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58
tcl/target/max3263x.cfg
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@@ -1,32 +1,40 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# Maxim Integrated MAX3263X OpenOCD target configuration file
# www.maximintegrated.com
# adapter speed
adapter speed 4000
# Set the reset pin configuration
reset_config none
# reset pin configuration
reset_config srst_only
# Set flash parameters
set FLASH_BASE 0x0
set FLASH_SIZE 0x200000
set FLC_BASE 0x40002000
set FLASH_SECTOR 0x2000
set FLASH_CLK 96
set FLASH_OPTIONS 0x00
if {[using_jtag]} {
jtag newtap max3263x cpu -irlen 4 -irmask 0xf -expected-id 0x4ba00477 -ignore-version
jtag newtap maxtest tap -irlen 4 -irmask 0xf -ircapture 0x1 -expected-id 0x07f76197 -ignore-version
} else {
swd newdap max3263x cpu -irlen 4 -irmask 0xf -expected-id 0x2ba01477 -ignore-version
# Setup the reserved TAP
set RSV_TAP 1
source [find target/max32xxx_common.cfg]
# Create custom reset sequence
$_CHIPNAME.cpu configure -event reset-init {
# Reset the peripherals
mww 0x40000848 0xFFFFFFFF
mww 0x4000084C 0xFFFFFFFF
sleep 10
mww 0x40000848 0x0
mww 0x4000084C 0x0
# Reset the SP
set SP_ADDR [mrw 0x0]
reg sp $SP_ADDR
# Reset the PC to the Reset_Handler
set RESET_HANDLER_ADDR [mrw 0x4]
reg pc $RESET_HANDLER_ADDR
}
dap create max3263x.dap -chain-position max3263x.cpu
# target configuration
target create max3263x.cpu cortex_m -dap max3263x.dap
max3263x.cpu configure -work-area-phys 0x20005000 -work-area-size 0x2000
# Config Command: flash bank name driver base size chip_width bus_width target [driver_options]
# flash bank <name> max32xxx <base> <size> 0 0 <target> <flc base> <sector> <clk> <burst>
# max3263x flash base address 0x00000000
# max3263x flash size 0x200000 (2MB)
# max3263x FLC base address 0x40002000
# max3263x sector (page) size 0x2000 (8kB)
# max3263x clock speed 96 (MHz)
flash bank max3263x.flash max32xxx 0x00000000 0x200000 0 0 max3263x.cpu 0x40002000 0x2000 96