Add ARM v8 AArch64 semihosting support
This patch implements semihosting support for AArch64. This picks code from previously submitted AArch64 semihosting support patch and rebases on top of reworked semihosting code. Tested in AArch64 mode on a Lemaker Hikey Board with NewLib and GDB. Change-Id: I228a38f1de24f79e49ba99d8514d822a28c2950b Signed-off-by: Omair Javaid <omair.javaid@linaro.org> Reviewed-on: http://openocd.zylin.com/4537 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
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Matthias Welwarsky
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d04254196e
commit
a7da117ad6
@@ -113,6 +113,12 @@ enum {
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ARMV8_LAST_REG,
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};
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enum run_control_op {
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ARMV8_RUNCONTROL_UNKNOWN = 0,
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ARMV8_RUNCONTROL_RESUME = 1,
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ARMV8_RUNCONTROL_HALT = 2,
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ARMV8_RUNCONTROL_STEP = 3,
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};
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#define ARMV8_COMMON_MAGIC 0x0A450AAA
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@@ -210,6 +216,9 @@ struct armv8_common {
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struct arm_cti *cti;
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/* last run-control command issued to this target (resume, halt, step) */
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enum run_control_op last_run_control_op;
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/* Direct processor core register read and writes */
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int (*read_reg_u64)(struct armv8_common *armv8, int num, uint64_t *value);
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int (*write_reg_u64)(struct armv8_common *armv8, int num, uint64_t value);
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@@ -232,6 +241,11 @@ target_to_armv8(struct target *target)
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return container_of(target->arch_info, struct armv8_common, arm);
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}
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static inline bool is_armv8(struct armv8_common *armv8)
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{
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return armv8->common_magic == ARMV8_COMMON_MAGIC;
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}
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/* register offsets from armv8.debug_base */
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#define CPUV8_DBG_MAINID0 0xD00
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#define CPUV8_DBG_CPUFEATURE0 0xD20
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