auracaster/openocd
3
0
Fork 1
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state

Browse Source 
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
    Writes to EDITR trigger the instruction to be executed if the PE
    is in Debug state:
      - If the PE is in AArch64 state, this is an A64 instruction.
      - If the PE is in AArch32 state, this is a T32 instruction

But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.

Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.

Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Tarek BOCHKATI
2019-12-09 12:47:07 +01:00
committed by Antonio Borneo
parent a154973896
commit a8b1bd8376
2 changed files with 15 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/target/armv8_opcodes.c
View File

@@ -68,13 +68,13 @@ static const uint32_t t32_opcodes[ARMV8_OPC_NUM] = {
[ARMV8_OPC_DCCISW] = ARMV4_5_MCR(15, 0, 0, 7, 14, 2),
[ARMV8_OPC_DCCIVAC] = ARMV4_5_MCR(15, 0, 0, 7, 14, 1),
[ARMV8_OPC_ICIVAU] = ARMV4_5_MCR(15, 0, 0, 7, 5, 1),
[ARMV8_OPC_HLT] = ARMV8_HLT_A1(11),
[ARMV8_OPC_LDRB_IP] = ARMV4_5_LDRB_IP(1, 0),
[ARMV8_OPC_LDRH_IP] = ARMV4_5_LDRH_IP(1, 0),
[ARMV8_OPC_LDRW_IP] = ARMV4_5_LDRW_IP(1, 0),
[ARMV8_OPC_STRB_IP] = ARMV4_5_STRB_IP(1, 0),
[ARMV8_OPC_STRH_IP] = ARMV4_5_STRH_IP(1, 0),
[ARMV8_OPC_STRW_IP] = ARMV4_5_STRW_IP(1, 0),
[ARMV8_OPC_HLT] = ARMV8_HLT_T1(11),
[ARMV8_OPC_LDRB_IP] = ARMV8_LDRB_IP_T3(1, 0),
[ARMV8_OPC_LDRH_IP] = ARMV8_LDRH_IP_T3(1, 0),
[ARMV8_OPC_LDRW_IP] = ARMV8_LDRW_IP_T3(1, 0),
[ARMV8_OPC_STRB_IP] = ARMV8_STRB_IP_T3(1, 0),
[ARMV8_OPC_STRH_IP] = ARMV8_STRH_IP_T3(1, 0),
[ARMV8_OPC_STRW_IP] = ARMV8_STRW_IP_T3(1, 0),
};
void armv8_select_opcodes(struct armv8_common *armv8, bool state_is_aarch64)