From b04c6cb3eda7ff9a0d34e600cd2e1bb72f71aa1b Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Thu, 30 Mar 2017 19:28:44 -0700 Subject: [PATCH] riscv: Implement the assert/deassert reset functions for v13 --- src/target/riscv/riscv-013.c | 10 ++++++++-- src/target/riscv/riscv.c | 3 +++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 2cd186d22..17201d61f 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1817,12 +1817,18 @@ static int riscv013_resume(struct target *target, int current, uint32_t address, static int assert_reset(struct target *target) { - return ERROR_FAIL; + select_dmi(target); + dmi_write(target, DMI_DMCONTROL, + DMI_DMCONTROL_DMACTIVE | DMI_DMCONTROL_NDMRESET); + return ERROR_OK; } static int deassert_reset(struct target *target) { - return ERROR_FAIL; + select_dmi(target); + dmi_write(target, DMI_DMCONTROL, + DMI_DMCONTROL_DMACTIVE); + return ERROR_OK; } static int read_memory(struct target *target, uint32_t address, diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 87c808e5c..ef6bca80d 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -310,6 +310,7 @@ static int riscv_examine(struct target *target) { LOG_DEBUG("riscv_examine()"); if (target_was_examined(target)) { + LOG_DEBUG("Target was already examined.\n"); return ERROR_OK; } @@ -348,12 +349,14 @@ static int riscv_resume(struct target *target, int current, uint32_t address, static int riscv_assert_reset(struct target *target) { + LOG_DEBUG("RISCV ASSERT RESET"); struct target_type *tt = get_target_type(target); return tt->assert_reset(target); } static int riscv_deassert_reset(struct target *target) { + LOG_DEBUG("RISCV DEASSERT RESET"); struct target_type *tt = get_target_type(target); return tt->deassert_reset(target); }