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aarch64: add 'maskisr' command

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Allow to configure ISR masking during single-step and add
handling for stepping over WFI with ISR masked.

Change-Id: I7918be7bcda6a1d9badac44fc36c59b52f662fef
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4023
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This commit is contained in:
Matthias Welwarsky
2017-02-27 17:10:19 +01:00
committed by Matthias Welwarsky
parent f7836bbc75
commit b3d29cb544
3 changed files with 64 additions and 8 deletions
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doc/openocd.texi
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@@ -8418,6 +8418,11 @@ halting or resuming of all cores in the group. The command @code{target smp} def
group. With SMP handling disabled, all targets need to be treated individually.
@end deffn
@deffn Command {aarch64 maskisr} [@option{on}|@option{off}]
Selects whether interrupts will be processed when single stepping. The default configuration is
@option{on}.
@end deffn
@section Intel Architecture
Intel Quark X10xx is the first product in the Quark family of SoCs. It is an IA-32