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rename jtag_nsrst_delay as adapter_nsrst_delay

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Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ...  it needs to be used with non-JTAG
transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
2010-03-15 08:41:30 -07:00
parent 96f9790279
commit b559b273b5
56 changed files with 72 additions and 70 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
tcl/board/at91sam9g20-ek.cfg
View File

@@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
# affected by the board and type of JTAG adapter. A value of 200 ms seems
# to work reliably for the configuration listed in the file header above.
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 200
# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).

2
tcl/board/crossbow_tech_imote2.cfg
View File

@@ -4,7 +4,7 @@ set CHIPNAME imote2
source [find target/pxa270.cfg]
# longer-than-normal reset delay
jtag_nsrst_delay 800
adapter_nsrst_delay 800
reset_config trst_and_srst separate

2
tcl/board/csb732.cfg
View File

@@ -3,7 +3,7 @@ source [find target/imx35.cfg]
# Determined by trial and error
reset_config trst_and_srst combined
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 200
$_TARGETNAME configure -event gdb-attach { reset init }

2
tcl/board/digi_connectcore_wi-9c.cfg
View File

@@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
set _TARGETNAME $_CHIPNAME.cpu
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 0

2
tcl/board/ek-lm3s1968.cfg
View File

@@ -16,7 +16,7 @@ source [find target/lm3s1968.cfg]
# jtag speed
adapter_khz 3000
jtag_nsrst_delay 100
adapter_nsrst_delay 100
#LM3S1968 Evaluation Board has only srst
reset_config srst_only

2
tcl/board/ek-lm3s811.cfg
View File

@@ -12,7 +12,7 @@ source [find target/lm3s811.cfg]
# jtag speed
adapter_khz 500
jtag_nsrst_delay 100
adapter_nsrst_delay 100
#LM3S811 Evaluation Board has only srst
reset_config srst_only

2
tcl/board/ek-lm3s9b9x.cfg
View File

@@ -11,7 +11,7 @@ source [find target/lm3s9b9x.cfg]
# jtag speed
adapter_khz 500
jtag_nsrst_delay 100
adapter_nsrst_delay 100
#LM3S9B9x Evaluation Board has only srst
reset_config srst_only

2
tcl/board/ethernut3.cfg
View File

@@ -20,7 +20,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
# Micrel MIC2775-29YM5 Supervisor
# Reset output will remain active for 280ms (maximum)
#
jtag_nsrst_delay 300
adapter_nsrst_delay 300
jtag_ntrst_delay 300

2
tcl/board/hitex_lpc2929.cfg
View File

@@ -2,7 +2,7 @@
# http://www.hitex.com/
# Delays on reset lines
jtag_nsrst_delay 50
adapter_nsrst_delay 50
jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).

2
tcl/board/hitex_str9-comstick.cfg
View File

@@ -7,7 +7,7 @@ source [find interface/hitex_str9-comstick.cfg]
# set jtag speed
adapter_khz 3000
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst

2
tcl/board/lubbock.cfg
View File

@@ -4,7 +4,7 @@
source [find target/pxa255.cfg]
jtag_nsrst_delay 250
adapter_nsrst_delay 250
jtag_ntrst_delay 250
# NOTE: until after pinmux and such are set up, only CS0 is

4
tcl/board/mini2440.cfg
View File

@@ -112,7 +112,7 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
#reset configuration
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
@@ -141,7 +141,7 @@ reset_config trst_and_srst
nand device s3c2440 0
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst
init

2
tcl/board/phytec_lpc3250.cfg
View File

@@ -1,6 +1,6 @@
source [find target/lpc3250.cfg]
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 1
adapter_khz 200
reset_config trst_and_srst separate

2
tcl/board/pxa255_sst.cfg
View File

@@ -93,7 +93,7 @@ $_TARGETNAME configure -event reset-init {pxa255_sst_init}
reset_config trst_and_srst
jtag_nsrst_delay 200
adapter_nsrst_delay 200
jtag_ntrst_delay 200
#xscale debug_handler 0 0xFFFF0800 # debug handler base address

2
tcl/board/telo.cfg
View File

@@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
jtag_nsrst_assert_width 100
jtag_ntrst_assert_width 100
# don't talk to JTAG after reset for: [ms]
jtag_nsrst_delay 100
adapter_nsrst_delay 100
jtag_ntrst_delay 100
reset_config trst_and_srst separate