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stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices

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this is a rework of #5320 started by Andreas then abandoned.

same syntax as in stm32f2x driver:

  enable OTP for writing
  > stm32l4x otp 1 enable

  write to OTP
  > flash write_bank 1 foo.bin 0
  > flash filld 0x1FFF7000 0xDeadBeafBaadF00d 1

  read OTP
  > mdw 0x1FFF7000 4

  disable OTP
  > stm32l4x otp 1 disable

Change-Id: Id7d7c163b35d7a3f406dc200d7e2fc293b0675c2
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5537
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Tarek BOCHKATI
2020-03-22 20:39:44 +01:00
committed by Tomas Vanek
parent f13bb10e26
commit b8fd9aecb1
8 changed files with 182 additions and 12 deletions
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11
doc/openocd.texi
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@@ -7179,6 +7179,17 @@ the chip identification register, and autoconfigures itself.
flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME
@end example
If you use OTP (One-Time Programmable) memory define it as a second bank
as per the following example.
@example
flash bank $_FLASHNAME stm32l4x 0x1FFF7000 0 0 0 $_TARGETNAME
@end example
@deffn Command {stm32l4x otp} num (@option{enable}|@option{disable}|@option{show})
Enables or disables OTP write commands for bank @var{num}.
The @var{num} parameter is a value shown by @command{flash banks}.
@end deffn
Note that some devices have been found that have a flash size register that contains
an invalid value, to workaround this issue you can override the probed value used by
the flash driver. However, specifying a wrong value might lead to a completely