ARM11: remove old mrc/mcr commands
Switch to new commands in config scripts Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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@@ -1502,7 +1502,7 @@ proc setc15 @{regs value@} @{
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echo [format "set p15 0x%04x, 0x%08x" $regs $value]
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arm11 mcr $TARGETNAME 15 [expr ($regs>>12)&0x7] \
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mcr 15 [expr ($regs>>12)&0x7] \
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[expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] \
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[expr ($regs>>8)&0x7] $value
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@}
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@@ -5796,15 +5796,6 @@ Without arguments, the current settings are displayed.
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@subsection ARM11 specific commands
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@cindex ARM11
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@deffn Command {arm11 mcr} pX opc1 CRn CRm opc2 value
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Write @var{value} to a coprocessor @var{pX} register
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passing parameters @var{CRn},
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@var{CRm}, opcodes @var{opc1} and @var{opc2},
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and the MCR instruction.
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(The difference beween this and the MCR2 instruction is
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one bit in the encoding, effecively a fifth parameter.)
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@end deffn
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@deffn Command {arm11 memwrite burst} [value]
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Displays the value of the memwrite burst-enable flag,
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which is enabled by default. Burst writes are only used
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@@ -5821,15 +5812,6 @@ which is enabled by default.
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If @var{value} is defined, first assigns that.
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@end deffn
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@deffn Command {arm11 mrc} pX opc1 CRn CRm opc2
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Read a coprocessor @var{pX} register passing parameters @var{CRn},
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@var{CRm}, opcodes @var{opc1} and @var{opc2},
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and the MRC instruction.
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(The difference beween this and the MRC2 instruction is
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one bit in the encoding, effecively a fifth parameter.)
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Displays the result.
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@end deffn
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@deffn Command {arm11 step_irq_enable} [value]
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Displays the value of the flag controlling whether
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IRQs are enabled during single stepping;
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