target config files: Fix whitespace issues.
Drop useless double-space occurences, drop trailing whitespace, and fix some other minor whitespace-related issues. Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5 Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/137 Tested-by: jenkins
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Spencer Oliver
parent
17b546a900
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ca45e700b1
@@ -6,7 +6,7 @@
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global _DEVICECLASS
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if { [info exists DEVICECLASS ] } {
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if { [info exists DEVICECLASS] } {
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set _DEVICECLASS $DEVICECLASS
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} else {
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set _DEVICECLASS 0xff
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@@ -20,9 +20,9 @@ source [find target/swj-dp.tcl]
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# are usable only for ISP style initial flash programming.
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lm3s
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set _CHIPNAME lm3s
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}
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# CPU TAP ID 0x1ba00477 for early Sandstorm parts
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@@ -31,7 +31,7 @@ if { [info exists CHIPNAME] } {
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# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest)
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# ... we'll ignore the JTAG version field, rather than list every
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# chip revision that turns up.
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if { [info exists CPUTAPID ] } {
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x0ba00477
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@@ -43,7 +43,7 @@ if { [info exists CPUTAPID ] } {
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swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
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-expected-id $_CPUTAPID -ignore-version
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if { [info exists WORKAREASIZE ] } {
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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# default to 8K working area
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@@ -55,7 +55,7 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu
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# 8K working area at base of ram, not backed up
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#
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# NOTE: you may need or want to reconfigure the work area;
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# NOTE: you may need or want to reconfigure the work area;
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# some parts have just 6K, and you may want to use other
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# addresses (at end of mem not beginning) or back it up.
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
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@@ -63,7 +63,7 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
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# JTAG speed ... slow enough to work with a 12 MHz RC oscillator;
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# LM3S parts don't support RTCK
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#
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# NOTE: this may be increased by a reset-init handler, after it
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# NOTE: this may be increased by a reset-init handler, after it
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# configures and enables the PLL. Or you might need to decrease
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# this, if you're using a slower clock.
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adapter_khz 500
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