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target config files: Fix whitespace issues.

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Drop useless double-space occurences, drop trailing whitespace, and fix
some other minor whitespace-related issues.

Change-Id: I6b4c515492e2ee94dc25ef1fe4f51015a4bba8b5
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/137
Tested-by: jenkins
This commit is contained in:
Uwe Hermann
2011-10-29 23:32:17 +02:00
committed by Spencer Oliver
parent 17b546a900
commit ca45e700b1
86 changed files with 503 additions and 508 deletions
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62
tcl/target/u8500.cfg
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@@ -15,7 +15,7 @@ proc mmu_on {} {
}
proc ocd_gdb_restart {target_id} {
global _TARGETNAME_1
global _TARGETNAME_1
global _SMP
targets $_TARGETNAME_1
if { [expr ($_SMP == 1)] } {
@@ -29,13 +29,13 @@ proc ocd_gdb_restart {target_id} {
}
proc smp_reg {} {
global _TARGETNAME_1
global _TARGETNAME_2
global _TARGETNAME_1
global _TARGETNAME_2
targets $_TARGETNAME_1
echo "$_TARGETNAME_1"
set pc1 [reg pc]
set stck1 [reg sp_svc]
targets $_TARGETNAME_2
targets $_TARGETNAME_2
echo "$_TARGETNAME_1"
set pc2 [reg pc]
set stck2 [reg sp_svc]
@@ -79,13 +79,13 @@ proc poll_pwrsts { } {
set result 1
set i 0
irscan $_CHIPNAME.jrc 0x3a
drscan $_CHIPNAME.jrc 4 0
set pwrsts [drscan $_CHIPNAME.jrc 16 0]
drscan $_CHIPNAME.jrc 4 0
set pwrsts [drscan $_CHIPNAME.jrc 16 0]
set pwrsts [expr (0x$pwrsts & 0xc)]
while {[string equal "4" $pwrsts] && $i<20} {
irscan $_CHIPNAME.jrc 0x3a
drscan $_CHIPNAME.jrc 4 0;
set pwrsts [drscan $_CHIPNAME.jrc 16 0]
drscan $_CHIPNAME.jrc 4 0;
set pwrsts [drscan $_CHIPNAME.jrc 16 0]
set pwrsts [expr (0x$pwrsts & 0xc)]
if {![string equal "4" $pwrsts]} {
set result 1
@@ -100,7 +100,7 @@ proc poll_pwrsts { } {
}
proc halt_ { } {
if {[poll_pwrsts]==1} {
if {[poll_pwrsts]==1} {
halt
} else {
echo "halt failed : target in retention"
@@ -117,12 +117,12 @@ proc u8500_tapdisable {chip val} {
proc enable_apetap {} {
global _CHIPNAME
global _TARGETNAME_2
global _CHIPNAME
global _TARGETNAME_2
global _TARGETNAME_1
poll off
irscan $_CHIPNAME.jrc 0x3e
drscan $_CHIPNAME.jrc 8 0xcf
drscan $_CHIPNAME.jrc 8 0xcf
jtag tapenable $_CHIPNAME.dap
irscan $_CHIPNAME.jrc 0x6
drscan $_CHIPNAME.jrc 32 0
@@ -143,26 +143,26 @@ proc enable_apetap {} {
tcl_port 5555
telnet_port 4444
gdb_port 3333
if { [info exists CHIPNAME] } {
global _CHIPNAME
set _CHIPNAME $CHIPNAME
global _CHIPNAME
set _CHIPNAME $CHIPNAME
} else {
global _CHIPNAME
set _CHIPNAME u8500
global _CHIPNAME
set _CHIPNAME u8500
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
# this defaults to a bigendian
set _ENDIAN little
set _ENDIAN little
}
# Subsidiary TAP: APE with scan chains for ARM Debug, EmbeddedICE-RT,
if { [info exists CPUTAPID ] } {
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477
@@ -175,7 +175,7 @@ jtag configure $_CHIPNAME.dap -event tap-disable \
#CLTAPC TAP JRC equivalent
if { [info exists CLTAPC_ID ] } {
if { [info exists CLTAPC_ID] } {
set _CLTAPC_ID $CLTAPC_ID
} else {
set _CLTAPC_ID 0x22286041
@@ -183,20 +183,20 @@ if { [info exists CLTAPC_ID ] } {
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x6 -irmask 0xf -expected-id $_CLTAPC_ID -ignore-version
if { ![info exists TARGETNAME_1 ] } {
global _TARGETNAME_1
if { ![info exists TARGETNAME_1] } {
global _TARGETNAME_1
set _TARGETNAME_1 $_CHIPNAME.cpu1
} else {
global _TARGETNAME_1
global _TARGETNAME_1
set _TARGETNAME_1 $TARGETNAME_1
}
if { [info exists DAP_DBG1] } {
if { [info exists DAP_DBG1] } {
set _DAP_DBG1 $DAP_DBG1
} else {
set _DAP_DBG1 0x801A8000
}
if { [info exists DAP_DBG2] } {
if { [info exists DAP_DBG2] } {
set _DAP_DBG2 $DAP_DBG2
} else {
set _DAP_DBG2 0x801AA000
@@ -209,11 +209,11 @@ $_TARGETNAME_1 configure -event gdb-attach {
}
if { ![info exists TARGETNAME_2 ] } {
global _TARGETNAME_2
if { ![info exists TARGETNAME_2] } {
global _TARGETNAME_2
set _TARGETNAME_2 $_CHIPNAME.cpu2
} else {
global _TARGETNAME_2
global _TARGETNAME_2
set _TARGETNAME_2 $TARGETNAME_2
}