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target/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1

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Cortex-M0, M0+ and M1 do not support VECTRESET bit in AIRCR.
Without this change the 'reset' command silently fails if VECTRESET
is requested.

Detect these cores, show warning if VECTRESET is about to use
and use SYSRESETREQ instead.

Change-Id: Ief174373e3ef0e6b287c57911c0aca4dfa8209f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4794
Tested-by: jenkins
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
Tomas Vanek
2018-12-07 17:00:12 +01:00
parent 651998e337
commit cb5c6477f5
3 changed files with 28 additions and 6 deletions
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10
doc/openocd.texi
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@@ -9002,11 +9002,15 @@ otherwise fallback to @option{vectreset}.
@item @option{sysresetreq} use NVIC SYSRESETREQ to reset system.
@item @option{vectreset} use NVIC VECTRESET to reset system.
@end itemize
Using @option{vectreset} is a safe option for all current Cortex-M cores.
Using @option{vectreset} is a safe option for Cortex-M3, M4 and M7 cores.
This however has the disadvantage of only resetting the core, all peripherals
are unaffected. A solution would be to use a @code{reset-init} event handler to manually reset
the peripherals.
are unaffected. A solution would be to use a @code{reset-init} event handler
to manually reset the peripherals.
@xref{targetevents,,Target Events}.
Cortex-M0, M0+ and M1 do not support @option{vectreset}, use @option{sysresetreq}
instead.
@end deffn
@subsection ARMv8-A specific commands