target/cortex_m: do not use VECTRESET on Cortex-M0, M0+ and M1

Cortex-M0, M0+ and M1 do not support VECTRESET bit in AIRCR.
Without this change the 'reset' command silently fails if VECTRESET
is requested.

Detect these cores, show warning if VECTRESET is about to use
and use SYSRESETREQ instead.

Change-Id: Ief174373e3ef0e6b287c57911c0aca4dfa8209f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4794
Tested-by: jenkins
Reviewed-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

src/target/cortex_m.h

@@ -184,6 +184,7 @@ struct cortex_m_common {
 	struct reg_cache *dwt_cache;
 
 	enum cortex_m_soft_reset_config soft_reset_config;
+	bool vectreset_supported;
 
 	enum cortex_m_isrmasking_mode isrmasking_mode;