ARMv7-M: start using "struct arm"
This sets up a few of the core "struct arm" data structures so they can be used with ARMv7-M cores. Specifically, it: - defines new ARM core_modes to match the microcontroller modes (e.g. HANDLER not IRQ, and two types of thread mode); - Establishes a new microcontroller "core_type", which can be used to make sure v7-M (and v6-M) cores are handled right; - adds "struct arm" to "struct armv7m" and arranges for the target_to_armv7m() converter to use it; - sets up the arm.core_cache and arm.cpsr values - makes the Cortex-M3 code maintain arm.map and arm.core_mode. This is currently set up as a parallel data structure, primarily to minimize special cases for the semihosting support with microcontroller profile cores. Later patches can rip out the duplicative ARMv7-M support and start reusing core ARM code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@@ -40,9 +40,17 @@
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*/
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/**
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* These numbers match the five low bits of the *PSR registers on
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* Represent state of an ARM core.
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*
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* Most numbers match the five low bits of the *PSR registers on
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* "classic ARM" processors, which build on the ARMv4 processor
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* modes and register set.
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*
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* ARM_MODE_ANY is a magic value, often used as a wildcard.
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*
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* Only the microcontroller cores (ARMv6-M, ARMv7-M) support ARM_MODE_THREAD,
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* ARM_MODE_USER_THREAD, and ARM_MODE_HANDLER. Those are the only modes
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* they support.
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*/
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enum arm_mode {
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ARM_MODE_USR = 16,
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@@ -53,6 +61,11 @@ enum arm_mode {
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ARM_MODE_MON = 26,
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ARM_MODE_UND = 27,
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ARM_MODE_SYS = 31,
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ARM_MODE_THREAD,
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ARM_MODE_USER_THREAD,
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ARM_MODE_HANDLER,
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ARM_MODE_ANY = -1
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};
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@@ -96,6 +109,8 @@ struct arm {
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* ARM_MODE_ANY indicates the standard set of 37 registers,
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* seen on for example ARM7TDMI cores. ARM_MODE_MON indicates three
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* more registers are shadowed, for "Secure Monitor" mode.
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* ARM_MODE_THREAD indicates a microcontroller profile core,
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* which only shadows SP.
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*/
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enum arm_mode core_type;
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