pld: add support for lattice ecp5 devices
Change-Id: Ib2f0933da3abe7429abca86d6aaa50ad85ce72c7 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7397 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
This commit is contained in:
Daniel Anselmi
committed by
Antonio Borneo
Antonio Borneo
parent
d35faaa35c
commit
cf596a61db
206
src/pld/ecp5.c
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206
src/pld/ecp5.c
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// SPDX-License-Identifier: GPL-2.0-or-later
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/***************************************************************************
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* Copyright (C) 2022 by Daniel Anselmi *
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* danselmi@gmx.ch *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "lattice.h"
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#include "lattice_cmd.h"
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#define ISC_PROGRAM_USERCODE 0xC2
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#define STATUS_DONE_BIT 0x00000100
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#define STATUS_ERROR_BITS 0x00020040
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#define STATUS_FEA_OTP 0x00004000
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#define STATUS_FAIL_FLAG 0x00002000
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#define STATUS_BUSY_FLAG 0x00001000
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#define REGISTER_ALL_BITS_1 0xffffffff
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int lattice_ecp5_read_status(struct jtag_tap *tap, uint32_t *status, uint32_t out, bool do_idle)
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{
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return lattice_read_u32_register(tap, LSC_READ_STATUS, status, out, do_idle);
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}
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int lattice_ecp5_read_usercode(struct jtag_tap *tap, uint32_t *usercode, uint32_t out)
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{
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return lattice_read_u32_register(tap, READ_USERCODE, usercode, out, true);
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}
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int lattice_ecp5_write_usercode(struct lattice_pld_device *lattice_device, uint32_t usercode)
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{
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struct jtag_tap *tap = lattice_device->tap;
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if (!tap)
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return ERROR_FAIL;
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int retval = lattice_set_instr(tap, ISC_ENABLE, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(5, TAP_IDLE);
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jtag_add_sleep(20000);
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retval = lattice_set_instr(tap, ISC_PROGRAM_USERCODE, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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uint8_t buffer[4];
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struct scan_field field;
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h_u32_to_le(buffer, usercode);
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field.num_bits = 32;
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field.out_value = buffer;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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jtag_add_runtest(5, TAP_IDLE);
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jtag_add_sleep(2000);
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retval = lattice_set_instr(tap, ISC_DISABLE, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(5, TAP_IDLE);
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jtag_add_sleep(200000);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK)
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return retval;
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return lattice_verify_usercode(lattice_device, 0x0, usercode, REGISTER_ALL_BITS_1);
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}
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static int lattice_ecp5_enable_sram_programming(struct jtag_tap *tap)
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{
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int retval = lattice_set_instr(tap, ISC_ENABLE, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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struct scan_field field;
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uint8_t buffer = 0x0;
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field.num_bits = 8;
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field.out_value = &buffer;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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jtag_add_runtest(2, TAP_IDLE);
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jtag_add_sleep(10000);
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return jtag_execute_queue();
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}
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static int lattice_ecp5_erase_sram(struct jtag_tap *tap)
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{
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int retval = lattice_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
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if (retval != ERROR_OK)
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return retval;
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struct scan_field field;
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uint8_t buffer = 1;
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field.num_bits = 8;
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field.out_value = &buffer;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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jtag_add_runtest(2, TAP_IDLE);
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jtag_add_sleep(200000);
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return jtag_execute_queue();
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}
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static int lattice_ecp5_init_address(struct jtag_tap *tap)
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{
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int retval = lattice_set_instr(tap, LSC_INIT_ADDRESS, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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struct scan_field field;
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uint8_t buffer = 1;
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field.num_bits = 8;
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field.out_value = &buffer;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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jtag_add_runtest(2, TAP_IDLE);
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jtag_add_sleep(10000);
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return jtag_execute_queue();
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}
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static int lattice_ecp5_program_config_map(struct jtag_tap *tap, struct lattice_bit_file *bit_file)
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{
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int retval = lattice_set_instr(tap, LSC_BITSTREAM_BURST, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(2, TAP_IDLE);
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jtag_add_sleep(10000);
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struct scan_field field;
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field.num_bits = (bit_file->raw_bit.length - bit_file->offset) * 8;
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field.out_value = bit_file->raw_bit.data + bit_file->offset;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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retval = lattice_set_instr(tap, BYPASS, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(100, TAP_IDLE);
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jtag_add_sleep(10000);
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return jtag_execute_queue();
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}
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static int lattice_ecp5_exit_programming_mode(struct jtag_tap *tap)
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{
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int retval = lattice_set_instr(tap, ISC_DISABLE, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(2, TAP_IDLE);
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jtag_add_sleep(200000);
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retval = lattice_set_instr(tap, BYPASS, TAP_IDLE);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(2, TAP_IDLE);
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jtag_add_sleep(1000);
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return jtag_execute_queue();
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}
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int lattice_ecp5_load(struct lattice_pld_device *lattice_device, struct lattice_bit_file *bit_file)
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{
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struct jtag_tap *tap = lattice_device->tap;
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if (!tap)
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return ERROR_FAIL;
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int retval = lattice_preload(lattice_device);
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if (retval != ERROR_OK)
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return retval;
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retval = lattice_ecp5_enable_sram_programming(tap);
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if (retval != ERROR_OK)
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return retval;
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const uint32_t out = 0x0;
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const uint32_t expected1 = 0x0;
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const uint32_t mask1 = STATUS_ERROR_BITS | STATUS_FEA_OTP;
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retval = lattice_verify_status_register_u32(lattice_device, out, expected1, mask1, true);
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if (retval != ERROR_OK)
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return retval;
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retval = lattice_ecp5_erase_sram(tap);
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if (retval != ERROR_OK)
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return retval;
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const uint32_t mask2 = STATUS_FAIL_FLAG | STATUS_BUSY_FLAG;
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retval = lattice_verify_status_register_u32(lattice_device, out, expected1, mask2, false);
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if (retval != ERROR_OK)
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return retval;
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retval = lattice_ecp5_init_address(tap);
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if (retval != ERROR_OK)
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return retval;
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retval = lattice_ecp5_program_config_map(tap, bit_file);
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if (retval != ERROR_OK)
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return retval;
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retval = lattice_ecp5_exit_programming_mode(tap);
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if (retval != ERROR_OK)
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return retval;
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const uint32_t expected2 = STATUS_DONE_BIT;
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const uint32_t mask3 = STATUS_DONE_BIT | STATUS_FAIL_FLAG;
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return lattice_verify_status_register_u32(lattice_device, out, expected2, mask3, false);
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}
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