semihosting armv7a: Add support for ARMv7-A
Add semihosting support for ARMv7-A based processors. Tested with custom Vybrid VF610 based board and Pandaboard ES (Rev. B1) board (Cortex-A9). Change-Id: I6b896a61c1c6a1c5dcf89de834486f82dd6c80a2 Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Tsung-Han Lin <tsunghan.tw@gmail.com> Reviewed-on: http://openocd.zylin.com/2908 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
This commit is contained in:
committed by
Freddie Chopin
parent
b10037a0b7
commit
d1bdcdcc8d
@@ -39,8 +39,10 @@
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#include "armv4_5.h"
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#include "arm7_9_common.h"
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#include "armv7m.h"
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#include "armv7a.h"
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#include "cortex_m.h"
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#include "register.h"
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#include "arm_opcodes.h"
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#include "arm_semihosting.h"
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#include <helper/binarybuffer.h>
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#include <helper/log.h>
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@@ -415,7 +417,8 @@ static int do_semihosting(struct target *target)
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/* REVISIT this looks wrong ... ARM11 and Cortex-A8
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* should work this way at least sometimes.
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*/
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if (is_arm7_9(target_to_arm7_9(target))) {
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if (is_arm7_9(target_to_arm7_9(target)) ||
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is_armv7a(target_to_armv7a(target))) {
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uint32_t spsr;
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/* return value in R0 */
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@@ -468,20 +471,42 @@ static int do_semihosting(struct target *target)
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int arm_semihosting(struct target *target, int *retval)
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{
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struct arm *arm = target_to_arm(target);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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uint32_t pc, lr, spsr;
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struct reg *r;
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if (!arm->is_semihosting)
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return 0;
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if (is_arm7_9(target_to_arm7_9(target))) {
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if (is_arm7_9(target_to_arm7_9(target)) ||
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is_armv7a(armv7a)) {
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uint32_t vbar = 0x00000000;
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if (arm->core_mode != ARM_MODE_SVC)
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return 0;
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if (is_armv7a(armv7a)) {
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struct arm_dpm *dpm = armv7a->arm.dpm;
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*retval = dpm->prepare(dpm);
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if (*retval == ERROR_OK) {
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*retval = dpm->instr_read_data_r0(dpm,
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ARMV4_5_MRC(15, 0, 0, 12, 0, 0),
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&vbar);
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dpm->finish(dpm);
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if (*retval != ERROR_OK)
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return 1;
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} else {
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return 1;
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}
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}
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/* Check for PC == 0x00000008 or 0xffff0008: Supervisor Call vector. */
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r = arm->pc;
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pc = buf_get_u32(r->value, 0, 32);
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if (pc != 0x00000008 && pc != 0xffff0008)
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if (pc != (vbar + 0x00000008) && pc != 0xffff0008)
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return 0;
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r = arm_reg_current(arm, 14);
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