aarch64: fix entry into debug state

- armv8 EDSCR has no ITR_EN bit, ITR is always enabled. Writes to this
  bit are ignored but we should not do them anyway
- use dpmv8 function to report the reason for debug entry
- WFAR is a 64bit register

Change-Id: I07b81ecf105ceb7c3ae2f764bb408eb973c1d1de
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>

src/target/arm_dpm.h

@@ -138,7 +138,7 @@ struct arm_dpm {
 	struct dpm_wp *dwp;
 
 	/** Address of the instruction which triggered a watchpoint. */
-	uint32_t wp_pc;
+	target_addr_t wp_pc;
 
 	/** Recent value of DSCR. */
 	uint32_t dscr;