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- Set up ICE registers after TRST

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- Work in progress to allow launching GDB/telnet server *before* jtag
chain enum, validate & examine


git-svn-id: svn://svn.berlios.de/openocd/trunk@569 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe
2008-04-13 10:09:27 +00:00
parent fdd5582f7e
commit d9f50cb7d6
5 changed files with 129 additions and 57 deletions
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42
src/target/arm7tdmi.c
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@@ -738,26 +738,42 @@ void arm7tdmi_build_reg_cache(target_t *target)
reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
/* get pointers to arch-specific information */
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
(*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
armv4_5->core_cache = (*cache_p);
(*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
arm7_9->eice_cache = (*cache_p)->next;
if (arm7_9->etm_ctx)
{
(*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
}
}
int arm7tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target)
{
target->type->examined = 1;
int retval;
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
if (!target->type->examined)
{
/* get pointers to arch-specific information */
reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
reg_cache_t *t=embeddedice_build_reg_cache(target, arm7_9);
if (t==NULL)
return ERROR_FAIL;
(*cache_p) = t;
arm7_9->eice_cache = (*cache_p);
if (arm7_9->etm_ctx)
{
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
(*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
arm7_9->etm_ctx->reg_cache = (*cache_p)->next;
}
target->type->examined = 1;
}
if ((retval=embeddedice_setup(target))!=ERROR_OK)
return retval;
if (arm7_9->etm_ctx)
{
if ((retval=etm_setup(target))!=ERROR_OK)
return retval;
}
return ERROR_OK;
}