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first jtag_check_value_mask usage. tested by using "arm7_9 fast_memory_access enable" & "mdw 0 0x10"

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git-svn-id: svn://svn.berlios.de/openocd/trunk@1664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
oharboe
2009-05-08 06:45:27 +00:00
parent 75f98d1649
commit dd673b0b5f
2 changed files with 16 additions and 15 deletions
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15
src/target/embeddedice.c
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@@ -251,39 +251,26 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
fields[0].tap = ice_reg->jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = reg->value;
fields[0].in_value = NULL;
fields[0].in_handler = NULL;
fields[1].tap = ice_reg->jtag_info->tap;
fields[1].num_bits = 5;
fields[1].out_value = field1_out;
buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
fields[1].in_value = NULL;
fields[1].in_handler = NULL;
fields[2].tap = ice_reg->jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = field2_out;
buf_set_u32(fields[2].out_value, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].in_handler = NULL;
jtag_add_dr_scan(3, fields, TAP_INVALID);
fields[0].in_value = reg->value;
jtag_set_check_value(fields+0, check_value, check_mask, NULL);
/* when reading the DCC data register, leaving the address field set to
* EICE_COMMS_DATA would read the register twice
@@ -293,6 +280,8 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
jtag_add_dr_scan(3, fields, TAP_INVALID);
jtag_check_value_mask(fields+0, check_value, check_mask);
return ERROR_OK;
}