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- Replace 'if(' with 'if ('.

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git-svn-id: svn://svn.berlios.de/openocd/trunk@2357 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
zwelch
2009-06-23 22:35:09 +00:00
parent 8591335ba6
commit e43979e702
46 changed files with 604 additions and 604 deletions
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4
src/flash/at91sam7.c
View File

@@ -890,7 +890,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
at91sam7_read_clock_info(bank);
at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH);
if(erase_all)
if (erase_all)
{
if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK)
{
@@ -1027,7 +1027,7 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o
/* Write one block to the PageWriteBuffer */
buffer_pos = (pagen-first_page)*dst_min_alignment;
wcount = CEIL(count,4);
if((retval = target_write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
if ((retval = target_write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
{
return retval;
}

142
src/flash/cfi.c
View File

@@ -114,7 +114,7 @@ static __inline__ uint32_t flash_address(flash_bank_t *bank, int sector, uint32_
{
cfi_flash_bank_t *cfi_info = bank->driver_priv;
if(cfi_info->x16_as_x8) offset*=2;
if (cfi_info->x16_as_x8) offset*=2;
/* while the sector list isn't built, only accesses to sector 0 work */
if (sector == 0)
@@ -209,7 +209,7 @@ static uint16_t cfi_query_u16(flash_bank_t *bank, int sector, uint32_t offset)
cfi_flash_bank_t *cfi_info = bank->driver_priv;
uint8_t data[CFI_MAX_BUS_WIDTH * 2];
if(cfi_info->x16_as_x8)
if (cfi_info->x16_as_x8)
{
uint8_t i;
for(i=0;i<2;i++)
@@ -231,7 +231,7 @@ static uint32_t cfi_query_u32(flash_bank_t *bank, int sector, uint32_t offset)
cfi_flash_bank_t *cfi_info = bank->driver_priv;
uint8_t data[CFI_MAX_BUS_WIDTH * 4];
if(cfi_info->x16_as_x8)
if (cfi_info->x16_as_x8)
{
uint8_t i;
for(i=0;i<4;i++)
@@ -356,12 +356,12 @@ static int cfi_read_intel_pri_ext(flash_bank_t *bank)
if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
{
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -422,7 +422,7 @@ static int cfi_read_spansion_pri_ext(flash_bank_t *bank)
if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I'))
{
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -495,7 +495,7 @@ static int cfi_read_atmel_pri_ext(flash_bank_t *bank)
if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I'))
{
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -691,13 +691,13 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
for (i = first; i <= last; i++)
{
cfi_command(bank, 0x20, command);
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xd0, command);
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -707,7 +707,7 @@ static int cfi_intel_erase(struct flash_bank_s *bank, int first, int last)
else
{
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -734,37 +734,37 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
for (i = first; i <= last; i++)
{
cfi_command(bank, 0xaa, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x80, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xaa, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x30, command);
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -774,7 +774,7 @@ static int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last)
else
{
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -845,7 +845,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
cfi_command(bank, 0x60, command);
LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -853,7 +853,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
cfi_command(bank, 0x01, command);
LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32 , flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -863,7 +863,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
cfi_command(bank, 0xd0, command);
LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -881,7 +881,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
uint8_t block_status;
/* read block lock bit, to verify status */
cfi_command(bank, 0x90, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -891,7 +891,7 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
{
LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status);
cfi_command(bank, 0x70, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -920,13 +920,13 @@ static int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int
cfi_intel_clear_status_register(bank);
cfi_command(bank, 0x60, command);
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x01, command);
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -1214,7 +1214,7 @@ static int cfi_intel_write_block(struct flash_bank_s *bank, uint8_t *buffer, uin
uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
uint32_t wsm_error;
if((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK)
if ((retval = target_write_buffer(target, source->address, thisrun_count, buffer)) != ERROR_OK)
{
goto cleanup;
}
@@ -1461,7 +1461,7 @@ static int cfi_spansion_write_block(struct flash_bank_s *bank, uint8_t *buffer,
}
/* write algorithm code to working area */
if((retval = target_write_buffer(target, cfi_info->write_algorithm->address,
if ((retval = target_write_buffer(target, cfi_info->write_algorithm->address,
target_code_size, target_code)) != ERROR_OK)
{
free(target_code);
@@ -1557,12 +1557,12 @@ static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, uint32
cfi_intel_clear_status_register(bank);
cfi_command(bank, 0x40, command);
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
{
return retval;
}
@@ -1570,7 +1570,7 @@ static int cfi_intel_write_word(struct flash_bank_s *bank, uint8_t *word, uint32
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80)
{
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -1626,14 +1626,14 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, uint3
/* Initiate buffer operation _*/
cfi_command(bank, 0xE8, command);
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
{
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -1644,26 +1644,26 @@ static int cfi_intel_write_words(struct flash_bank_s *bank, uint8_t *word, uint3
/* Write buffer wordcount-1 and data words */
cfi_command(bank, bufferwsize-1, command);
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
{
return retval;
}
/* Commit write operation */
cfi_command(bank, 0xd0, command);
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80)
{
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -1684,24 +1684,24 @@ static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, uin
uint8_t command[8];
cfi_command(bank, 0xaa, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xa0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, word)) != ERROR_OK)
{
return retval;
}
@@ -1709,7 +1709,7 @@ static int cfi_spansion_write_word(struct flash_bank_s *bank, uint8_t *word, uin
if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
{
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -1761,39 +1761,39 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, ui
// Unlock
cfi_command(bank, 0xaa, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
// Buffer load command
cfi_command(bank, 0x25, command);
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
/* Write buffer wordcount-1 and data words */
cfi_command(bank, bufferwsize-1, command);
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
if((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word)) != ERROR_OK)
{
return retval;
}
/* Commit write operation */
cfi_command(bank, 0x29, command);
if((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -1801,7 +1801,7 @@ static int cfi_spansion_write_words(struct flash_bank_s *bank, uint8_t *word, ui
if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK)
{
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -1893,7 +1893,7 @@ int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint3
for (i = 0; i < align; ++i, ++copy_p)
{
uint8_t byte;
if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
}
@@ -1912,7 +1912,7 @@ int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint3
for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p)
{
uint8_t byte;
if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
}
@@ -2016,12 +2016,12 @@ int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint3
/* return to read array mode, so we can read from flash again for padding */
cfi_command(bank, 0xf0, current_word);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, current_word);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
{
return retval;
}
@@ -2043,7 +2043,7 @@ int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint3
for (; i < bank->bus_width; ++i, ++copy_p)
{
uint8_t byte;
if((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK)
{
return retval;
}
@@ -2056,7 +2056,7 @@ int cfi_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint3
/* return to read array mode */
cfi_command(bank, 0xf0, current_word);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK)
{
return retval;
}
@@ -2137,17 +2137,17 @@ static int cfi_probe(struct flash_bank_s *bank)
/* switch to read identifier codes mode ("AUTOSELECT") */
cfi_command(bank, 0xaa, command);
if((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x90, command);
if((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -2155,11 +2155,11 @@ static int cfi_probe(struct flash_bank_s *bank)
if (bank->chip_width == 1)
{
uint8_t manufacturer, device_id;
if((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK)
if ((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK)
{
return retval;
}
if((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK)
if ((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK)
{
return retval;
}
@@ -2168,11 +2168,11 @@ static int cfi_probe(struct flash_bank_s *bank)
}
else if (bank->chip_width == 2)
{
if((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK)
if ((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK)
{
return retval;
}
if((retval = target_read_u16(target, flash_address(bank, 0, 0x02), &cfi_info->device_id)) != ERROR_OK)
if ((retval = target_read_u16(target, flash_address(bank, 0, 0x02), &cfi_info->device_id)) != ERROR_OK)
{
return retval;
}
@@ -2181,12 +2181,12 @@ static int cfi_probe(struct flash_bank_s *bank)
LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id);
/* switch back to read array mode */
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -2207,7 +2207,7 @@ static int cfi_probe(struct flash_bank_s *bank)
* SST flashes clearly violate this, and we will consider them incompatbile for now
*/
cfi_command(bank, 0x98, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -2221,12 +2221,12 @@ static int cfi_probe(struct flash_bank_s *bank)
if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y'))
{
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -2314,12 +2314,12 @@ static int cfi_probe(struct flash_bank_s *bank)
* we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command
*/
cfi_command(bank, 0xf0, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0xff, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -2417,7 +2417,7 @@ static int cfi_intel_protect_check(struct flash_bank_s *bank)
return ERROR_FLASH_OPERATION_FAILED;
cfi_command(bank, 0x90, command);
if((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
@@ -2446,19 +2446,19 @@ static int cfi_spansion_protect_check(struct flash_bank_s *bank)
int i;
cfi_command(bank, 0xaa, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x55, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}
cfi_command(bank, 0x90, command);
if((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
}

2
src/flash/ecos.c
View File

@@ -139,7 +139,7 @@ static int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char
}
info = malloc(sizeof(ecosflash_flash_bank_t));
if(info == NULL)
if (info == NULL)
{
LOG_ERROR("no memory for flash bank info");
exit(-1);

8
src/flash/flash.c
View File

@@ -748,7 +748,7 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm
pattern = strtoul(args[1], NULL, 0);
count = strtoul(args[2], NULL, 0);
if(count == 0)
if (count == 0)
return ERROR_OK;
switch(cmd[4])
@@ -796,7 +796,7 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm
cur_size = MIN( (count*wordsize - wrote), sizeof(chunk) );
flash_bank_t *bank;
bank = get_flash_bank_by_addr(target, address);
if(bank == NULL)
if (bank == NULL)
{
return ERROR_FAIL;
}
@@ -826,7 +826,7 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm
return retval;
}
if(err == ERROR_OK)
if (err == ERROR_OK)
{
float speed;
speed=wrote / 1024.0;
@@ -994,7 +994,7 @@ int flash_erase_address_range(target_t *target, uint32_t addr, uint32_t length)
}
}
if( first == -1 || last == -1 )
if ( first == -1 || last == -1 )
return ERROR_OK;
return flash_driver_erase(c, first, last);

2
src/flash/lpc2000.c
View File

@@ -258,7 +258,7 @@ static int lpc2000_iap_call(flash_bank_t *bank, int code, uint32_t param_table[5
/* write IAP code to working area */
target_buffer_set_u32(target, jump_gate, ARMV4_5_BX(12));
target_buffer_set_u32(target, jump_gate + 4, ARMV4_5_B(0xfffffe, 0));
if((retval = target_write_memory(target, lpc2000_info->iap_working_area->address, 4, 2, jump_gate)) != ERROR_OK)
if ((retval = target_write_memory(target, lpc2000_info->iap_working_area->address, 4, 2, jump_gate)) != ERROR_OK)
{
return retval;
}

2
src/flash/lpc288x.c
View File

@@ -129,7 +129,7 @@ static uint32_t lpc288x_wait_status_busy(flash_bank_t *bank, int timeout)
target_read_u32(target, F_STAT, &status);
}while (((status & FS_DONE) == 0) && timeout);
if(timeout == 0)
if (timeout == 0)
{
LOG_DEBUG("Timedout!");
return ERROR_FLASH_OPERATION_FAILED;

4
src/flash/mflash.c
View File

@@ -298,7 +298,7 @@ static int mg_dsk_srst(uint8_t on)
if ((ret = target_read_u8(target, mg_task_reg + MG_REG_DRV_CTRL, &value)) != ERROR_OK)
return ret;
if(on) {
if (on) {
value |= (mg_io_rbit_devc_srst);
} else {
value &= ~mg_io_rbit_devc_srst;
@@ -892,7 +892,7 @@ static int mg_pll_get_NO(unsigned char output_div)
int i, NO;
for (i = 0, NO = 1; i < 2; ++i, output_div >>= 1)
if(output_div & 1)
if (output_div & 1)
NO = NO << 1;
return NO;

70
src/flash/pic32mx.c
View File

@@ -151,7 +151,7 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
LOG_DEBUG("status: 0x%" PRIx32, status );
alive_sleep(1);
}
if(timeout <= 0)
if (timeout <= 0)
LOG_DEBUG("timeout: status: 0x%" PRIx32, status );
return status;
@@ -194,11 +194,11 @@ static int pic32mx_protect_check(struct flash_bank_s *bank)
}
target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
if((devcfg0 & (1<<28)) == 0) /* code protect bit */
if ((devcfg0 & (1<<28)) == 0) /* code protect bit */
num_pages = 0xffff; /* All pages protected */
else if(bank->base == PIC32MX_KSEG1_BOOT_FLASH)
else if (bank->base == PIC32MX_KSEG1_BOOT_FLASH)
{
if(devcfg0 & (1<<24))
if (devcfg0 & (1<<24))
num_pages = 0; /* All pages unprotected */
else
num_pages = 0xffff; /* All pages protected */
@@ -229,25 +229,25 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
{
LOG_DEBUG("Erasing entire program flash");
status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
return ERROR_OK;
}
for (i = first; i <= last; i++)
{
if(bank->base >= PIC32MX_KSEG1_PGM_FLASH)
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(bank->base + bank->sectors[i].offset));
else
target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(bank->base + bank->sectors[i].offset));
status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
@@ -313,7 +313,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
reg = (i / pic32mx_info->ppage_size) / 8;
bit = (i / pic32mx_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
@@ -327,7 +327,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la
reg = (i / pic32mx_info->ppage_size) / 8;
bit = (i / pic32mx_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
@@ -434,12 +434,12 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
}
#endif
status = pic32mx_write_row(bank, address, source->address);
if( status & NVMCON_NVMERR ) {
if ( status & NVMCON_NVMERR ) {
LOG_ERROR("Flash write error NVMERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
if( status & NVMCON_LVDERR ) {
if ( status & NVMCON_LVDERR ) {
LOG_ERROR("Flash write error LVDERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
@@ -458,12 +458,12 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3
memcpy(&value, buffer, sizeof(uint32_t));
uint32_t status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR ) {
if ( status & NVMCON_NVMERR ) {
LOG_ERROR("Flash write error NVMERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
}
if( status & NVMCON_LVDERR ) {
if ( status & NVMCON_LVDERR ) {
LOG_ERROR("Flash write error LVDERR (status=0x%08" PRIx32 ")", status);
retval = ERROR_FLASH_OPERATION_FAILED;
break;
@@ -481,7 +481,7 @@ static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint3
{
target_t *target = bank->target;
if(bank->base >= PIC32MX_KSEG1_PGM_FLASH)
if (bank->base >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
else
target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address));
@@ -499,11 +499,11 @@ static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32
LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr);
if(address >= PIC32MX_KSEG1_PGM_FLASH)
if (address >= PIC32MX_KSEG1_PGM_FLASH)
target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
else
target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address));
if(srcaddr >= PIC32MX_KSEG1_RAM)
if (srcaddr >= PIC32MX_KSEG1_RAM)
target_write_u32(target, PIC32MX_NVMSRCADDR, KS1Virt2Phys(srcaddr));
else
target_write_u32(target, PIC32MX_NVMSRCADDR, KS0Virt2Phys(srcaddr));
@@ -564,9 +564,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
bytes_written += 4;
@@ -580,9 +580,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of
memcpy(&value, buffer + bytes_written, bytes_remaining);
status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -609,23 +609,23 @@ static int pic32mx_probe(struct flash_bank_s *bank)
(unsigned)((device_id>>12)&0xff),
(unsigned)((device_id>>20)&0xfff) );
if(((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
LOG_WARNING( "Cannot identify target as a PIC32MX family." );
return ERROR_FLASH_OPERATION_FAILED;
}
page_size = 4096;
if(bank->base == PIC32MX_KSEG1_BOOT_FLASH || bank->base == 1) {
if (bank->base == PIC32MX_KSEG1_BOOT_FLASH || bank->base == 1) {
/* 0xBFC00000: Boot flash size fixed at 12k */
num_pages = 12;
} else {
/* 0xBD000000: Program flash size varies with device */
for(i=0; pic32mx_devs[i].name != NULL; i++)
if(pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
num_pages = pic32mx_devs[i].pfm_size;
break;
}
if(pic32mx_devs[i].name == NULL) {
if (pic32mx_devs[i].name == NULL) {
LOG_WARNING( "Cannot identify target as a PIC32MX family." );
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -651,8 +651,8 @@ static int pic32mx_probe(struct flash_bank_s *bank)
/* calculate numbers of pages */
num_pages /= (page_size / 1024);
if(bank->base == 0) bank->base = PIC32MX_KSEG1_PGM_FLASH;
if(bank->base == 1) bank->base = PIC32MX_KSEG1_BOOT_FLASH;
if (bank->base == 0) bank->base = PIC32MX_KSEG1_PGM_FLASH;
if (bank->base == 1) bank->base = PIC32MX_KSEG1_BOOT_FLASH;
bank->size = (num_pages * page_size);
bank->num_sectors = num_pages;
bank->chip_width = 4;
@@ -697,7 +697,7 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
device_id = ejtag_info->idcode;
if(((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
if (((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) {
snprintf(buf, buf_size,
"Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
(unsigned)((device_id>>1)&0x7ff),
@@ -705,11 +705,11 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
return ERROR_FLASH_OPERATION_FAILED;
}
for(i=0; pic32mx_devs[i].name != NULL; i++)
if(pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) {
printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
break;
}
if(pic32mx_devs[i].name == NULL) {
if (pic32mx_devs[i].name == NULL) {
snprintf(buf, buf_size, "Cannot identify target as a PIC32MX family\n");
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -847,13 +847,13 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank)
target_write_u32(target, PIC32MX_FLASH_CR, FLASH_LOCK);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("pic32mx device protected");
return ERROR_OK;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("pic32mx device programming failed");
return ERROR_OK;
@@ -931,9 +931,9 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch
res = ERROR_OK;
status = pic32mx_write_word(bank, address, value);
if( status & NVMCON_NVMERR )
if ( status & NVMCON_NVMERR )
res = ERROR_FLASH_OPERATION_FAILED;
if( status & NVMCON_LVDERR )
if ( status & NVMCON_LVDERR )
res = ERROR_FLASH_OPERATION_FAILED;
if (res == ERROR_OK)

8
src/flash/stellaris.c
View File

@@ -468,7 +468,7 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
did0, did1, stellaris_info->dc0, stellaris_info->dc1);
ver = did0 >> 28;
if((ver != 0) && (ver != 1))
if ((ver != 0) && (ver != 1))
{
LOG_WARNING("Unknown did0 version, cannot identify target");
return ERROR_FLASH_OPERATION_FAILED;
@@ -482,7 +482,7 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
ver = did1 >> 28;
fam = (did1 >> 24) & 0xF;
if(((ver != 0) && (ver != 1)) || (fam != 0))
if (((ver != 0) && (ver != 1)) || (fam != 0))
{
LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
}
@@ -614,7 +614,7 @@ static int stellaris_erase(struct flash_bank_s *bank, int first, int last)
/* Check acess violations */
target_read_u32(target, FLASH_CRIS, &flash_cris);
if(flash_cris & (AMASK))
if (flash_cris & (AMASK))
{
LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "", banknr, flash_cris);
target_write_u32(target, FLASH_CRIS, 0);
@@ -691,7 +691,7 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
/* Check acess violations */
target_read_u32(target, FLASH_CRIS, &flash_cris);
if(flash_cris & (AMASK))
if (flash_cris & (AMASK))
{
LOG_WARNING("Error setting flash page protection, flash_cris 0x%" PRIx32 "", flash_cris);
target_write_u32(target, FLASH_CRIS, 0);

50
src/flash/stm32x.c
View File

@@ -182,9 +182,9 @@ static int stm32x_erase_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* clear readout protection and complementary option bytes
@@ -218,9 +218,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 1 */
@@ -228,9 +228,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 2 */
@@ -238,9 +238,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 3 */
@@ -248,9 +248,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write protection byte 4 */
@@ -258,9 +258,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
/* write readout protection bit */
@@ -268,9 +268,9 @@ static int stm32x_write_options(struct flash_bank_s *bank)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
@@ -338,7 +338,7 @@ static int stm32x_protect_check(struct flash_bank_s *bank)
{
set = 1;
if( protection & (1 << i))
if ( protection & (1 << i))
set = 0;
for (s = 0; s < stm32x_info->ppage_size; s++)
@@ -378,9 +378,9 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last)
status = stm32x_wait_status_busy(bank, 10);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
return ERROR_FLASH_OPERATION_FAILED;
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
return ERROR_FLASH_OPERATION_FAILED;
bank->sectors[i].is_erased = 1;
}
@@ -445,7 +445,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
@@ -459,7 +459,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las
reg = (i / stm32x_info->ppage_size) / 8;
bit = (i / stm32x_info->ppage_size) - (reg * 8);
if( set )
if ( set )
prot_reg[reg] &= ~(1 << bit);
else
prot_reg[reg] |= (1 << bit);
@@ -658,12 +658,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t off
status = stm32x_wait_status_busy(bank, 5);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
@@ -684,12 +684,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t off
status = stm32x_wait_status_busy(bank, 5);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("flash memory not erased before writing");
return ERROR_FLASH_OPERATION_FAILED;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("flash memory write protected");
return ERROR_FLASH_OPERATION_FAILED;
@@ -1188,13 +1188,13 @@ static int stm32x_mass_erase(struct flash_bank_s *bank)
target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
if( status & FLASH_WRPRTERR )
if ( status & FLASH_WRPRTERR )
{
LOG_ERROR("stm32x device protected");
return ERROR_OK;
}
if( status & FLASH_PGERR )
if ( status & FLASH_PGERR )
{
LOG_ERROR("stm32x device programming failed");
return ERROR_OK;

10
src/flash/str9x.c
View File

@@ -305,7 +305,7 @@ static int str9x_erase(struct flash_bank_s *bank, int first, int last)
{
return retval;
}
if( status & 0x80 )
if ( status & 0x80 )
break;
alive_sleep(1);
}
@@ -327,7 +327,7 @@ static int str9x_erase(struct flash_bank_s *bank, int first, int last)
return retval;
}
if( status & 0x22 )
if ( status & 0x22 )
{
LOG_ERROR("error erasing flash bank, status: 0x%x", status);
return ERROR_FLASH_OPERATION_FAILED;
@@ -365,7 +365,7 @@ static int str9x_protect(struct flash_bank_s *bank,
adr = bank->base + bank->sectors[i].offset;
target_write_u16(target, adr, 0x60);
if( set )
if ( set )
target_write_u16(target, adr, 0x01);
else
target_write_u16(target, adr, 0xD0);
@@ -578,7 +578,7 @@ static int str9x_write(struct flash_bank_s *bank,
for (timeout=0; timeout<1000; timeout++)
{
target_read_u8(target, bank_adr, &status);
if( status & 0x80 )
if ( status & 0x80 )
break;
alive_sleep(1);
}
@@ -627,7 +627,7 @@ static int str9x_write(struct flash_bank_s *bank,
for (timeout=0; timeout<1000; timeout++)
{
target_read_u8(target, bank_adr, &status);
if( status & 0x80 )
if ( status & 0x80 )
break;
alive_sleep(1);
}

6
src/flash/str9xpec.c
View File

@@ -101,7 +101,7 @@ static int str9xpec_register_commands(struct command_context_s *cmd_ctx)
int str9xpec_set_instr(jtag_tap_t *tap, uint32_t new_instr, tap_state_t end_state)
{
if( tap == NULL ){
if ( tap == NULL ){
return ERROR_TARGET_INVALID;
}
@@ -575,7 +575,7 @@ static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int l
/* last bank: 0xFF signals a full device protect */
if (last == 0xFF)
{
if( set )
if ( set )
{
status = str9xpec_lock_device(bank);
}
@@ -589,7 +589,7 @@ static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int l
{
for (i = first; i <= last; i++)
{
if( set )
if ( set )
buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
else
buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);