TCL scripts: replace "puts" with "echo"
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
committed by
Øyvind Harboe
parent
4747af362d
commit
e7b2958229
@@ -8,7 +8,7 @@ proc config {label} {
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# show the value for the param. with label
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proc showconfig {label} {
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puts [format "0x%x" [dict get [configC100] $label ]]
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echo [format "0x%x" [dict get [configC100] $label ]]
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}
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# Telo board config
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@@ -53,7 +53,7 @@ proc setupTelo {} {
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proc setupNOR {} {
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puts "Setting up NOR: 16MB, 16-bit wide bus, CS0"
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echo "Setting up NOR: 16MB, 16-bit wide bus, CS0"
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# this is taken from u-boot/boards/mindspeed/ooma-darwin/board.c:nor_hw_init()
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set EX_CSEN_REG [regs EX_CSEN_REG ]
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set EX_CS0_SEG_REG [regs EX_CS0_SEG_REG ]
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@@ -99,7 +99,7 @@ proc bootNOR {} {
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resume
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}
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proc setupGPIO {} {
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puts "Setting up GPIO block for Telo"
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echo "Setting up GPIO block for Telo"
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# This is current setup for Telo (see sch. for details):
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#GPIO0 reset for FXS-FXO IC, leave as input, the IC has internal pullup
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#GPIO1 irq line for FXS-FXO
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@@ -117,14 +117,14 @@ proc setupGPIO {} {
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}
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proc highGPIO5 {} {
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puts "GPIO5 high"
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echo "GPIO5 high"
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set GPIO_OUTPUT_REG [regs GPIO_OUTPUT_REG]
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# set GPIO5=1
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mmw $GPIO_OUTPUT_REG [expr 1 << 5] 0x0
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}
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proc lowGPIO5 {} {
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puts "GPIO5 low"
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echo "GPIO5 low"
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set GPIO_OUTPUT_REG [regs GPIO_OUTPUT_REG]
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# set GPIO5=0
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mmw $GPIO_OUTPUT_REG 0x0 [expr 1 << 5]
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@@ -161,12 +161,12 @@ proc ooma_board_detect {} {
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# read the current value of the BOOTSRAP pins
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set tmp [mrw $GPIO_BOOTSTRAP_REG]
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puts [format "GPIO_BOOTSTRAP_REG (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG $tmp]
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echo [format "GPIO_BOOTSTRAP_REG (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG $tmp]
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# extract the GPBP bits
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set gpbt [expr ($tmp &0x1C00) >> 10 | ($tmp & 0x40) >>3]
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# display board ID
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puts [format "This is %s (0x%x)" [dict get [boardID $gpbt] $gpbt name] $gpbt]
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echo [format "This is %s (0x%x)" [dict get [boardID $gpbt] $gpbt name] $gpbt]
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# show it on serial console
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putsUART0 [format "This is %s (0x%x)\n" [dict get [boardID $gpbt] $gpbt name] $gpbt]
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# return the ddr2 size, used to configure DDR2 on a given board.
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@@ -228,13 +228,13 @@ proc configureDDR2regs_256M {} {
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# start DDRC
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mw64bit $DENALI_CTL_02_DATA [expr $DENALI_CTL_02_VAL | (1 << 32)]
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# wait int_status[2] (DRAM init complete)
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puts -nonewline "Waiting for DDR2 controller to init..."
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echo -n "Waiting for DDR2 controller to init..."
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set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
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while { [expr $tmp & 0x040000] == 0 } {
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sleep 1
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set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
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}
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puts "done."
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echo "done."
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# do ddr2 training sequence
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# TBD (for now, if you need it, run trainDDR command)
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@@ -296,7 +296,7 @@ proc configureDDR2regs_128M {} {
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# start DDRC
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mw64bit $DENALI_CTL_02_DATA [expr $DENALI_CTL_02_VAL | (1 << 32)]
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# wait int_status[2] (DRAM init complete)
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puts -nonewline "Waiting for DDR2 controller to init..."
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echo -n "Waiting for DDR2 controller to init..."
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set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]]
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while { [expr $tmp & 0x040000] == 0 } {
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sleep 1
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@@ -304,7 +304,7 @@ proc configureDDR2regs_128M {} {
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}
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# This is not necessary
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#mw64bit $DENALI_CTL_11_DATA [expr ($DENALI_CTL_11_VAL & ~0x00007F0000000000) | ($wr_dqs_shift << 40) ]
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puts "done."
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echo "done."
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# do ddr2 training sequence
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# TBD (for now, if you need it, run trainDDR command)
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@@ -398,10 +398,10 @@ proc flashUBOOT {file} {
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# make sure we are accessing the lower part of NOR
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lowGPIO5
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flash probe 0
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puts "Erasing sectors 0-3 for uboot"
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echo "Erasing sectors 0-3 for uboot"
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putsUART0 "Erasing sectors 0-3 for uboot\n"
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flash erase_sector 0 0 3
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puts "Programming u-boot"
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echo "Programming u-boot"
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putsUART0 "Programming u-boot..."
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arm11 memwrite burst enable
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flash write_image $file $EXP_CS0_BASEADDR
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