- added a PLD (programmable logic device) subsystem for FPGA, CPLD etc. configuration
- added support for loading .bit files into Xilinx Virtex-II devices - added support for the Gateworks GW16012 JTAG dongle - merged CFI fixes from XScale branch - a few minor fixes git-svn-id: svn://svn.berlios.de/openocd/trunk@116 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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src/pld/xilinx_bit.h
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38
src/pld/xilinx_bit.h
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/***************************************************************************
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* Copyright (C) 2006 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifndef XILINX_BIT_H
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#define XILINX_BIT_H
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#include "types.h"
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typedef struct xilinx_bit_file_s
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{
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u8 unknown_header[13];
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u8 *source_file;
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u8 *part_name;
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u8 *date;
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u8 *time;
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u32 length;
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u8 *data;
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} xilinx_bit_file_t;
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int xilinx_read_bit_file(xilinx_bit_file_t *bit_file, char *filename);
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#endif /* XILINX_BIT_H */
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