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cortex_a: Update instruction cache after setting a soft breakpoint

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Call armv7a_l1_d_cache_flush_virt() before writing the breakpoint,
to make sure the d-cache is clean and invalid at the breakpoint
location down to PoC.

Call armv7a_l1_d_cache_inval_virt() after writing the breakpoint
again, so that d-cache will pick up the modified code.
Call armv7a_l1_i_cache_inval_virt() after writing the breakpoint
to memory to make the change visible to the CPU.

Change-Id: I24fc27058d99cb00d7f6002ccb623cab66b0d234
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3033
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
This commit is contained in:
Matthias Welwarsky
2015-10-18 13:50:58 +02:00
committed by Paul Fertser
parent 9484dd5ebf
commit f24aa404ba
3 changed files with 30 additions and 1 deletions
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2
src/target/armv7a_cache.c
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@@ -152,7 +152,7 @@ int armv7a_cache_auto_flush_all_data(struct target *target)
}
static int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt,
int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt,
uint32_t size)
{
struct armv7a_common *armv7a = target_to_armv7a(target);