xtensa: update XDM register map for TRAX support
- Include additional debug module registers - Add translation function for DM reg addr -> ID - Add DM read/write commands Signed-off-by: ianst <ianst@cadence.com> Change-Id: If95419d24a9f27a40fa695c8c15326cdfd127ef1 Reviewed-on: https://review.openocd.org/c/openocd/+/7973 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
This commit is contained in:
@@ -11487,6 +11487,12 @@ Execute arbitrary instruction(s) provided as an ascii string. The string repres
|
||||
number of instruction bytes, thus its length must be even.
|
||||
@end deffn
|
||||
|
||||
@deffn {Command} {xtensa dm} (address) [value]
|
||||
Read or write Xtensa Debug Module (DM) registers. @var{address} is required for both reads
|
||||
and writes and is a 4-byte-aligned value typically between 0 and 0x3ffc. @var{value} is specified
|
||||
only for write accesses.
|
||||
@end deffn
|
||||
|
||||
@subsection Xtensa Performance Monitor Configuration
|
||||
|
||||
@deffn {Command} {xtensa perfmon_enable} <counter_id> <select> [mask] [kernelcnt] [tracelevel]
|
||||
|
||||
Reference in New Issue
Block a user