swjdp_common_t -> struct swjdp_common
Remove misleading typedef and redundant suffix from struct swjdp_common.
This commit is contained in:
@@ -65,7 +65,7 @@ static int cortex_a8_dap_write_coreregister_u32(target_t *target,
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static int cortex_a8_init_debug_access(target_t *target)
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{
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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int retval;
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uint32_t dummy;
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@@ -95,7 +95,7 @@ int cortex_a8_exec_opcode(target_t *target, uint32_t opcode)
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uint32_t dscr;
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int retval;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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LOG_DEBUG("exec opcode 0x%08" PRIx32, opcode);
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do
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@@ -136,7 +136,7 @@ static int cortex_a8_read_regs_through_mem(target_t *target, uint32_t address,
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{
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int retval = ERROR_OK;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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cortex_a8_dap_read_coreregister_u32(target, regfile, 0);
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cortex_a8_dap_write_coreregister_u32(target, address, 0);
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@@ -153,7 +153,7 @@ static int cortex_a8_read_cp(target_t *target, uint32_t *value, uint8_t CP,
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{
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int retval;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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cortex_a8_exec_opcode(target, ARMV4_5_MRC(CP, op1, 0, CRn, CRm, op2));
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/* Move R0 to DTRTX */
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@@ -172,7 +172,7 @@ static int cortex_a8_write_cp(target_t *target, uint32_t value,
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int retval;
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uint32_t dscr;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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LOG_DEBUG("CP%i, CRn %i, value 0x%08" PRIx32, CP, CRn, value);
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@@ -236,7 +236,7 @@ static int cortex_a8_dap_read_coreregister_u32(target_t *target,
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uint8_t reg = regnum&0xFF;
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uint32_t dscr;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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if (reg > 16)
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return retval;
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@@ -277,7 +277,7 @@ static int cortex_a8_dap_write_coreregister_u32(target_t *target, uint32_t value
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uint8_t Rd = regnum&0xFF;
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uint32_t dscr;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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LOG_DEBUG("register %i, value 0x%08" PRIx32, regnum, value);
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@@ -324,7 +324,7 @@ static int cortex_a8_dap_write_memap_register_u32(target_t *target, uint32_t add
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{
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int retval;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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retval = mem_ap_write_atomic_u32(swjdp, address, value);
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@@ -341,7 +341,7 @@ static int cortex_a8_poll(target_t *target)
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uint32_t dscr;
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struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
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struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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enum target_state prev_target_state = target->state;
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uint8_t saved_apsel = dap_ap_get_select(swjdp);
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@@ -405,7 +405,7 @@ static int cortex_a8_halt(target_t *target)
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int retval = ERROR_OK;
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uint32_t dscr;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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uint8_t saved_apsel = dap_ap_get_select(swjdp);
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dap_ap_select(swjdp, swjdp_debugap);
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@@ -443,7 +443,7 @@ static int cortex_a8_resume(struct target_s *target, int current,
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{
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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// breakpoint_t *breakpoint = NULL;
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uint32_t resume_pc, dscr;
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@@ -568,7 +568,7 @@ static int cortex_a8_debug_entry(target_t *target)
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struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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LOG_DEBUG("dscr = 0x%08" PRIx32, cortex_a8->cpudbg_dscr);
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@@ -1179,7 +1179,7 @@ static int cortex_a8_read_memory(struct target_s *target, uint32_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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int retval = ERROR_OK;
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@@ -1214,7 +1214,7 @@ int cortex_a8_write_memory(struct target_s *target, uint32_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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int retval;
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@@ -1271,7 +1271,7 @@ static int cortex_a8_bulk_write_memory(target_t *target, uint32_t address,
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}
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static int cortex_a8_dcc_read(swjdp_common_t *swjdp, uint8_t *value, uint8_t *ctrl)
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static int cortex_a8_dcc_read(struct swjdp_common *swjdp, uint8_t *value, uint8_t *ctrl)
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{
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#if 0
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u16 dcrdr;
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@@ -1300,7 +1300,7 @@ static int cortex_a8_handle_target_request(void *priv)
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if (!target->type->examined)
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return ERROR_OK;
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struct armv7a_common_s *armv7a = target_to_armv7a(target);
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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if (!target->dbg_msg_enabled)
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return ERROR_OK;
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@@ -1340,7 +1340,7 @@ static int cortex_a8_examine(struct target_s *target)
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{
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struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
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struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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int i;
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int retval = ERROR_OK;
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uint32_t didr, ctypr, ttypr, cpuid;
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@@ -1458,7 +1458,7 @@ int cortex_a8_init_arch_info(target_t *target,
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armv7a = &cortex_a8->armv7a_common;
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armv4_5 = &armv7a->armv4_5_common;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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/* Setup cortex_a8_common_t */
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cortex_a8->common_magic = CORTEX_A8_COMMON_MAGIC;
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