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Support two-wire cJTAG OSCAN1 and JScan3 using FTDI adapters

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cJTAG OSCAN1, in lieu of 4-wire JTAG, is starting to be a configuration
option for some SiFive hardware. An FTDI-based adapter that can be
configured to drive the bidirectional pin TMSC is assumed for this
topology. Specifically, the Olimex ARM-USB-TINY-H with the ARM-JTAG-SWD
adapter, connected to a SiFive cJTAG-enabled target board is the only
known concrete topology, currently. But in theory, other FTDI based
devices that can drive a two-wire bidirectional signaling pattern could
be made to work in this scheme in the future.

These code changes are offered as a way to drive that topology. It's
translating IR/DR and JTAG traversal commands to the two-wire clocking
and signaling.

See:
- https://github.com/riscv-collab/riscv-openocd/pull/320
- https://github.com/riscv-collab/riscv-openocd/pull/736

Signed-off-by: Greg Savin <greg.savin@sifive.com>
Signed-off-by: mrv96 <mrv96@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: Ia1daa2c01227c4b0005be947b2bb0de81a800874
Reviewed-on: https://review.openocd.org/c/openocd/+/6981
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2025-07-26 12:17:46 +02:00
parent 181547327f
commit fc8f939d95
6 changed files with 540 additions and 10 deletions
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29
doc/openocd.texi
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@@ -2781,6 +2781,35 @@ minimal impact on the target system. Avoid floating inputs, conflicting outputs
and initially asserted reset signals.
@end deffn
@deffn {Command} {ftdi oscan1_mode} on|off
Enable or disable OScan1 mode. This mode is intended for use with an adapter,
such as the ARM-JTAG-SWD by Olimex, that sits in between the FTDI chip and the
target. The cJTAG prococol is composed of two wires: TCKC (clock) and TMSC (data).
TMSC is a bidirectional signal which is time-multiplexed alternating TDI, TMS and
TDO. The multiplexing is achieved by a tri-state buffer which puts TMSC in Hi-Z
when the device is supposed to take the control of the line (TDO phase).
The ARM-JTAG-SWD adapter uses standard TRST and TMS signals to control TMSC
direction. TRST is used by the adapter as selector for the multiplexers which set
the JTAG probe in 2-wire mode. Whatever signal is used for this purpose, it must
be defined with the name JTAG_SEL using @command{ftdi layout_signal}. JTAG_SEL is
set to 0 during OScan1 initialization.
Some JTAG probes like the Digilent JTAG-HS2, support cJTAG by using a
separate pin to control when TMS is driven onto TMSC. You can use such
probes by defining the signal TMSC_EN using
@command{ftdi layout_signal TMSC_EN -data <mask>}.
@end deffn
@deffn {Command} {ftdi jscan3_mode} on|off
Enable or disable JScan3 mode. This mode uses the classic 4-wire JTAG protocol
in chips whose JTAG port is only compliant with the cJTAG standard (IEEE 1149.7).
Since cJTAG needs a 2-wire escape sequence to select the operating mode,
a cJTAG adapter like ARM-JTAG-SWD by Olimex is still required. This means
that a cJTAG probe configuration script must be used too.
@end deffn
@deffn {Command} {ftdi layout_signal} name [@option{-data}|@option{-ndata} data_mask] [@option{-input}|@option{-ninput} input_mask] [@option{-oe}|@option{-noe} oe_mask] [@option{-alias}|@option{-nalias} name]
Creates a signal with the specified @var{name}, controlled by one or more FTDI
GPIO pins via a range of possible buffer connections. The masks are FTDI GPIO