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jtag: drivers: xlnx-pcie-xvc: Add support for Xilinx XVC/PCIe

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Add support for Xilinx Virtual Cable over PCIe JTAG controller.
It is commonly used in Xilinx based PCI Express designs with JTAG IP
in the FPGA fabric.

Access to the JTAG registers happens via the PCI Express extended
configuration space.

This can be used to debug soft-cores instantiated in the FPGA fabric.

The clang static checker doesn't find any new problems with this change.

Change-Id: Ib12ede0d1f26dacfda808d5e05b947b640c5bde7
Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-on: http://openocd.zylin.com/5314
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Marex
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This commit is contained in:
Moritz Fischer
2019-10-03 20:25:26 -07:00
committed by Oleksij Rempel
parent f22883e8c1
commit ff6d0704ec
5 changed files with 532 additions and 1 deletions
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6
src/jtag/interfaces.c
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@@ -117,6 +117,9 @@ extern struct adapter_driver opendous_adapter_driver;
#if BUILD_SYSFSGPIO == 1
extern struct adapter_driver sysfsgpio_adapter_driver;
#endif
#if BUILD_XLNX_PCIE_XVC == 1
extern struct jtag_interface xlnx_pcie_xvc_interface;
#endif
#if BUILD_AICE == 1
extern struct adapter_driver aice_adapter_driver;
#endif
@@ -225,6 +228,9 @@ struct adapter_driver *adapter_drivers[] = {
#if BUILD_SYSFSGPIO == 1
&sysfsgpio_adapter_driver,
#endif
#if BUILD_XLNX_PCIE_XVC == 1
&xlnx_pcie_xvc_interface,
#endif
#if BUILD_AICE == 1
&aice_adapter_driver,
#endif