 Tim Newsome
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ba2174249d
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Make encoding.h pass style guide.
There's a manual step in commenting this out, but this file changes very
rarely.
Change-Id: I332d6490940ecc81e18c3b112a7ba415331b9c86
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2018-04-20 14:47:27 -07:00 |
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Tim Newsome
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b5dae238a1
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Fix comments in encoding.h.
This was updated in the source a long time ago:
https://github.com/riscv/riscv-opcodes/commit/25881d8a221393cfd996ec074d8003ef31bfc5a6
Change-Id: Ia158205d046522c6802a3a32b330759f5e65566f
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2018-04-20 14:47:27 -07:00 |
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Tim Newsome
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5f86f7208d
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Hide supervisor registers if there is no S mode.
Also update encoding.h.
Change-Id: I275be7de0aa1af64d13ea191b9f4ff391cfb16dc
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2017-12-19 10:41:48 -08:00 |
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Tim Newsome
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4d5f74fbe6
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Update encoding.h.
Change-Id: Id653500aa525746e8824ff5fd2850c62c8c21c08
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2017-11-27 13:23:33 -08:00 |
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Tim Newsome
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cf1dc0b6cb
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Implement hardware triggers that match spec.
It's basically working, but the following corner cases are failing:
TriggerDmode
TriggerLoadAddressInstant
TriggerStoreAddressInstant
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2016-09-23 14:16:24 -07:00 |
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Tim Newsome
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9f22176618
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Reading registers appears to work.
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2016-09-23 14:16:23 -07:00 |
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Tim Newsome
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ea6836c5f6
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WIP, blind coding.
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2016-09-23 14:16:22 -07:00 |
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Tim Newsome
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98f2fa897f
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Halt should work now.
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2016-09-23 14:16:22 -07:00 |
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