Commit Graph

2 Commits

Author SHA1 Message Date
Erhan Kurubas
04c6a6ee0e tcl: add Espressif RISC-V config files
Add configuration files for Espressif RISC-V based chips:
- ESP32-C2, ESP32-C3, ESP32-C6, ESP32-H2 target configs
- Board configs for builtin USB-JTAG and FTDI interfaces

while adding the new config files:
- Fix indentation in existing Espressif config files
- Adapt esp_common.cfg with RISC-V support
- Add explicit 'transport select jtag' to interface configs to avoid
  'DEPRECATED: auto-selecting transport' warning

Change-Id: I45fcbca2fe50888750e2e98a0a6773de86aad6d0
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9195
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2025-11-08 15:59:03 +00:00
Erhan Kurubas
78c87f5e81 target: add Espressif ESP32-S2 basic support
ESP32-S2 is a single core Xtensa chip.
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I2fb32978e801af5aa21616c581691406ad7cd6bb
Reviewed-on: https://review.openocd.org/c/openocd/+/6940
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2022-06-04 08:18:44 +00:00