STMicroelectronics controller SMI is not SPEAr specific.
Rename it and change name to every symbol in the code.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Modified spearsmi driver to include support for STR75x
Added missing initialization in tcl file for STR750
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
If flash chip is not listed in the table, or if no flash is
connected, pointer must be properly initialized.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Rather than having to configure/build jimtcl openocd
will do this as part of its own build.
To use an external jimtcl lib specify disable-internal-jimtcl
to the configure step.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
flash programming via flash write_image or gdb load would
produce a bogus error message that the flash chip was to
small.
The solution is to limit the current flash programming
run to the current chip.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
SMI interface hides the real SPI bus between SPEAr and
external flash.
Added comments to highlight the SPI operation, to help a
future rework in SPI generic and SPEAr specific drivers.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Add support and documentation for STMicroelectronics
SPEAr Serial Memory Interface (SMI).
Code tested on SPEAr3xx only.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
this never panned out and there are enough mistakes in
the code that probably nobody used this.
Use the tcl server and implement a standalone http
app instead works fine.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add comments to assembly flash loader for STM32. Add tiny improvement in
size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%,
as time is wasted on waiting for end of operation anyway).
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
gdb connect can fail when the flash has not been probed.
During gdb connect, the flash layout is reported, but this
can not be automatically detected for a target that is
powered up and OpenOCD supports connecting to gdb server
even if the target is powered down.
The solution is to turn of the gdb_memory_map feature.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
If the CPU crashed at some point, poll will discover this.
Previously the poll fn would clear the error and print a warning,
rather than propagating the error.
The new behavior is to report the error back up, but still
clear the error.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Document "-n" option in manual;
Modify "echo" command definition as COMMAND_HANDLER to
easily add help message
Add help message aligned with manual.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
With the new JIMTCL, "puts" only writes to stdout.
To write on telnet port too, "echo" must be used.
This patch gives to "echo" similar commandline option of "puts".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
add missing error handling.
Output warning when assuming maximum flash size in the
family when failing to read.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Implement autodetection of debug base. Also, implement a function solving
various hardware quirks (like iMX51 ROM Table location bug).
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This patch implements "dap_lookup_cs_component()", which allows to lookup CS
component by it's identification.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
This patch adds function called "dap_detect_debug_base()", which should be
called to get location of the ROM Table. By walking ROM Table, it's possible to
discover the location of DAP.
Sadly, some CPUs misreport this value, therefore I had to introduce an fixup
table, which will be used in case such CPU is detected.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
So far most of the people have been using existing ARM966E in the
place of ARM946E, because they have practically the same scan chains.
However, ARM946E has caches, which further complicates JATG handling
via scan-chain. this was preventing single-stepping for ARM946E when
SW breakpoints are used.
This patch thus introduces :
1) Correct cache handling on memory write
2) Possibility to flush whole cache and turn it off during debug, or
just to flush affected lines (faster and better)
3) Correct SW breakpoint handling and correct single-stepping
4) Corrects the bug on CP15 read and write, so CP15 values
are now correctly R/W
help would not show help for commands when the command
interpreter was in the wrong mode, which means that
e.g. "help newtap" didn't work, it wouldn't show the
"jtag newtap" help as it was a configuration command.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
