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1155 Commits

Author SHA1 Message Date
Peter Horn
d4cd6f0320 cortex_m3: add auto maskisr
This patch extends the cortex_m3 maskisr command by a new option 'auto'.
The 'auto' option handles interrupts during stepping in a way they are
processed but don't disturb the program flow during debugging.

Before one had to choose to either enable or disable interrupts. The former
steps into interrupt handlers when they trigger. This disturbs the flow during
debugging, making it hard to follow some piece of code when interrupts occur
often.

When interrupts are disabled, the flow isn't disturbed but code relying on
interrupt handlers to be processed will stop working. For example a delay
function counting the number of timer interrupts will never complete, RTOS
task switching will not occur and output I/O queues of interrupt driven
I/O will stall or overflow.

Using the 'maskisr' command also typically requires gdb hooks to be supplied
by the user to switch interrupts off during the step and to enable them again
afterward.

The new 'auto' option of the 'maskisr' command solves the above problems. When
set, the step command allows pending interrupt handlers to be executed before
the step, then the step is taken with interrupts disabled and finally interrupts
are enabled again. This way interrupt processing stays in the background without
disturbing the flow of debugging. No gdb hooks are required. The 'auto'
option is the default, since it's believed that handling interrupts in this
way is suitable for most users.

The principle used for interrupt handling could probably be used for other
targets too.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-07-04 11:31:52 +01:00
Spencer Oliver
89fa8ce2d8 Revert "cortex_m3: add auto maskisr"
This reverts commit ff640f197a.

Original patch reverted as Author's name was incorrectly set.
2011-07-04 11:31:52 +01:00
Drasko DRASKOVIC
bad3ee87ac mips_m4k : Fix soft breakpoint endianess handling
In order to compare data read from the target with some marcros or data
defined on the host, we must transform this read data from target
endianess to host endianess.
target_read_memory() gets bytes from target to the host, but keeps them in _target_
endianess. This is OK if we just want to temporary keep this data on the
host, like keeping breakpoint->orig_instr. But if we want to use this
data for any ispections and comparisons on the host side, we must
transform it to _host_ endianess, by using target_buffer_get_u32()
function.
Currently this transformation is missing, and check current_instr ==
MIPS32_SDBBP will never pass if target and host endianess differ,
because current_instr will be kept in _target_ endianess and
MIPS32_SDBBP will be kept in _host_ endianess,

The patch fix this issue by using target_buffer_get_u32() to transform current_instr to
_host_ endianess before comparison.
2011-07-01 21:31:08 +02:00
Spencer Oliver
f6026a8295 jimtcl: update to 0.71 based release
The actual release is 411e92fea9621630eb350e0c2bb43543e553b84f as we
had a few issues relating to its use within openocd.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-29 16:01:54 +01:00
Øyvind Harboe
d567df02b9 dsp5680xx: disable for now, it generates warnings
Use "git revert <commit>" to revert this commit, then build and
repair and post patch to the mailing list.

Warnings generated with:

nios2-elf-gcc (GCC) 3.4.6 (Altera Nios II 9.1 b222)

openocd/src/target/dsp5680xx.c: In function 'eonce_rx_upper_data':
openocd/src/target/dsp5680xx.c:252: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'eonce_rx_lower_data':
openocd/src/target/dsp5680xx.c:268: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'eonce_pc_store':
openocd/src/target/dsp5680xx.c:508: warning: dereferencing type-punned
pointer will break strict-aliasing rules
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_read':
openocd/src/target/dsp5680xx.c:736: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c:737: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_write_8':
openocd/src/target/dsp5680xx.c:823: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_write':
openocd/src/target/dsp5680xx.c:938: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c:941: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_f_wr':
openocd/src/target/dsp5680xx.c:1355: warning: cast increases required
alignment of target type
2011-06-28 18:39:01 +02:00
Øyvind Harboe
2482244b07 mips4k: fix big-endian hosts and host alignment problems
the code was making assumptions about the endianness of the host.
2011-06-28 18:22:32 +02:00
Øyvind Harboe
e4c054cada dsp5680xx: fix compilation problems
use a more specific global variable name than "context", which
can easily conflict with other things.
2011-06-28 18:09:48 +02:00
Spencer Oliver
ff640f197a cortex_m3: add auto maskisr
This patch extends the cortex_m3 maskisr command by a new option 'auto'.
The 'auto' option handles interrupts during stepping in a way they are
processed but don't disturb the program flow during debugging.

Before one had to choose to either enable or disable interrupts. The former
steps into interrupt handlers when they trigger. This disturbs the flow during
debugging, making it hard to follow some piece of code when interrupts occur
often.

When interrupts are disabled, the flow isn't disturbed but code relying on
interrupt handlers to be processed will stop working. For example a delay
function counting the number of timer interrupts will never complete, RTOS
task switching will not occur and output I/O queues of interrupt driven
I/O will stall or overflow.

Using the 'maskisr' command also typically requires gdb hooks to be supplied
by the user to switch interrupts off during the step and to enable them again
afterward.

The new 'auto' option of the 'maskisr' command solves the above problems. When
set, the step command allows pending interrupt handlers to be executed before
the step, then the step is taken with interrupts disabled and finally interrupts
are enabled again. This way interrupt processing stays in the background without
disturbing the flow of debugging. No gdb hooks are required. The 'auto'
option is the default, since it's believed that handling interrupts in this
way is suitable for most users.

The principle used for interrupt handling could probably be used for other
targets too.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-28 14:16:48 +01:00
Peter Horn
e53f7e5fc0 cortex_m3: add BKPT_TYPE_BY_ADDR define
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-28 14:12:00 +01:00
Spencer Oliver
45287bda76 build: cleanup jimtcl generated configure.gnu
We use configure.gnu to pass options to the jimtcl submodule.
Make sure a distclean removes any generated files

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-27 16:08:56 +01:00
Martin Schmölzer
5e2637a4e0 Add description for configure argument "--enable-ulink" to README file 2011-06-26 17:43:51 +02:00
Martin Schmölzer
b851a4949b Add OpenULINK driver files generated by SDCC to .gitignore 2011-06-26 17:43:51 +02:00
Martin Schmölzer
1aba820519 Add -DPKGLIBDIR to AM_CPPFLAGS.
This is required so the OpenULINK driver knows the install location of the OpenULINK
firmware image.
2011-06-26 17:43:51 +02:00
Martin Schmölzer
5141ab3e69 Include ULINK driver in src/jtag/drivers/Makefile.am
A new variable "nobase_dist_pkglib_DATA" is introduced to install
the OpenULINK firmware image to $PREFIX/lib/openocd/OpenULINK/ulink_firmware.hex

Also, the variable "EXTRA_DIST" is used to include the OpenULINK firmware source
in the OpenOCD source distribution.
2011-06-26 17:43:51 +02:00
Martin Schmölzer
29f6f6ae5f Include ULINK driver in src/Makefile.am 2011-06-26 17:43:51 +02:00
Martin Schmölzer
379abb9167 Include ULINK driver in configure.in 2011-06-26 17:43:51 +02:00
Martin Schmölzer
b4bbe33d17 Add ULINK interface script 2011-06-26 17:43:51 +02:00
Martin Schmölzer
f279e54347 Include ULINK driver in src/jtag/interfaces.c 2011-06-26 17:43:51 +02:00
Martin Schmölzer
3c3f3c4247 Add OpenULINK firmware
Build requires SDCC, the Small Device C Compiler.
2011-06-26 17:43:51 +02:00
Martin Schmölzer
03e4ae8481 Add source code for new ULINK driver 2011-06-26 17:43:50 +02:00
Drasko DRASKOVIC
37aaa28292 Fix load_image for ELF with all p_paddr set to zero
So far image_load command tries to load ELF binaries to address
discovered by reading p_paddr member of a Program header of an ELF
segment.

However, ELF specifications says for p_paddr : ...Because System V
ignores physical addressing for application programs, this member has
unspecified contents for executable files and shared objects.

ARM ELF specifiaction goes even further, demanding that this member
be set to zero, using the p_vaddr as a segment load address.

To avoid the cases to wrong addr where p_paddr is zero,
we are now using p_vaddr to as a load destination in case that *all*
p_paddr == 0. Basically, this patch re-implements the approach present in
BDF's elf.c, which is used by GDB also (so that we can be consistent).
2011-06-24 11:00:35 +02:00
Spencer Oliver
e7c611deea build: do not included generated files in distribution
We have to use this method as automake seems to ignore nodist_ on libs.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-17 12:22:37 +01:00
Spencer Oliver
16cbe1216a build: add missing files to make dist
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-17 12:21:01 +01:00
Spencer Oliver
9cac49caee build: pass correct flags to jimtcl during make distcheck
This is only for the case of a make distcheck.
During a normal release build these flags will be created by configure.gnu

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-17 09:31:13 +01:00
Spencer Oliver
3428035a7e build: add missing files from dist release
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-06-17 09:31:13 +01:00
Tomek CEDRO
37d5ac6378 ADAPTER: Fixed transport selection mechanism to support transports other than jtag (if defined). 2011-06-16 19:49:54 +02:00
Tomek CEDRO
9f40d41f68 OPENOCD: Renamed ambiguous main2() into openocd_thread() to show possible solution for thread support in future. 2011-06-16 17:27:12 +02:00
Dale Lukas Peterson
523c172280 Added Olimex STM32 {H,P}107.cfg board 2011-06-16 16:53:49 +02:00
Øyvind Harboe
c8b5719802 transport: move files over to transport folder
as we introduce swd and jtag as two transports, we want
to start up with a new transport folder to organize the
code a bit.
2011-06-13 15:51:04 +02:00
Øyvind Harboe
1b0862c189 HACKING: add tip on how to write comments 2011-06-12 11:33:37 +02:00
rlrosa
5227ae7162 added minimodule interface 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
47aa65b3e8 doxy more 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
d343941386 doxy & cleanup 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
cbe201fe6b fix protection behavior 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
7b0ead520d cleanup trailing whitespaces 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
f4b9a2fc8b flash speed improved 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
ca76e4a423 removed unnecessary actions/controls 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
c4bcb0b95a cleanup flash module command 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
d539fc856f fix read for verify_image 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
f42353d821 fix read speed improved by queueing commands 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
f4a3db0d4a fix flash driver size, sector erase 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
56d3927abf Added minimodule (ftdi) interface 2011-06-12 11:18:27 +02:00
Laurent Charpentier
e899fcaca0 Added configuration file for STM3220G-EVAL board. 2011-06-08 07:19:43 +02:00
Laurent Charpentier
01c0ffe98f Added configuration file for stm32f2xxx. 2011-06-08 07:19:39 +02:00
Øyvind Harboe
33f9bec9ec Silence -O3 warning 2011-06-07 17:58:41 +02:00
Freddie Chopin
1cfb2287a6 Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - leftover changes 2011-06-07 17:53:33 +02:00
Stefan Mahr
5d9b7cdd2b mips: add nor flash write from memory block 2011-06-05 22:45:21 +02:00
Rodrigo L. Rosa
c989de0cea crc check on flashed data 2011-06-04 09:52:14 +02:00
Rodrigo L. Rosa
d09bef2622 code cleanup 2011-06-04 09:52:14 +02:00
Freddie Chopin
f499bab698 Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - dubious fixes 2011-06-04 09:46:48 +02:00
Freddie Chopin
f6315d5e5b Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixes 2011-06-04 09:35:13 +02:00
Bear
ae02a0e517 uptech2410 2011-06-02 12:17:28 +02:00
Tormod Volden
fa1f2682d4 bootstrap: Various code improvements
- Do not specify -e twice.
- Use "which" instead of calling commands that might not exist.
- Fix bashism ("==" is C not sh)
- Carefully quote potentially empty variables
- Check command arguments before doing anything
- Rewrite argument checking to be more easily extensible
- Consistent indentation
- UNIX style error messages
2011-06-01 21:45:50 +02:00
Stefan Mahr
796086cd49 mips: fixup fastdata
fixup fastdata
2011-06-01 07:23:42 +02:00
Stefan Mahr
524d79ebe7 mips: fix some more endian madness 2011-06-01 07:23:35 +02:00
Laurent Charpentier
4da551732e bootstrap: fix argument handling
- no argument => run submodule init
- "nosubmoudle" => do not run submodule
- other values => error message
2011-06-01 07:21:11 +02:00
Damjan Marion
096fd6bcc0 Board definition for mini6410/tiny6410 (ARM1176)
The following mini6410/tiny6410 functions are available:
init_6410 - initialize clock, timer, DRAM
init_6410_flash - initializes NAND flash support
install_6410_uboot - copies u-boot image into RAM and runs it
2011-05-29 23:42:09 +02:00
Stefan Mahr
875298bc53 mips: fix swapping if running on big endian host 2011-05-29 23:21:23 +02:00
Damjan Marion
ba576920cf SMDK6410 is not target, move file to board 2011-05-29 20:05:01 +02:00
Damjan Marion
9b4628ddab Fixed values for Samung NAND chips 2011-05-28 19:44:17 +02:00
Damjan Marion
db91a36fdd Improve NAND flash detection
Detect based on both manufacturer id and chip id
if manufacturer id is defined in table
2011-05-28 14:30:58 +02:00
Damjan Marion
acdf14eb43 Reorganize NAND flash table
- added manufacturer field
- name moved to the end for better text alignment
2011-05-28 14:27:48 +02:00
Stefan Mahr
73988aea1f mips: fix swapping if openocd is running on big endian host 2011-05-28 14:25:06 +02:00
Alan Bowman
212db44fcf Report actual current thread 2011-05-25 22:05:26 +02:00
Alan Bowman
a57daf23db Add eCos/Cortex RTOS support 2011-05-25 22:05:23 +02:00
Stefan Mahr
6d6837f988 add support for spansion flash on mindspeed c300 eval board
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
2011-05-25 22:02:40 +02:00
Spencer Oliver
5d7d08a1f0 dsp5680xx: whitespace cleanup
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-05-23 10:23:34 +01:00
Spencer Oliver
d16b0ea6d4 Fix build issue under cygwin
cygwin does not define sleep, so use our internal win32 version.
caused by commit 9d4aec6bda

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-05-23 10:22:12 +01:00
Rodrigo L. Rosa
ef599aebfd flashing speed improved using queued jtag. error propagation improved. 2011-05-19 07:27:02 +02:00
Jie Zhang
ee124401a2 Get register value if it's invalid in cache. 2011-05-18 18:52:20 +02:00
Alan Bowman
6d9f61fb65 Corrected test for invalid current_threadid 2011-05-18 18:51:10 +02:00
Rodrigo L. Rosa
129f099ef1 flash support (only full erase/write) for 568013 and 568037 2011-05-18 18:47:55 +02:00
Rodrigo L. Rosa
9d4aec6bda partial support for 568013 and 568037, target integration. 2011-05-18 18:47:50 +02:00
Alan Bowman
6349a47ebc Correct stacking direction and use of address offset 2011-05-14 16:59:29 +02:00
Michel Jaouen
53c0fb6ef5 cortex a : smp doc update 2011-05-09 21:50:44 +02:00
Øyvind Harboe
289cecebf0 beagleboard: add support for various icepick versions
The beagleboard icepick jtag tap id's vary.
2011-05-05 15:47:12 +02:00
Jonas Hoerberg
2889471b58 at91rm9200-ek: add low default communication speed 2011-05-05 15:43:37 +02:00
Alexandre Pereira da Silva
522d5b84e2 Add support for the lpc2460 target 2011-05-03 22:07:01 +02:00
Alexandre Pereira da Silva
743fada06a Make the lpc2xxx generic driver support romless parts 2011-05-03 22:06:57 +02:00
Jie Zhang
7d8053e93f Remove useless MIPS code in avr32_ap7k.c. 2011-05-03 21:59:08 +02:00
Jonas Hörberg
e3f3f60a02 adapter speed: require init script setting and centralize activation from drivers to core.c
Signed-off-by: Jonas Hörberg <jhorberg@sauer-danfoss.com>
2011-05-01 00:38:04 +02:00
Øyvind Harboe
5c739b148e ecos: add 64 bit types for sprintf/sscanf 2011-04-28 22:17:48 +02:00
Michel Jaouen
d2911627d2 u8500.cfg : ste u8500 support 2011-04-28 12:22:47 +02:00
Michel Jaouen
1e7e594452 gdb_server : 'R' command replied by OK 2011-04-28 12:22:39 +02:00
Michel Jaouen
5578935eff cortex_a : smp support
Conflicts:

	src/target/cortex_a.c
2011-04-28 12:22:29 +02:00
Michel Jaouen
b778b36f29 smp : infra for smp minimum support 2011-04-28 12:22:10 +02:00
Øyvind Harboe
36d60ee6c8 cfi: leave check on whether target is running to target_write_memory()
there was a check in clearing the status register that
called exit() if the target was running. target_write_memory()
has such a check and will report the error correctly.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-27 23:02:28 +02:00
SimonQian
5bd1f0bad4 add STM32F2 revY 2011-04-26 12:05:07 +02:00
SimonQian
2e88162b00 remove read of flash_size in STM32F2 2011-04-26 12:04:57 +02:00
Damjan Marion
5d987bca9c buspirate: fix building on some OSes 2011-04-26 11:55:54 +02:00
Michel Jaouen
3c6af518b3 rtos : compilation error on amd64 2011-04-19 12:53:56 +02:00
Alexandre Pereira da Silva
32ede8fa21 Fix non cfi x16 nor flash connected to x8 bus. The ids in the table should be masked before comparison. 2011-04-19 12:53:05 +02:00
Alexandre Pereira da Silva
e105915a4a Make the LPC32xx nand driver support up to 5 address cycles. This will only work in the SLC driver. 2011-04-19 12:51:49 +02:00
Alexandre Pereira da Silva
2ed19d3b9b Make the LPC32xx slc nand driver the default 2011-04-19 12:51:36 +02:00
Øyvind Harboe
e984dc1f16 jtag: clarify jtag->init() and jtag->quit() definitions
only set jtag global pointer if jtag->init() succeeds. Less code,
more clear what the rules are.

Fix nit that error value from init() was not propagated unmodified.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-19 12:43:16 +02:00
Broadcom Corporation (Evan Hunter)
b69119668e RTOS Thread awareness support wip
- works on Cortex-M3 with ThreadX and FreeRTOS

Compared to original patch a few nits were fixed:

- remove stricmp usage
- unsigned compare fix
- printf formatting fixes
- fixed a bug with overrunning a memory buffer allocated with malloc.
2011-04-15 08:24:18 +02:00
Spencer Oliver
f9feeacb7f pic32: update pic32mx flash driver
Update devices as per the latest programming manual.

We now use the full DEVID to identify the target. Previously we used
a 8bit id but that has now been changed in the manual.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-04-14 09:17:17 +01:00
Luca Ellero
ecd5e5de7f Replace byte-access to memory with faster word-access
Freescale iMX53 doesn't seem to like unaligned accesses to his memory
mapped registers.
Anyway this patch makes dump_image/load_image 4X faster for every
access through APB.

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13 21:33:11 +02:00
Luca Ellero
81f238f522 Add opcodes for load/store registers words immediate post-indexed
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13 21:32:24 +02:00
Luca Ellero
041953f3b1 Add preliminary support for Freescale iMX53
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13 21:32:00 +02:00
Alexandre Pereira da Silva
5cc83a880a Add the REV A tap id to the LPC3250 configuration 2011-04-13 21:28:44 +02:00
Michel JAOUEN
08303f10aa cortex_a :apb mem read/write working with mmu_on
Conflicts:

	src/target/cortex_a.c
2011-04-13 10:57:02 +02:00
Michel JAOUEN
28ddd16ddc cortex_a : multiple target on the same dap 2011-04-13 10:56:52 +02:00
Michel JAOUEN
a7844aa4e8 cortex_a : use dap ref from armv4_5common 2011-04-13 10:56:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD
d6027ca6a8 at91: add at91sam9263 chip register definition
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 19:19:36 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ba71e8c521 at91: add chip register definition and generic init support
for
 - pio
 - pmc
 - rstc
 - wdt
 - sdramc
 - smc

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 19:18:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
28e6dcee85 add at91sam9263-ek support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:16:28 +02:00
Jean-Christophe PLAGNIOL-VILLARD
22437fac28 add at91sam9261-ek support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:14:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5d538084be at91: add at91sam9261 chip register definition
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:13:59 +02:00
Jean-Christophe PLAGNIOL-VILLARD
13cf987bb8 jlink: jlink_debug_buffer use inline function when _DEBUG_USB_COMMS_ not define
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:12:08 +02:00
Ali Lown
c7a17b8466 Buffering for up to 64 bytes in USB Blaster.
Uses a global buffer.
Add self to acknowledgements.
2011-04-08 18:26:09 +02:00
Ali Lown
24943498e6 Add support for LED to USB Blaster code. 2011-04-08 18:26:09 +02:00
Spencer Oliver
becfbeaacd build: correctly use AC_LANG_PROGRAM
With newer versions of autoconf >= 2.68 we receive warnings about the
incorrect use of AC_LANG_PROGRAM. This fixes those warnings.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-04-06 09:12:34 +01:00
Michel JAOUEN
5e86c5173c cortex_a : implement jtag console for cortex_a 2011-04-06 06:45:39 +02:00
Drasko DRASKOVIC
719f9ecde3 Added mips_ejtag_drscan_32_out() for optimization. 2011-04-05 08:21:29 +02:00
Drasko DRASKOVIC
bc9afcd4d1 Corrected waiting on PrAcc in wait_for_pracc_rw(). Added necessary check that PrAcc is "1" before FASTDATA access. 2011-04-05 08:21:25 +02:00
Drasko DRASKOVIC
b125689459 Added correct endianess treatment for big endian targets. Now it is possible to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times). 2011-04-05 08:21:17 +02:00
Øyvind Harboe
3fea99097e pandaboard: use new -dbgbase option to workaround broken ROM table
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-02 09:00:01 +02:00
Øyvind Harboe
a1d9f16320 cortex_a: delete dbgbase hack vestiges
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 21:00:44 +02:00
Michel JAOUEN
930d70f1a3 cortex_a: fix gaffe in first implementation of -dbgbase 2011-04-01 18:59:02 +02:00
Øyvind Harboe
3b7c9585db Merge remote branch 'origin/master' into HEAD 2011-04-01 13:02:24 +02:00
Øyvind Harboe
a0b83e82f7 mips: fix gaffe in previous commit
accidentally invoked return jtag_execute_queue() in the
middle of a fn. Hmm.... I would have expected gcc or
at least lint to catch this.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 12:32:41 +02:00
Øyvind Harboe
977df18f50 cortex_a: remove broken dbgbase patchup code
the patchup code would get false positives when checking
whether a dbgbase had to be corrected.

The solution is to have autodetect default, with manual override
in scripts.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 10:00:41 +02:00
Phil
364cfaac1d Added s19 to (fast_)load_image documentation to match the online help. 2011-04-01 09:02:03 +02:00
Øyvind Harboe
378567da4e mips: illustrates how to improve performance
Do not require unecessary roundtrips for clocking out
data.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 08:59:11 +02:00
Øyvind Harboe
2615bf4398 types: write memory now uses const
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 08:59:07 +02:00
Øyvind Harboe
d76fd2aac7 mips: delete kludgy code that modifies data sent to write_memory()
Could this cause confusion as data sent to write would be flipped
and then if the caller subsequently used the data, e.g. a
compare mismatch might happen?

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
1b9e80f7e6 startup: fix bugs in cleanup upon errors during startup
Importantly adapter cleanup will now happen upon startup failure.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
0c1ebf2673 mips: mips32_pracc_exec error propagation fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
83ab5ad240 mips: mips_ejtag_get_impcode error propagation added
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
667c65552e mips: fix mips_ejtag_set_instr error handling
this fn does not fail, it queues data.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:36:45 +02:00
Øyvind Harboe
e1f5055bb0 mips: fix error handling for jtag_execute_queue()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:08:53 +02:00
Øyvind Harboe
f169f86bd1 xscale: fix gaffe in phys write
it would *read* instead of *write* to memory
when the MMU was disabled.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 18:46:14 +02:00
Øyvind Harboe
8d338f3296 cortex-a: use -dbgbase option
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 09:30:48 +02:00
Øyvind Harboe
b75bdb7b04 target: add -dbgbase option to target configuration
Really a Cortex-A specific option, but there is no
system in place to support target specific options
currently and there has been no need for such a system
until now.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 09:30:48 +02:00
Olivier Schonken
ac6f8f9616 at91sam3: Modified cidr comparisson to ignore version bits
production processor versions increment, thus the version
bits should be ignored for future proofing. e.g.
Engineering sample version == 0x00, production version 0x01
2011-03-30 16:01:00 +02:00
Øyvind Harboe
3e83991560 docs: add HACKING file to help users get started with patches
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-30 15:58:11 +02:00
Alexandre Pereira da Silva
56f705525c Clarify LPC32XX address cycles message
Hi,

This is a more descriptive message about LPC32XX error, when the nand
chip needs 5 address cycles.

Thanks.
2011-03-30 08:04:15 +02:00
Alexandre Pereira da Silva
54ec0c4a8a Add Micron 2GiB nand
Hi,

This will add support for a new nand chip device.

Thanks.
2011-03-30 08:04:01 +02:00
Andrew Lyon
be14e8cbb0 bugfix for step <address> mips_m4k
The patch below fixes step <address> on mips_m4k.

Spencer Oliver <spen@spen-soft.co.uk>:

The current code is used on all other arch's - is
there a underlying issue with those aswell ?
2011-03-29 12:50:54 +02:00
Øyvind Harboe
68bd107c6d command: fix leak when executing commands
found via valgrind, not observed/reported.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-27 23:51:30 +02:00
Øyvind Harboe
dec80e1cff cortex_a: rename cortex_a8.c/h to cortex_a.c/h
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 11:29:10 +01:00
Øyvind Harboe
a843789ede omap4430: tried to add in workaround for broken dbgbase query
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 09:21:16 +01:00
Øyvind Harboe
fc574c64bb cortex a9: merge cortex a9 and a8 code
better to keep this in a single file.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 09:10:21 +01:00
Øyvind Harboe
6c5e1781a1 omap4430: cortex a9 and a8 are now merged again
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 09:10:21 +01:00
Øyvind Harboe
ec2b8d71ac zy1000: fix bug in ir scan handling
set cur_instr to BYPASS as optimisation code will
rely on checking the cached value.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-21 13:47:02 +01:00
Øyvind Harboe
a343570195 zy1000: removed JTAG master TCP/IP server
Move ZY1000 OpenOCD driver more in the direction of being
a client to simplify code.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-21 08:11:03 +01:00
Øyvind Harboe
17201b5847 dsp563xx_once: fix warning and potential bug
I don't think dsp563xx_once_read_register() would ever
be called with len==0, but it would have been broken in
that case.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-20 19:47:58 +01:00
Øyvind Harboe
558f760ff0 zy1000: add code to check that SRST asserts
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-18 13:29:24 +01:00
Mathias K
4332bc32e4 target: allow targets to override memory alignment
Targets can implement read/write_buffer to handle
alignment.
2011-03-17 14:18:16 +01:00
John and Tina Peterson
9f17b30f88 SYS_WRITE0 fix
Problem is, trying to print "Hello, world!\n" just prints endless H's, because r1 is never incremented.

One way to fix it would be to add a "++" after "r1".
2011-03-17 07:34:44 +01:00
Uwe Hermann
33a17fd359 Fix a bunch of typos.
Fix a bunch of typos.

Most are in code comments, so nothing should break. UNKOWN_COMMAND and
CMD_UNKOWN are not used elsewhere, so correcting the spelling should
also not break anything.
2011-03-17 07:25:25 +01:00
Øyvind Harboe
582b4195a9 dsp563xx: fix alignment warnings
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-15 16:30:44 +01:00
Øyvind Harboe
9b1d38707c dsp563xx: fix bug in x buffer handling
found by inspection.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-15 16:29:52 +01:00
Øyvind Harboe
9eeb02c165 zy1000: switch to pthread
pthreads work under Linux and eCos.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-15 10:36:17 +01:00
Øyvind Harboe
2321bb3c42 zy1000: fix JTAG over TCP/IP performance problem
only flush write queue just before waiting for more data,
rather than when fetching more data from the buffer.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-15 10:36:16 +01:00
Øyvind Harboe
4da640563b zy1000: fix incorrect usage of jtag_sleep()
Found by inspection: the correct thing in the context is to use
usleep() rather than jtag_sleep(). Relates to JTAG over TCP/IP
only.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-15 10:36:16 +01:00
Øyvind Harboe
bb0d11cba9 jtag: clean up jtag_sleep, handle short sleeps correctly via usleep
short sleeps are handled via usleep, longer sleeps we round up
to nearest ms.

There was a bug in jtag_sleep() in that it would round *down*
to nearest ms, thus making all <1ms sleeps 0. Found by inspection
rather than symptom.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-15 10:36:16 +01:00
Øyvind Harboe
689c244389 zy1000: reduce memory usage for fw upgrade fn
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-15 09:52:37 +01:00
Aaron Carroll
59a6380a17 omap4430: add Blaze config
Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
2011-03-13 14:59:39 +01:00
Aaron Carroll
cc9939879c omap4430: force hardware breakpoints for GDB
Soft breakpoints are currently broken if the MMU is enabled due to incorrect
cache flushing.  Until this is fixed, force the use of hardware breakpoints.

Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
2011-03-13 14:58:57 +01:00
Jean-Christophe PLAGNIOL-VILLARD
8e85bb4eea jlink: add Emulator configuration support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-13 14:55:20 +01:00
Jean-Christophe PLAGNIOL-VILLARD
2c4f7f1dd4 jlink: add detect hw type
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-13 14:55:03 +01:00
Jean-Christophe PLAGNIOL-VILLARD
bce76b80cc jlink: use tap buffer as 2k
as said in the datasheet Section 3.3.2 Organization of buffers

All buffers are big enough to hold 2 KByte of data.

this will double the speed of download

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-13 14:54:50 +01:00
Jean-Christophe PLAGNIOL-VILLARD
952de89bfe jlink: add capability dumper and command
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-13 14:54:32 +01:00
Mathias K
0123985abc ft2232: fix log message and change log output to debug 2011-03-03 23:03:34 +01:00
Jean-Christophe PLAGNIOL-VILLARD
df500c5a04 at91: add at91sam9g45 support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
a4bf71386b at91: add at91sam9g10 support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
aebc0d5556 at91sam9260: update sram information
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
f6783d4465 at91: add at91sam9263 support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:47 +01:00
Jean-Christophe PLAGNIOL-VILLARD
26db0a6bef at91: add at91sam9261 support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:46 +01:00
Jean-Christophe PLAGNIOL-VILLARD
e941805713 at91sam9: factorise cpu support
all at91sam9 are nearly the same except sram and soc name

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-03-03 22:49:46 +01:00
Jean-Christophe PLAGNIOL-VILLARD
0eed61b7c4 jlink: add jlink_pid to specify the pid to use
this will allow us to use multiple jlink at the same time as when
the USB-Address is specified the PID change from 0x0101 to
(0x101 + usb_adress)

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2011-03-02 19:04:16 +01:00
Jean-Christophe PLAGNIOL-VILLARD
b992dd58f1 jlink: switch commands to subcommands
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2011-03-02 19:04:00 +01:00
Jean-Christophe PLAGNIOL-VILLARD
99cd373019 jlink: harmonise the device name to J-Link
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2011-03-02 19:03:44 +01:00
Jean-Christophe PLAGNIOL-VILLARD
2ed3f55547 jlink: add new PID and VID
The default pid of the segger is 0x0101
But when you change the USB Address it will also

pid = ( usb_address > 0x4) ? 0x0101 : (0x101 + usb_address)

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2011-03-02 19:03:25 +01:00
Øyvind Harboe
e5677ce9e5 svf: add nil option that just runs through the svf file
useful for debugging without access to hardware to e.g.
regression test, reproduce memory corruption problems,
etc.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-02-28 08:54:48 +01:00
Øyvind Harboe
95de667e24 log: debug level is between silent and debug output levels
It wasn't previously possible to silence the output.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-02-25 16:36:42 +01:00
Øyvind Harboe
c3c6a6e1d4 jtag: add wait_srst_deassert command
Useful to do something *real quick* after a SRST deassert.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-02-25 16:36:42 +01:00
Mathias K
6ddcee7d20 ft2232: fix possible read buffer overflow
This patch fix a possible read buffer overflow in ft2232_execute_queue.
Also the correct read queue size for libftdi and libftd2xx was added and
and tested.
In function ft2232_write a uninitialized value was initialized because we
don't know if this value was set in the ftdi api call.
2011-02-24 23:20:03 +01:00
Luca Ellero
47b5829db4 cortex_a8: remove dap_ap_sel calls
add new mem_ap_sel_* functions (as was made for cortex_a9)
see commit: 779005f43d

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-23 08:14:41 +01:00
Jean-Christophe PLAGNIOL-VILLARD
f26cd96740 add at91rm9200-ek board support
tested with jlink sam-ice v5 while loading barebox

(gdb) load
Loading section .text, size 0x2f190 lma 0x21f00000
Loading section .rodata, size 0x931c lma 0x21f2f190
Loading section .data, size 0x29e8 lma 0x21f384ac
Loading section .barebox_cmd, size 0x78c lma 0x21f3ae94
Loading section .barebox_initcalls, size 0x80 lma 0x21f3b620
Start address 0x21f00000, load size 243360
Transfer rate: 26 KB/sec, 13520 bytes/write.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-02-23 08:13:59 +01:00
Jean-Christophe PLAGNIOL-VILLARD
05abfbadf1 jlink: set the speed at JLINK_MAX_SPEED when an exceeded speed is requested
it will allow to be at the highest speed of the jlink without touching the
board or cpu config

tested on sam-ice v5 and at91rm9200-ek

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-02-23 08:13:59 +01:00
Mathias K
403e239960 dsp563xx: rudimentary gdb support
This patch add rudimentary gdb support. The gdb register list
order is corrected. All registers are now 32bit width. Events are
send to signalize gdb the current target status. Resume and step
function was corrected to consider a modified pc register. Read/write
memory now support L memory type, this means a memory with alternating
y/x memory words. The memspace variable, used by gdb, is now observed
before a default memory access is initiated. Dummy functions for breakpoint
and watchpoint are added.
2011-02-21 21:30:47 +01:00
Edgar Grimberg
6ebac1b829 gitmodules: use http protocol for git2cl module
Use the http protocol for git2cl module, as it makes it easier for the
firewall safe mirror to keep all submodules firewall safe.

Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
2011-02-21 07:52:46 +01:00
SimonQian
2bd6a4795a fix compile error under MinGW 2011-02-18 13:54:22 +01:00
Luca Ellero
578294dbdd stm32: add ID for medium density device Rev Z
stm32-discovery evaluation board (STM32F100RBTB6):
reading device id register (0xE0042000) returns 0x10010420

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-18 08:08:31 +01:00
Luca Ellero
fa93174a56 arm_adi_v5: add/move apsel member in struct adiv5_dap
This patch tries to make some order in "apsel" mess.
"dap apsel" command was quite useless (and broken) by itself.
With this patch we can use it to select between AHB or APB memory access
(previous patch 05ab8bdb81 was somehow broken).

- moves member apsel (in struct adiv5_dap) to ap_current
- adds apsel member

this strange choice is made trying to keep coherence in "dap apsel" command
 and to keep compatibility with other code (for example cortex_a8).

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-17 09:28:07 +01:00
Mathias K
01edbc2c3f dsp563xx: minor fixes, code cleanup
This patch move the dsp563xx_target_create function to the
related code block. Also the target examine function was added
and the register cache is initialized in a separate function. The
missing functionality to invalidate the x memory context on memory
writes was also added.
2011-02-17 09:22:21 +01:00
Mathias K
b7163f534a dsp563xx_once: Correct wrong return value on jtag communication errors
This patch change the return value on a jtag communication error
to TARGET_UNKNOWN because this function should return the current
target status and not a error code from the underlying api call.
Also the validity of the jtag_status is extended to all static
bits in this value.
2011-02-17 09:22:17 +01:00
Mathias K
0f863ecb01 - remove pipeline context, use once register instead - fix wrong register write in resume and step function - add more conditional branch handling 2011-02-17 08:24:17 +01:00
Bjarne Steinsbo
3f4b9e334b lpc32xx: Flash driver
Based on the lpc3180 driver, but released as a separate driver for two reasons:
 1) I don't have an lpc3180 to test it against, so it might unintentionally break compatibility.
 2) It's using a different OOB layout than lpc3180.

Rewritten so that it no longer borrows code from the NXP CDL library.  Instead borrowing code from the u-boot port to lpc32xx, written by Kevin Wells.

Tested on lpc3250 (Hitex LPC3250-Stick).  OOB layout is compatible with LPCLinux.
2011-02-15 20:23:40 +01:00
Mathias K
fe0894015f - add parameter flush to the once api to signalize if the jtag queue need to be flushed after the command 2011-02-15 20:20:00 +01:00
Mathias K
aa9baf11a8 - add bulk memory write function - execute jtag queue at the end of the memory transfer 2011-02-15 20:19:55 +01:00
Phil Fong
17a6ffa0c7 dsp563xx_once: Correct definition of JTAG_INSTR_CLAMP
I've been working on Rodrigo on adding support to flash
Freescale dsp56800e devices and have been looking at the
dsp563xx code.  I think the define for the JTAG CLAMP
instruction in dsp563xx_once.c is incorrect.  It should
be 0x05 according the Freescale AN2074 (and is also
0x05 in the dsp568xx according to AN1935).  It won't
actually change anything in OpenOCD since this define
is not used anywhere (as far as I can tell).
2011-02-15 20:17:33 +01:00
Mathias K
422e9f9b41 ft2232: add functions for ft2232 set data bits high/low byte command
reduce duplication. No change in behavior.
2011-02-14 15:32:12 +01:00
Luca Ellero
779005f43d cortex_a9: move dap_ap_select to arm_avi_v5
dap_ap_select was used in the code at various points, but that can lead to
confusion, without any knowledge of what AP is really selected at some
points.
Some bugs derive from this (for example md/mw doesn't work well after
issueing "dap apsel" command).
Moving it to arm_adi_v5.c (using  mem_ap_sel* functions instead of mem_ap_*)
make the code more clear and more easier to maintain.
In the future it should be made "static" to avoid its use outside arm_adi_v5

One further benefit is the various goto has been removed as well

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero
bc404041c0 arm_adi_v5: add wrapping transfer functions with selection of ap
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero
dcc9624b98 arm_adi_v5: add transfer functions prototypes with selection of ap
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero
aaa52e16ce cortex_a9: check if MMU is enabled on APB read/write memory
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero
f609d03f1f cortex_a9: check target halted on APB read/write memory
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Luca Ellero
28b953d0bd cortex_a9: trivial fixes
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-14 15:29:25 +01:00
Spencer Oliver
177fe9d762 buikd: fix cygwin -mno-cygwin build error
Remove duplicate inline that causes certain versions of gcc to choke.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-02-10 13:57:30 +00:00
Luca Ellero
05ab8bdb81 cortex_a9: implement read/write memory through APB-AP
This patch adds read/write capability to memory addresses not
accessible through AHB-AP (for example "boot ROM code").

To select AHB or APB, a "dap apsel" command must be issued:
dap apsel 0 -> following memory accesses are through AHB
dap apsel 1 -> following memory accesses are through APB

NOTE: at the moment APB memory accesses are very slow, compared
      to AHB accesses. Work has to be done to get it faster (for
      example LDR/STR instead od LDRB/STRB)

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-10 10:07:56 +01:00
Aaron Carroll
94e90cbf16 cortex_a9: fix dap_ap_select() usage
Save, select and restore AP in cortex_a9_step and cortex_a9_init_debug_access.
Fixes a bug where the wrong AP is selected after a reset.

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-02-10 09:57:17 +01:00
Michal Demin
405b7a458d buspirate: Fix command parsing, fix errors to have more sense.
Signed-off-by: Michal Demin <michaldemin@gmail.com>
2011-02-08 12:12:40 +01:00
Mathias K
b21be6054a performance: committed wrong version of buf_set_buf optimization
oops...

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-02-08 11:06:56 +01:00
Luca Ellero
6684b35346 omap4430: Add JRC TAPID for PandaBoard REV EA1 (PEAP platforms)
PandaBoard REV EA1 (Panda Early Adopter Program) has a different ID.
This patch add alternate REV EA1 TAP id to configuration file

Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-08 09:51:54 +01:00
Mathias K
08bf273def dsp563xx: add x, y and p memory access
Hello,

this patch add commands to access to x,y and p memory. For run time optimization some local jtag
function was changed to static inline.

Regards,

Mathias
2011-02-08 09:45:01 +01:00
Luca Ellero
d51b561b10 cortex_a8/a9: fix some comments
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-02-08 09:42:43 +01:00
Mathias K
706284a8fd buf_set_buf around 30% speed increase
Also i have checked the input of this function and in many cases
a simple byte copy is possible.

I have added this check now and is it possible the buffer is
copied byte by byte and not bit by bit.

With byte boundary input the test looks like this:

buf_set_buf 0x02000000 iteration test:
runtime (seconds): old: 6.828559 new: 0.436191 diff: 6.392368
runtime (seconds): old: 6.853636 new: 0.430389 diff: 6.423247
runtime (seconds): old: 6.794985 new: 0.423065 diff: 6.371920

Without:

buf_set_buf 0x02000000 iteration test:
runtime (seconds): old: 6.370869 new: 5.552624 diff: 0.818245
runtime (seconds): old: 6.420730 new: 5.665887 diff: 0.754843
runtime (seconds): old: 6.583306 new: 5.599021 diff: 0.984285

Regards,

Mathias
2011-02-08 09:39:59 +01:00
Øyvind Harboe
5ca7cbe2d2 stm32x: add support for STM32F20x
ready for wider testing and comments on basic erase + programming.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-02-04 10:55:43 +01:00
Mathias K
75cdbff5aa more changes to dsp563xx code
Hello,

this patch adds the missing cpu registers and the correct read/write register functions and fixed
most of the halt/step/resume issues. The complete missing error propagation was added.

+ fix tab/spaces

Regards,

Mathias
2011-02-03 12:28:17 +01:00
Mathias K
b0bdc4e2f2 24bit buffer support
Hello,

this patch add 24bit support to the target buffer functions and little/big endian functions.

Regards,

Mathias
2011-02-03 12:23:55 +01:00
Aaron Carroll
aaf145c422 omap4430: fix reset sequence
* Write to the PRM reset control register should have been 'phys';
* Setup empty reset-assert handlers for the M3's, since the board-level reset
  takes care of them;
* Remove the dbginit cruft, because it gets called implicitly on reset.

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-02-02 08:32:10 +01:00
Aaron Carroll
efcea8306a cortex_m3: allow scripts to override reset
If a handler for the reset-assert event it present, skip the usual reset
handling.  This is needed, for example, for board-level resets.

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-02-02 08:32:10 +01:00
Øyvind Harboe
859ccccd80 error: remove debug output when reporting errors
The user does not need to know or care about "command handlers".

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-01-31 12:09:46 +01:00
Øyvind Harboe
a0858bfed0 cfi: use ARM32 machine code on all CPUs but Cortex M3
ARM11 broke with aa61a3b3d8
as the code only checked for arm 7/9.

CFI probably needs work for non-ARM targets but perhaps
not adding working area memory to e.g. MIPS will give
the default slow CFI support.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-01-31 10:30:48 +01:00
Aaron Carroll
4592506b8e TCL configs for OMAP4430 and Pandaboard
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:57:50 +01:00
Aaron Carroll
c34e69cb10 cortex_a9: add source files for Cortex A9 support.
add target and build support for A9

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:57:38 +01:00
Aaron Carroll
8e60d4955f arm_dpm: add some SCR/RCR macros
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:53:53 +01:00
Aaron Carroll
aea22bdbd1 Add '-coreid' target option to support multiple cores per TAP.
ARM Cortex-A9 multi-core chips expose a single TAP/DAP which connects
to both cores.  The '-coreid' option selects which core the target
should connect to.

Note that at present, OpenOCD can connect to either core, but not both
simulatenously, until ADI contexts can be shared.

Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:53:21 +01:00
Aaron Carroll
3fa99ed2bf Add cscope to .gitignore
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:52:42 +01:00
Aaron Carroll
827053c79d openocd.texi: minor fixes in Reset Configuration
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
2011-01-31 08:46:16 +01:00
Mathias K
e26bda10bc add cortex-r4 etm id to dap info
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-27 10:33:20 +00:00
Mathias K
6df10184f6 - add xds100v2 configuaration file
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-27 10:32:39 +00:00
Thomas Schmid
4df93cb95f Fixed small mistakes in at91sam3 info command
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-26 12:38:27 +00:00
Mathias K
9629adcbde add basic TI xds100v2 support
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-26 12:30:35 +00:00
Andreas Fritiofson
5b34018ccd fix segfault from stack corruption in ahbap_debugport_init
ahbap_debugport_init was queueing reads to a local stack variable but
didn't execute the queue before returning. Since the result of the reads
are not used anyway, it's better to pass NULL as the destination instead of
a dummy variable. I changed this throughout the function, even for the
reads that were actually executed.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-26 12:14:51 +00:00
Eric Wetzel
a727418184 stellaris: automatically generate and update device IDs
Added a Perl script to contrib that uses the header files in StellarisWare complete Firmware Development Package provided by TI/Luminary to generate a new list of device IDs

Used Perl script and revision 6734 of TI/Luminary StellarisWare to update device IDs
2011-01-19 08:41:03 +01:00
Erik Botö
4749a40821 Flash driver for em357
Hi,

I took the stm32x NOR flash driver and adapted it for the Ember EM357
chip. This chip is very similar to em351 and stm32w so the driver
should be easily extended to support those as well if anyone can get
their hands on some of those for testing.

changelog:
Added NOR flash driver em357

Best regards,
Erik Botö
2011-01-14 14:56:46 +01:00
Santeri Salko
5b1efd0176 str9xpec: Find flash controller from the chain.
Find the flash controller by position since it is before the core,
not after it.

This fixes the problem that str9xpec enable_turbo (or any other
str9xpec command) did not work. (See my post in
http://forum.sparkfun.com/viewtopic.php?f=18&t=25542)

Signed-off-by: Santeri Salko <santeri.salko@gmail.com>
2011-01-14 14:55:24 +01:00
simon qian
11193c040c transport: fix transport command args gaffe
the wrong index of argv. argv[0] is the command itself,
argv[1] the the transport to select.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-01-13 08:28:33 +01:00
simon qian
8eb92c7e99 transport: fix LOG_DEBUG gaffe
LOG_DEBUG() arguments are only evaluated when DEBUG logging
is enabled, do not use arguments that have side effects
like foo++.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-01-13 08:28:29 +01:00
Spencer Oliver
8684bd1342 cfi: fix release build warnings
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-10 09:37:18 +00:00
Eric Wetzel
0535531d27 nit: more LOG_* \n fixes
Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages

Remove LOG_INFO_N
LOG_INFO_N was only used once and had a \n at the end

Change LOG_USER_N calls that end with \n to LOG_USER
2011-01-09 21:35:23 +01:00
Freddie Chopin
61e1e525c1 Add another level of procedures to LPC2xxx initialization - procedures for specific targets (setup_lpc<number>) take core clock and adapter clock as parameters. This way "constant" parameters (flash size and type, CPUTAPID, etc.) do not need to be copied if one wishes to change the "variable" parameters - like the core clock or adapter clock - in a board config file or somewhere else.
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2011-01-09 21:34:02 +01:00
David Brownell
7ec55eb863 present CM3 Trace agenda 2011-01-09 21:14:57 +01:00
Freddie Chopin
94fa8fd30a Add common LPC2xxx setup procedure, use in all LPC2xxx files.
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2011-01-07 16:09:31 +01:00
Spencer Oliver
aa61a3b3d8 cfi: use safer arch detection
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-06 10:35:59 +00:00
Spencer Oliver
7351eecf6a loader: update loader src for armv7-m arch
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-06 10:35:02 +00:00
Jonathan Dumaresq
6a1750e961 Add the support for the armv7m arch.
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
2011-01-06 08:05:02 +01:00
Jonathan Dumaresq
9f408db29d Add the contrib file for the armv7m arch
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
2011-01-06 08:04:58 +01:00
Eric Wetzel
a665ef716a nit: do not add \n at end of LOG_ERROR
Fixed in many other places, and submitted in response to Øyvind's invitation.
2011-01-05 21:46:12 +01:00
Spencer Oliver
0cd84000da mips32: add fastdata loader working area
Add a working area that is preserved between calls to
mips_m4k_bulk_write_memory - this gives us a speed increase
of approx 3kb/sec during flash writes to the pic32mx.

This area is released during a resume/reset.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-04 12:29:49 +00:00
Spencer Oliver
dc1c5a7500 target: change working area free data type
We only use the struct working_area member 'free' as a
true/false type so might as well use a bool data type.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-04 09:52:20 +00:00
Øyvind Harboe
e8eb5bbc04 nit: do not add \n at end of LOG_ERROR
This is done in many other places as well, patch
to fix gratefully accepted!
2011-01-03 13:37:41 +01:00
Øyvind Harboe
c69553cbc5 error handling: the error number is not part of the user interface
Do not propagate error number to user. This is for internal
programming purposes only. Error messages to the user is
reported as text via LOG_ERROR().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-01-03 13:33:27 +01:00
Michael Schwingen
1795239cfd actux3.cfg: add function to setup for u-boot debugging
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-01-02 21:17:57 +01:00
Michael Schwingen
09a0a69c09 cfi_protect is not implemented on Spansion flashes (many do not even have protection bits). Demote from error to warning, so that common board code can use "flash write_image erase unlock" regardless of the flash type.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-01-02 21:15:27 +01:00
Michael Schwingen
d8ece229f9 non-CFI flash code uses data from CFI structures. Make sure that timeouts are filled in on non-CFI flashes, and print CFI information in all cases, nut just on CFI flashes.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
2011-01-02 21:15:08 +01:00
Jon Povey
d356034f03 svf: implement sleep for RUNTEST min_time
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>

min_time was effectively ignored, I needed it to program a Lattice MachXO
which uses a RUNTEST to wait for an erase operation, amongst other things.

With this patch pauses happen and I can program the device with an SVF
generated in LSC ispVM (with "Rev D Standard" checked to suppress
nonstandard LOOP statements)
2011-01-02 20:02:16 +01:00
Jon Povey
18a5a46bd9 svf: fix USAGE and related error reporting
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
2011-01-02 20:01:20 +01:00
Antonio Borneo
093ec6656a NAND/S3CXXXX: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:58:58 +01:00
Antonio Borneo
f49283a062 NAND/ORION: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:58:40 +01:00
Antonio Borneo
5e27647e22 NAND/NUC910: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:58:26 +01:00
Antonio Borneo
457556b146 NAND/MX3: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:58:19 +01:00
Antonio Borneo
b7b9ad755e NAND/MX2: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:57:58 +01:00
Antonio Borneo
35c30e9ee7 NAND/LPC3180: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:57:45 +01:00
Antonio Borneo
3db34f8447 NAND/DAVINCI: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:57:30 +01:00
Antonio Borneo
2e1f2b50fd NAND/AT91SAM9: remove private "target" copy
Remove "target" form private data, and use
common one in struct nand_block.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:57:15 +01:00
Antonio Borneo
5f3603b8ef NAND/TCL: prepare for common "target" reference
Every NAND driver keeps private copy of "target"
structure.
Prepare infostructure to move private "target"
copy in common/shared struct nand_device.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:56:59 +01:00
Antonio Borneo
21a1c6ec33 NAND/TCL: fix segfault on syntax error
Fix segfault if incomplete command "nand device dummy"
is executed.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:54:20 +01:00
Antonio Borneo
7bb79f0f51 NAND/CORE: Comment use of alive_sleep()
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:53:55 +01:00
Antonio Borneo
52044a17ce NAND/CORE: Replace decimal dot in messages
Table of NAND devices reports operating voltage.
Replace comma with proper decimal dot.

Øyvind: "." is correct for UK/US, but incorrect for
many other languages. OpenOCD is not localized at this
point, so sticking to "." for US/UK should be OK.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-01-02 19:52:53 +01:00
Antonio Borneo
b0759dfc53 flash/nand: review NAND driver interface
From struct nand_flash_controller :
- remove unused field register_commands;
- remove field controller_ready, exported but
  never referenced.
Remove dead code pointed by controller_ready.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2011-01-02 19:49:36 +01:00
Marek Vasut
0136977c40 CORTEX A8: Fix broken CPU identification
This patch fixes the issue where the OMAP CPU (and possibly others) was mistaken
for iMX51 and therefore had misadjusted debug base.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-12-30 08:19:47 +01:00
Andrew MacIsaac
50e79d60ce Compilation Warnings on OS X 10.5
I received a number of "-Wshadow" related warnings (treated as errors) while
trying to build on OS X Leopard.  In addition, there were two miscellaneous
other warnings in the flash drivers.  Attached are two patches which correct
these issues and the commit messages to accompany them.

My system has the following configuration (taken from uname -a):

Darwin 9.8.0 Darwin Kernel Version 9.8.0: Wed Jul 15 16:55:01 PDT 2009;
root:xnu-1228.15.4~1/RELEASE_I386 i386

=== Werror_patch.txt Commit Message ===
compilation: fixes for -Wshadow warnings on OS X

These changes fix -Wshadow compilation warnings on OS X 10.5.8

Compiled with the following configure command:

../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink
--enable-ft2232_libftdi

=== flash_patch.txt Commit Message ===
compilation: fixes for flash driver warnings on OS X

These changes fix two compilation warnings on OS X 10.5.8:

../../../../src/flash/nor/at91sam3.c:2767: warning: redundant redeclaration
of 'at91sam3_flash'
../../../../src/flash/nor/at91sam3.c:101: warning: previous declaration of
'at91sam3_flash' was here

and

../../../../src/flash/nor/stmsmi.c:205: warning: format not a string literal
and no format arguments

Compiled with the following configure command:

../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink
--enable-ft2232_libftdi
===

Andrew
2010-12-29 22:16:28 +01:00
Øyvind Harboe
eea91f71f9 warning: fix warning where GCC didn't catch a doubly declared global structure
Why hasn't earlier versions of GCC caught this? Bug?

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-29 22:14:43 +01:00
Øyvind Harboe
4f9a9b8eba warnings: use more 'const' for char *
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-29 22:07:39 +01:00
Øyvind Harboe
8f93c0a3fe target: do not expose error numbers to users
error numbers are only reported at DEBUG log levels and
used internally, they are not part of the user interface.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-29 20:59:30 +01:00
David Brownell
7cd2617384 initial SWD transport (SWD infrastructure #2)
This piggy backs on JTAG so it's not yet pretty, but that
seems unavoidable so far given today's OpenOCD internals.

SWD init and data transfer  are unfinished and untested, but
that should cause no regressions, and will be addressed by
the time drivers start using this infrastructure.  Checking
in whould get the code working better sooner, and turn up any
structural/architectural issues while they're easier to fix.

The debug adapter drivers will provide simple SWD driver
structs with methods that kick in as needed (instead of JTAG).
So far just one adapter driver has been updated (not yet
ready to use or circulate).

The biggest issues are probably
  - fault handling, where the ARM Debug Interface V5 pipelining
    needs work in both JTAG and SWD modes and
  - missing  rewrite of block I/O code to work on both of our
Cortex-ready transports (Current code is  hard-wired to JTAG);
relates also to the pipelining issue.
  - omitted support to activate/deactivate SWO/SWV trace (this is
    technically trivial, but configuring what to trace is NOT.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
----

 doc/openocd.texi        |   17 ++
 src/jtag/core.c         |    3
 src/jtag/interface.h    |    4
 src/jtag/jtag.h         |    2
 src/jtag/swd.h          |  114 +++++++++++++++++++
 src/jtag/tcl.c          |    2
 src/target/adi_v5_swd.c |  281 ++++++++++++++++++++++++++++++++++++++++++++++--
 src/target/arm_adi_v5.c |    8 +
 src/target/arm_adi_v5.h |    3
 9 files changed, 425 insertions(+), 9 deletions(-)
2010-12-24 18:50:41 -08:00
Spencer Oliver
4994c60083 stm32x : always use valid flash base address
This change matches the previous behaviour of using the known
flash address.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 13:10:15 +00:00
Spencer Oliver
56d9ee779d flash: print flash bank name on flash info cmd
The flash bank name is a required element in adding flash banks,
however other than looking at the config file there is no way of
getting the name used in openocd.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:39:22 +00:00
Spencer Oliver
319555cd35 stm32: fix reversed option byte write
This has been a long standing bug that has never been spotted.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:17 +00:00
Spencer Oliver
690e054a3d stm32: update option bytes for stm32xl family
add supoort for xl family boot bank option.
The option byte handling will be cleaned up in a later patch.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:16 +00:00
Spencer Oliver
3d834bdab7 stm32: add stm32 xl family flash support
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:14 +00:00
Spencer Oliver
83e5aaf577 stm32: add dual flash bank support
This patch adds the initial dual flash bank support for devices such
as the stm32xl family.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:13 +00:00
Spencer Oliver
921f40f62a contrib: change stm32 flash loader extension
As the stm32 flash loader now uses the preprocessor change extension
so that it used by default.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23 12:11:12 +00:00
Øyvind Harboe
8b41812da3 lpc2148: redo to the new target configuration scheme
Define a proc which PCBs can easily override.

Also demonstrates how to add multiple TAP exepcted-id's
using arguments.

Added 0x3f0f0f0f as expected TAP-id. Old LPC2148 silicon
I happened to have on my desk?

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-22 17:44:22 +01:00
Øyvind Harboe
e03f45f699 config: add init_targets proc that is executed just before init
this allows configuration scripts to export a init_targets proc
rather than setting up the target directly.

This allows for new conventions in how to set up target vs. board
script and how to transfer default settings between board and
target scripts.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-22 17:44:22 +01:00
Øyvind Harboe
37f4978f95 bootstrap: by default the submodules are initialized
use "nosubmodule" to skip setting up submodules.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-22 14:39:16 +01:00
Øyvind Harboe
07dcb5af12 server: remove error value from LOG_INFO
the error values is not part of the interface to the user,
so they should never be printed in LOG_INFO or LOG_USER.

Printing them in LOG_DEBUG() rarely makes much sense but
is OK.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-21 14:09:00 +01:00
Tormod Volden
29d2d15f3f tcl/interface/flashlink.cfg: Fix broken ST URL 2010-12-20 07:52:29 +01:00
Tormod Volden
d33f4a2ad5 tcl/board: Clean up STM32 EVAL boards configurations
Make consistent use of hex memory size for flashing.

Delete stm32f10x_128k_eval.cfg. It has no product reference
nor any settings in it.
2010-12-20 07:52:28 +01:00
Tormod Volden
9f18afc39e tcl/board: Fix ST URLs in stm32* eval board configuration files
ST recently rewamped (screwed up) their web site and broke all links.
Also match the chip names with those on the web site product
descriptions.
2010-12-20 07:52:26 +01:00
Michael Schwingen
23bf724e04 update IXP42x target / XBA board config 2010-12-19 22:16:31 +01:00
Michael Trensch
6839618062 Add support for Hilscher netX controllers 2010-12-18 21:11:57 +01:00
Øyvind Harboe
c9544e411d script: support only Tcl comments
Only Tcl comments are now supported. For classic style
commands comments were supported at the end of the line.

Move in the direction of letting the script language
decide syntax, rather than have special rules for some
commands.

Before this patch goes in, the scripts should be updated
to use ;# instead of # for end of line comments.

> mdw 0 1 2
mdw ['phys'] address [count]
  zy1000.cpu mdw address [count]
Command handler execution failed
in procedure 'mdw'
> mdw 0 1 #2
mdw ['phys'] address [count]
  zy1000.cpu mdw address [count]
Command handler execution failed
in procedure 'mdw'
> mdw 0 1 ;#2
0x00000000: ffffffff
> mdw 0 1
0x00000000: ffffffff
> mdw 0
0x00000000: ffffffff

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-18 21:04:22 +01:00
Antonio Borneo
30da7c67ce TCL: fix non TCL comments
End of line comments fixed with ';' before '#'.
Added few additional 'space' to keep indentation in
multi-line comments.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-12-18 21:04:22 +01:00
Øyvind Harboe
af3f77a177 openocd doc: update the comments about Jim Tcl a bit
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-16 09:12:46 +01:00
John Devereux
2eebdcf93e Fix for compilation failure amt_jtagaccel.c
Hi,

I think there are errors in amt_jtagaccel.c

I attach a small patch that I needed to make it compile.
2010-12-16 08:32:30 +01:00
Paul Richards
5787853bc1 Fix for segfault in handle_nand_dump_command. 2010-12-15 14:14:02 +01:00
Øyvind Harboe
969b1e66dd stm32: fix unprotect
the unprotect fn in stm32 needs to unprotect more sectors
than was requested aligned to some boundary.

Print warning when this happens.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-15 09:48:37 +01:00
Øyvind Harboe
39dbb516a4 flash: clarify protect documentation
some chips unprotect more than the range asked for. The
protect fn, must unprotect/protect minimally the range given.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-15 09:48:37 +01:00
Spencer Oliver
cbf48bed6a contrib: add source to the cfi flash loaders
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 19:37:39 +00:00
Spencer Oliver
9a76c68563 contrib: make sure loaders use correct arch
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:42:29 +00:00
Spencer Oliver
c6e07051e6 stm32: add STM32E-EVAL external memory config script
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:36:10 +00:00
Spencer Oliver
ae68ddc25e cfi: disable buffer writes for M29W128G
For some reason buffer writes for the M29W128G do not work reliably,
so disable them.

See:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=504a3e72208fc6a65924426ff5693982590bccdc

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:36:09 +00:00
Spencer Oliver
26ba6ea511 cfi: allow optional buffer write support
Some flash's do not support buffer writes, so we now check
they are supported before trying to use them.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:36:09 +00:00
Spencer Oliver
fe4fe623d5 cfi: calculate correct timeouts
The existing code used incorrect timeout values for the various cfi
operations. We now calculate the timeouts and convert to
msecs if necessary.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:36:08 +00:00
Spencer Oliver
b4ee2864e4 cfi: prefix string hex output
Add hex prefix so we know output is not decimal.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:36:07 +00:00
Spencer Oliver
6165f14ee2 cfi: add time format to cfi query output
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:36:07 +00:00
Spencer Oliver
b3052b614c cfi: whitespace and long line cleanup
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10 13:36:06 +00:00
Paul Richards
b8c42b985d Fix for segmentation fault from freed memory access in jtag_unregister_event_callback() 2010-12-10 08:03:01 +01:00
Freddie Chopin
4bd2b30d5b remove srst_pulls_trst from LPC2xxx target scripts
LPC2xxx do not require reset_config srst_pulls_trst. This can cause various "strange" problems when flashing the chip, because "reset halt" actually allows the chip to run for some short period of time and execute some code.

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-12-09 22:54:31 +01:00
Spencer Oliver
fa46805481 build: fix build from previous commit
commit 740b9e25b4 broke the drivers
for ftdi and parport due to retval already being defined.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-08 19:54:10 +00:00
Øyvind Harboe
740b9e25b4 jtag: getting the JTAG speed can fail
If the JTAG speed has not been set, then it has no defined
value, add code to propagate the error.

No change to actual behavior as no new failure paths have
been introduced. This is a no-op patch to make subsequent patches
smaller.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-08 08:43:52 +01:00
Andrew Leech
5cd931ed1c svf: various improvements
* added support for targeting particular tap
* improved file reading
* improved command line parsing
* added progress meter
* more readable time measurement output
2010-12-07 08:17:39 +01:00
Rolf Meeser
6ef4e97779 lpc2478 target config: CCLK as (mandatory) parameter 2010-12-05 13:37:57 +01:00
Mike Dunn
2e7d51c96a xscale: trace buffer remains enabled until explicitly disabled
Hi everyone,

Since a call went out for patches... been sitting on this for months.  For some
reason, the xscale trace buffer is automatically disabled as soon as a break
occurs and the trace data is collected.  This patch was a result of the
frustration of always re-enabling it, or else hitting a breakpoint and checking
the trace data, only to discover that I forgot to re-enable it before resuming.
Don't see why it should work this way.  There is no run-time penalty, AFAIK.

Along the way, I also cleaned up a little by removing the ugly practice of
recording wrap mode by setting the fill count variable to "-1", replacing it
with an enum that records the trace mode.

I've been using this for months.  Comments, criticisms gratefully received.

Mike

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2010-12-04 09:40:15 +01:00
Rolf Meeser
81790fb56a Add board config for Embedded Artists LPC2478-32 2010-12-04 09:36:47 +01:00
Rolf Meeser
bd9d2468cb Fix flash name in Hitex LPC2929 board config 2010-12-04 09:36:17 +01:00
Rolf Meeser
f2a1b7f3af Fix sector layout for 504-KiB LPC2000 devices 2010-12-04 09:35:33 +01:00
Spencer Oliver
0ac6c0d1a8 stm32: set default soft reset config
If no srst is configured then default to using sysresetreq to
reset the target.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-03 09:02:10 +00:00
Spencer Oliver
7b2687b45b luminary: remove unused config cmds.
Due to commit e40aee2954d2beabe1d8c530d9ff1e564fb01f48 we now honour the
targets 'reset_config' setting. Previously we ignored the srst setting
for luminary targets.

Luminary targets have never supported using srst to reset into debug mode
so remove the option from the target configs files.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-03 09:02:08 +00:00
Spencer Oliver
f0fac8a2cd cortex_m3: change cortec_m3 reset_config behaviour
Currently the cmd 'cortex_m3 reset_config' will overide the default
target's 'reset_config'.
Chnage the behaviour to use the target 'reset_config' if configured and
fallback if not.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-03 09:02:07 +00:00
Spencer Oliver
c24087d33e config: fix luminary jtag config
When this config was updated in commit e3773e3e3d
the old jtag declaration was not removed.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-02 22:01:44 +00:00
Freddie Chopin
a1ce28b118 rename some target scripts to be consistent with the rest
Rename Atmel target scripts which had wrong name ("at91" missing for ARM7 AT91SAM7..., "at" missing for AVR ATmega...)

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-12-02 18:53:03 +01:00
Øyvind Harboe
778b789c8e profile: use 100Hz as a default sampling frequency
it's a lie that is somewhere in the vicinity of the
truth. Certainly 64MHz confuses gprof and produces
zero output and no error messages.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-12-01 15:28:56 +01:00
Rolf Meeser
40a93104d5 lpc2900.c: Improve debug output for device probing 2010-12-01 08:48:02 +01:00
Rolf Meeser
71031bcf7f lpc2900.c: Add support for new device LPC2926 2010-12-01 08:47:57 +01:00
Rolf Meeser
1bd87f5dba LPC2900: Avoid false positive reprobing if first probing fails 2010-12-01 08:47:51 +01:00
Piotr Esden-Tempski
6356604382 Some cosmetic fixes to the Lisa/L layout support functions. 2010-11-30 08:15:19 +01:00
Piotr Esden-Tempski
94e1445a86 Added support for the blinking leds on Floss-JTAG v0.3 and newer. 2010-11-30 08:15:19 +01:00
Piotr Esden-Tempski
a9d0b3de44 Updated Floss-JTAG config file to support v0.3 and newer. Also added noeeprom version of the config file for older versions of Floss-JTAG. 2010-11-30 08:15:19 +01:00
Spencer Oliver
9a04974131 build: fix make install with jimtcl
Update subproject jimtcl to fix issue with make install.
see jimtcl commit 373b721510fd2d0754a41cc70a3b7cfd02e929bd

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-26 14:43:44 +00:00
Spencer Oliver
c606d858a9 build: correct configure help message
As we default to building jimtcl the help text should show that.
No change in functionality or configure args required.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-26 13:35:41 +00:00
Antonio Borneo
1892a2b510 FLASH/NOR: Rename spearsmi.c to stmsmi.c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-23 08:37:35 +01:00
Antonio Borneo
42082f7c23 FLASH/NOR: rename from spearsmi to stmsmi
STMicroelectronics controller SMI is not SPEAr specific.
Rename it and change name to every symbol in the code.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-23 08:37:34 +01:00
Antonio Borneo
4bbdf966d4 STR750: Add SMI interface support
Modified spearsmi driver to include support for STR75x
Added missing initialization in tcl file for STR750

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-23 08:37:31 +01:00
Antonio Borneo
e6fc371e2e NOR/SPEARSMI: fix segfault
If flash chip is not listed in the table, or if no flash is
connected, pointer must be properly initialized.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-23 08:37:28 +01:00
Antonio Borneo
06b4903e3e Documentation: fix typo
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-23 08:32:43 +01:00
Øyvind Harboe
8902789f0d flash: iterating over an address range now handles multiple banks
e.g. flash erase_address now works across an address
range that spans multiple flash chips.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-22 11:16:40 +01:00
Øyvind Harboe
17634b3760 fastload: fix error handling upon running out of memory
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-22 09:16:32 +01:00
Spencer Oliver
6dbe9b7124 build: remove AC_CONFIG_AUX_DIR macro
This was used during testing and should have been removed.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-19 11:53:17 +00:00
Spencer Oliver
64751942a3 build: disable jimtcl lineedit
This is a recent jimtcl feature but it currently breaks mingw
builds as this system does not have termios.h etc.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-19 11:24:11 +00:00
Spencer Oliver
fcee511f4e build: fix subconfigure parameter issue
When passing CFLAGS for example through to the jimtcl subconfigure the
quotes were not being preserved.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-19 09:57:37 +00:00
Spencer Oliver
c40571e6b9 build: update bootstrap comments
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-19 09:08:09 +00:00
Spencer Oliver
8c0c259ed6 build: prepend --with-jim-ext=nvp to jimtcl configure
This allows us to add options to jimtcl configure.
The default autoconf AC_CONFIG_SUBDIRS does not currently support this.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-19 09:07:43 +00:00
Spencer Oliver
d80fca527a build: add autobuild jimtcl to configure scripts
Rather than having to configure/build jimtcl openocd
will do this as part of its own build.

To use an external jimtcl lib specify disable-internal-jimtcl
to the configure step.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-18 14:05:57 +00:00
Spencer Oliver
838cd58e24 build: add common.mk
Rather than specifying common makefile variables move
them all to a common.mk.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-18 14:05:56 +00:00
Antonio Borneo
ab263fafbb FLASH/NOR: Remove useless file tms470.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:43 +01:00
Antonio Borneo
29d7031fe3 FLASH/NOR: Remove useless file str9xpec.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:39 +01:00
Antonio Borneo
7bbd6c7683 FLASH/NOR: Remove useless file str9x.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:38 +01:00
Antonio Borneo
d16dbaa0fc FLASH/NOR: Remove useless file str7x.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:36 +01:00
Antonio Borneo
5d09972931 FLASH/NOR: Remove useless file stm32x.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:35 +01:00
Antonio Borneo
f1f8d9a6c9 FLASH/NOR: Remove useless file stellaris.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:33 +01:00
Antonio Borneo
f5ae179519 FLASH/NOR: Remove useless file pic32mx.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:19 +01:00
Antonio Borneo
4cc3597944 FLASH/NOR: Remove useless file lpc288x.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:07 +01:00
Antonio Borneo
fb7c709804 FLASH/NOR: Remove useless file lpc2000.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:02:03 +01:00
Antonio Borneo
28bbe4e983 FLASH/NOR: Remove useless file avrf.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 17:01:59 +01:00
Øyvind Harboe
2b546fdc45 flash: fix bug with multiple back-to-back flash chips
flash programming via flash write_image or gdb load would
produce a bogus error message that the flash chip was to
small.

The solution is to limit the current flash programming
run to the current chip.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-17 16:56:28 +01:00
Antonio Borneo
52558354e6 FLASH/NOR: Remove useless file at91sam7.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 08:55:39 +01:00
Antonio Borneo
d213e1a12c FLASH/NOR: Remove useless file at91sam3.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 08:55:35 +01:00
Antonio Borneo
c5414f95b6 FLASH/NOR: Remove useless file spearsmi.h
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 08:55:31 +01:00
Antonio Borneo
49f42ab51d NOR/SPEARSMI: Add comments about SPI
SMI interface hides the real SPI bus between SPEAr and
external flash.
Added comments to highlight the SPI operation, to help a
future rework in SPI generic and SPEAr specific drivers.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-17 08:55:08 +01:00
Antonio Borneo
09c798a144 TCL/SPEAr: Added Serial flash in board file
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-16 09:16:15 +01:00
Antonio Borneo
e7a8de1762 NOR/SPEAr: Add support for Serial NOR
Add support and documentation for STMicroelectronics
SPEAr Serial Memory Interface (SMI).
Code tested on SPEAr3xx only.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-16 09:16:11 +01:00
Øyvind Harboe
fdae51287c httpd: retire this server
this never panned out and there are enough mistakes in
the code that probably nobody used this.

Use the tcl server and implement a standalone http
app instead works fine.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-15 09:18:21 +01:00
Freddie Chopin
015bf55944 Add comments and tiny improvements to STM32 flash loader algorithm
Add comments to assembly flash loader for STM32. Add tiny improvement in
size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%,
as time is wasted on waiting for end of operation anyway).

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-11-15 09:17:14 +01:00
Øyvind Harboe
6287c23b32 gdb: fix occasional crash when flash probe failed
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-15 09:14:05 +01:00
Øyvind Harboe
c62fb3fa81 gdb: improve error message when gdb connect fails
gdb connect can fail when the flash has not been probed.

During gdb connect, the flash layout is reported, but this
can not be automatically detected for a target that is
powered up and OpenOCD supports connecting to gdb server
even if the target is powered down.

The solution is to turn of the gdb_memory_map feature.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-11 08:51:49 +01:00
Øyvind Harboe
aa4c140a12 cortex_m3: report detected error condition in poll
If the CPU crashed at some point, poll will discover this.

Previously the poll fn would clear the error and print a warning,
rather than propagating the error.

The new behavior is to report the error back up, but still
clear the error.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-09 13:03:22 +01:00
Øyvind Harboe
6c04f1e440 target: document that target_poll() will report and clear sticky errors
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-09 13:03:22 +01:00
Antonio Borneo
e7b2958229 TCL scripts: replace "puts" with "echo"
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-09 08:12:51 +01:00
Antonio Borneo
4747af362d JIM: document "echo" command
Document "-n" option in manual;
Modify "echo" command definition as COMMAND_HANDLER to
easily add help message
Add help message aligned with manual.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-09 08:12:51 +01:00
Antonio Borneo
d220e22e63 JIM: Add "-n" option to "echo"
With the new JIMTCL, "puts" only writes to stdout.
To write on telnet port too, "echo" must be used.
This patch gives to "echo" similar commandline option of "puts".

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-09 08:12:51 +01:00
Øyvind Harboe
fc4e001de3 stm32: return early upon block write failure
only if we do not have enough ram do we continue.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-09 08:12:51 +01:00
Øyvind Harboe
6ef3d4ccfe stm32: return error when failing to read
add missing error handling.

Output warning when assuming maximum flash size in the
family when failing to read.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-09 08:12:25 +01:00
Øyvind Harboe
49a231f38d stm32: add error propagation on writes
catch problems earlier.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-09 08:05:55 +01:00
Øyvind Harboe
e774df7f69 stm32: sharpen error handling for timeouts
delete lots of crud by handling this all in one spot.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-11-09 08:05:55 +01:00
Andrew Leech
fc4cbc0f98 lpc3131: target definition 2010-11-09 08:05:55 +01:00
Antonio Borneo
074498f836 TCL scripts: add support for ST SPEAr310
Initial support for ST SPEAr310 and for the evaluation
board EVALSPEAr310 Rev. 2.0.
Scripts are split in generic for SPEAr3xx family and
specific for SPEAr310. This should easily allow adding
new members of the family.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-11-06 15:40:52 +01:00
Marek Vasut
8f1f8e7b96 Add EfikaMX smarttop board support
This patch finally adds support for i.MX51 based Genesi USA EfikaMX smarttop
board.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-11-05 11:25:57 +01:00
Marek Vasut
d5b9c7998c CortexA8: Introduce Freescale i.MX51 variant
This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU
has the Debug Access Port located at a different address (0x60008000) than TI
OMAP3 series of CPUs.

i.MX51 configuration file based on OMAP3 configuration file and an email from
Alan Carvalho de Assis <acassis@gmail.com>.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-11-05 11:25:57 +01:00
Marek Vasut
1fa91f336a CortexA8: Implement debug base autodetection
Implement autodetection of debug base. Also, implement a function solving
various hardware quirks (like iMX51 ROM Table location bug).

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-11-05 11:25:57 +01:00
Marek Vasut
887cac65b0 ADIv5: Implement function to lookup CoreSight component
This patch implements "dap_lookup_cs_component()", which allows to lookup CS
component by it's identification.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-11-05 11:25:57 +01:00
Marek Vasut
0649fb2f6c ADIv5: Introduce function to detect ROM Table location
This patch adds function called "dap_detect_debug_base()", which should be
called to get location of the ROM Table. By walking ROM Table, it's possible to
discover the location of DAP.

Sadly, some CPUs misreport this value, therefore I had to introduce an fixup
table, which will be used in case such CPU is detected.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-11-05 11:25:57 +01:00
ddraskovic
9e3d43cfe7 arm964e: Add support for ARM946E target.
So far most of the people have been using existing ARM966E in the
place of ARM946E, because they have practically the same scan chains.

However, ARM946E has caches, which further complicates JATG handling
via scan-chain. this was preventing single-stepping for ARM946E when
SW breakpoints are used.

This patch thus introduces :
1) Correct cache handling on memory write
2) Possibility to flush whole cache and turn it off during debug, or
just to flush affected lines (faster and better)
3) Correct SW breakpoint handling and correct single-stepping
4) Corrects the bug on CP15 read and write, so CP15 values
are now correctly R/W
2010-11-04 14:52:47 +01:00
Øyvind Harboe
70b1538996 bootstrap: add quick start build instructions
leave some bread-crumbs for users to figure out how
to build OpenOCD

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-29 15:18:52 +02:00
Øyvind Harboe
d8464623bd jimtcl: 0.63 release
as a git module.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-29 15:18:37 +02:00
Øyvind Harboe
559d08c19e jim tests: use installed
Delete obsolete jim that comes with OpenOCD.
2010-10-29 15:10:51 +02:00
Spencer Oliver
4617cd0f91 src: add loader src description
- add comment where to find the various loaders src files.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-10-28 10:08:16 +01:00
Spencer Oliver
1fafb669c9 contrib: add ram loader src code
Add src code for ram loaders to contrib directory.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-10-28 09:19:37 +01:00
Øyvind Harboe
53228fbc2e imx31pdk: use rclk w/1MHz fallback
measure_clk indicates ca. 3-4MHz, so 1MHz should be safe.

Added self_test proc used to test that rclk worked.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-28 08:43:04 +02:00
Øyvind Harboe
2ff1adfa79 help: help now works on configuration commands
help would not show help for commands when the command
interpreter was in the wrong mode, which means that
e.g. "help newtap" didn't work, it wouldn't show the
"jtag newtap" help as it was a configuration command.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-27 08:50:45 +02:00
Peter Stuge
f176278e98 Make systesetreq typos read sysresetreq instead
Signed-off-by: Peter Stuge <peter@stuge.se>
2010-10-25 08:05:23 +02:00
Peter Stuge
e7d26173fc Remove srst_pulls_trst from LPC1768 target
srst_pulls_trst may be true on some (broken) LPC1768 boards but is
not true in general for the LPC1768.

Signed-off-by: Peter Stuge <peter@stuge.se>
2010-10-25 08:04:58 +02:00
Michal Demin
1ceb2c7e7a buspirate: change handling of communication speed setting + create serial port open function
Signed-off-by: Michal Demin <michaldemin@gmail.com>
2010-10-25 08:01:44 +02:00
Michal Demin
d4de14dafe buspirate: Serial port was not correctly closed.
Signed-off-by: Michal Demin <michaldemin@gmail.com>
2010-10-25 08:01:44 +02:00
Antonio Borneo
ed44447e3d TARGET: review handle_load_image_command()
Collect variable definitions.
Report syntax error to command dispatcher.
Propagate error when unable to open file.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-10-12 11:22:32 +02:00
Antonio Borneo
2ee47b22c6 TARGET: fix segfault in handle_dump_image_command()
The struct fileio is used after fileio_close().
Move fileio_close() after last usage.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-10-12 11:22:26 +02:00
David Brownell
e3773e3e3d swj-dp.tcl (SWD infrastructure #1)
Provide new helper proc that can set up either an SWD or JTAG DAP
based on the transport which is in use -- mostly for SWJ-DP.

 Also update some SWJ-DP based chips/targets to use it.  The goal
is making SWD-vs-JTAG transparent in most places.  SWJ-DP based chips
really need this flexible configuration to cope with debug adapters
that support different transports, without needing new target configs
for each transport or adapter.

For JTAG-DP, callers will use "jtag newtap" directly, as today; only
one chip-level transport option exists.

For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly
(part of an upcoming SWD transport patch).  Again, only one transport
option exists, so hard-wiring is appropriate there.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-10-10 14:41:11 -07:00
David Brownell
3864da1ab8 add JLINK protocol doc ref
Provide URL for a recent
version of JLINK protocol.
Signed-Off-By: David Brownell <dbrownell@users.sourceforge.net>
2010-10-10 14:27:35 -07:00
Spencer Oliver
6229e438dd build: remove warn_unused_result errors
Remove any build errors for strtol when building release
version of openocd.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-10-05 16:29:37 +01:00
Spencer Oliver
ebe431879d gdbderver: fix gdb pipe startup overflow
When usng gdb pipes we need to keep openocd output at a minimum,
otherwise the gdb stdin will overflow and fail.
Make the calls to gdb_port and log_output synchronous to stop this.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-10-05 15:00:40 +01:00
Spencer Oliver
7e4cf8db58 gdbserver: fix gdb_port memory leak
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-10-04 20:35:33 +01:00
Spencer Oliver
45de3b1fbe server: fix server pipe windows support
commit 50d5441e2a caused
native windows build to fail.

Firstly this patch fixes the build issue, but it also disables support
for named pipes under Windows. Windows does not support posix named
pipes.
A cross-platfom access layer will need creating before support can be
enabled again.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-10-04 20:34:47 +01:00
Øyvind Harboe
d543aa0148 zy1000: add : port number syntax for tftp filing system
Allows using non-standard port number. Default to port 69.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 14:18:15 +02:00
Øyvind Harboe
96a56ba086 pipes: add documentation for pipes
Stick with the name "gdb_port" even if this command
can be used for other things(disable, named pipes,
anonymous stdin/out pipe). "port" is correct for
probably more than 90% of use cases, if not more.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 10:26:10 +02:00
Øyvind Harboe
50d5441e2a server: add support for pipes
-p/--pipe is now deprecated. Use '-c "gdb_port pipe;log_output openocd.log"'
instead. Warning logged.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 10:26:08 +02:00
Øyvind Harboe
6c137a2fc0 server: specify port as a string
This will allow switching to using named pipes.

Split this out as a seperate commit to make changes
easier to follow.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 10:21:33 +02:00
Øyvind Harboe
cb2dba2c12 server: read/write now goes through connection fn's
depending on whether the connection is over a socket
or pipe, the read is done differently.

pipes can return -1 when writing 0 bytes, make 0 byte
writes a successful no-op. 0 byte writes falls out
naturally of tcl server code.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 10:21:33 +02:00
Øyvind Harboe
5a41435e45 server: split file descriptors in in/out fd's
pipes have different fd's for in/out. This makes the
code more orthogonal and prepares for adding pipes.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 10:21:33 +02:00
Øyvind Harboe
a60a57d8ed server: rely on ctrl-c to stop openocd
there was special support to support pressing 'x' to quit
openocd. ctrl-c is sufficient. The main server loop is already
complicated enough.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 10:21:33 +02:00
Øyvind Harboe
d623832685 log: remove hack to redirect logs when pipes are in use
There is an explicit command "log_output" that can
be used to redirect log output to a file, no need
for a hack in the first place.

Before enabling pipes, use "log_output foo" to redirect
log output to the "foo" files.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-10-01 10:21:33 +02:00
Luca Bruno
fb7235f12a Update ep93xx and at91rm9200 drivers
ep93xx and at91rm9200 are conditionally built only on arm and were not
updated to reflect changes in command registration handler.
This patch makes them properly compile again, fixing a build failure
experienced on Debian armel.

Signed-off-by: Luca Bruno <lucab@debian.org>
Signed-off-by: Zachary T Welch <zwelch@codesourcery.com>
2010-09-30 18:14:36 -07:00
Øyvind Harboe
3931b99d14 fileio: fileio_size() can now fail
Part of making the fileio API more robust.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-29 18:56:07 +02:00
Øyvind Harboe
3a693ef526 fileio: refactor struct fileio to be an opaque structure
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-29 08:43:27 +02:00
Antonio Borneo
ecad76061f TCL scripts: fix ocd_mem2array/mem2array
In previous patch, I have introduced again the symbol
"ocd_mem2array", now replaced by "mem2array".
Fix the error.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-09-28 10:44:50 +02:00
Øyvind Harboe
45e5d1d90a flash: fix error handling
memory leaks and missing check on memory allocation.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-27 16:46:13 +02:00
Øyvind Harboe
19167a7af6 image: fix spelling mistake
struct imageection => struct imagesection

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-27 16:29:51 +02:00
Zachary T Welch
3bb4a6ba14 Fix omap3_dbginit to write to physical memory.
Setting the OMAP3530 DBGEN bit must be done in physical memory, so
update omap3_dbginit callback to use the new 'mww phys' command syntax.
2010-09-26 17:45:58 -07:00
Øyvind Harboe
6468c593c7 zy1000: fix non-JTAG master build
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-26 20:38:29 +02:00
Øyvind Harboe
9f26aff39c gdb: fix blank line at top
snuck in at some point...

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-26 18:02:23 +02:00
Øyvind Harboe
cb0de21d0c jtagdp: remove #if 0'd kludges and explain why the code is correct
short story: if the JTAG clock is too high, then the
behavior will be flaky and kludging the code may
seem to make things beter, but really it's just a red
herring.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-21 22:17:38 +02:00
Øyvind Harboe
22911a3aed flash: fix error handling
sensible error must be reported at failure site

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-21 22:17:38 +02:00
Øyvind Harboe
9aafd42853 embeddedice: fix error handling
error is now reported at failure site.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-21 22:17:38 +02:00
Antonio Borneo
edefee9880 TCL scripts: collect duplicated procedures
TCL procedures mrw and mmw, originally in DaVinci target code,
are duplicated in other TCL scripts.
Moved in a common helper file, and added help/usage description.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-09-21 12:25:59 +02:00
Øyvind Harboe
ea48794210 startup: removed capture_catch
not used.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 20:45:48 +02:00
Øyvind Harboe
1abc26d7a2 helper: fix flaky capture command
capture of progress output would get polling
results. This will break in the example below
where polling output would override the tcl
return value.

capture {sleep 10000; set abc def}

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 20:45:48 +02:00
Øyvind Harboe
6000411ddd tcl_server: switch to ctrl-z
by using ctrl-z instead of line end, multi-line tcl scripts
can be handled.

Testing: send ctrl-z a couple of times to make telnet enter the
mode where it sends ctrl-z unencoded.

Programs that talk to the tcl_server can send ctrl-z to
indicate end of tcl-let to be executed without having
to worry about telnet protocols.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 20:45:48 +02:00
Øyvind Harboe
241fd0b5a8 logging: turn of stdout/stderr buffering
with this buffering disabled fancier logging scripts will
be able to process each line as it is output.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 20:45:48 +02:00
Øyvind Harboe
61780558e1 zy1000: add support for Linux host
used /dev/mem and mmem() to memory map JTAG registers
into user space and used new configure options to exclude
eCos specific code.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 20:45:16 +02:00
Øyvind Harboe
549d974814 jtag: build jtag first because it generates header files
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 13:44:36 +02:00
Øyvind Harboe
f6a3fc818b warnings: fix alignment warnings
These warnings are for architectures that do not
support non-aligned word access.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 13:12:35 +02:00
Øyvind Harboe
32ab98c9e9 zy1000: split out configure option for eCos and JTAG master
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 13:08:16 +02:00
Øyvind Harboe
1dbb7ba472 zy1000: remove obsolete debug code
Obsolete code clutter

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 13:08:16 +02:00
Øyvind Harboe
f613011aa0 tcl: remove incomplete unused tcl file
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-20 09:23:42 +02:00
Mike Dunn
103c1f9525 xscale: some wp detail added to user manual
Hi everyone (again),

Watchpoints on xscale are quirky, so I thought a little explanation in the
user's manual was warranted.

Comments gratefully received.

Last one, Øyvind :-)

Thanks,
Mike

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2010-09-20 09:21:13 +02:00
Mike Dunn
ebfb2f4f37 xscale: check that wp length does not exceed address
Hi everyone,

A while back I sent in a patch that adds support for watchpoint lengths greater
than four on xscale.  It's been working well, until the other day, when it
caused an unexpected debug exception.  Looking into this I realized there is a
case where it breaks: when the length arg is greater than the base address.
This is a consequence of the way the hardware works.  Don't see a work-around,
so I added code to xscale_add_watchpoint() to check for and disallow this
combination.

Some more detail... xscale watchpoint hardware does not support a length
directly.  Instead, a mask value can be specified (not to be confused with the
optional mask arg to the wp command, which xscale does not support).  Any bits
set in the mask are ignored when the watchpoint hardware compares the access
address to the watchpoint address.  So as long as the length is a power of two,
setting the mask to length-1 effectively specifies the length.  Or so I thought,
until I realized that if the length exceeds the base address, *all* bits of the
base address are ignored by the comaparator, and the watchpoint range
effectively becomes 0 .. length.

Questions, comments, criticisms gratefully received.

Thanks,
Mike

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2010-09-20 09:21:12 +02:00
Mike Dunn
7e888741d1 xscale: bp/wp: additional LOG_ERROR on failure
Hi everyone,

Added more LOG_ERROR messsages to watchpoint and breakpoint code, given that the
infrastructure no longer interprets returned error codes.  Also changed
existing LOG_INFO and LOG_WARNING to LOG_ERROR for cases where an error is
returned.

Note that the check of the target state is superflous, since the infrastruture
code currently checks this before calling target code.  Is this being
reconsidered as well?  Also, should we stop returning anything other than
ERROR_OK and ERROR_FAIL?

Comments gratefully received.

Thanks,
Mike

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2010-09-20 09:21:12 +02:00
Karl Kurbjun
60501bb0fb AM/DM37x: Unify configuration scripts and add support for TI Beagleboard xM. 2010-09-20 09:17:28 +02:00
Flemming Futtrup
c14852385f cfi: add sst39vf6401b
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-15 11:35:29 +02:00
Øyvind Harboe
4a47d87e47 breakpoints: fix error handling
do not try to interpret "retval" into a string, just
amend a bit about the context of the already reported
error.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-14 16:25:48 +02:00
Takács Áron
1b0f194d90 board scripts: Marvell PXA270M processor has a new TAPID: 0x89265013
the new Marvell PXA270M processor has a new TAPID: 0x89265013.
Attached you will find a patch for target/pxa270.cfg that will handle this.

I have also attached a board/colibri.cfg file to support the Colibri
PXA270 module by Toradex.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-14 11:15:35 +02:00
Mike Dunn
35691065f7 xscale: fix sw breakpoints for thumb; set bp immediately
Hi everyone,

Version 2 of this patch.  Code added to breakpoints.c was removed from previous
patch, and item 3 added, per discussion with Øyvind regarding error reporting.
Item 4 added, which I just noticed.

I tried to use a software breakpoint in thumb code on the xscale for the first
time recently, and was surprised to find that it didn't work.  The result was
this patch, which does four things:

1): fix trivial cut-n-paste error that caused thumb breakpoints to not work
2): call xscale_set_breakpoint() from xscale_add_breakpoint()
3): log error on data abort in xscale_write_memory()
4): fixed incorrect error code returned by xscale_set_breakpoint() when no
    breakpoint register is available; added comment

Item 2 not only makes the xscale breakpoint code consistent with other targets,
but also alerts the user immediately if an error occurs when writing the
breakpoint instruction to target memory (previously, xscale_set_breakpoint() was
not called until execution resumed).  Also, calling xscale_breakpoint_set() as
part of the call chain starting with handle_bp_command() and propagating the
return status back up the chain avoids the situation where OpenOCD "thinks" the
breakpoint is set when in reality an error ocurred.

Item 3 provides a helpful message for a common reason for failure to set sw
breakpoint.

This was thoroughly tested, mindful of the fact that breakpoint management is
somewhat dicey during single-stepping.

Comments and criticisms of course gratefully received.

Mike

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-13 21:52:43 +02:00
Mike Dunn
81e0d4438e propagate return status of set_breakpoint() up call chain
Hi everyone,

I figured since I was poking around in the breakpoint code on other arches, I'd
add this change to those arches that don't do it already.  This patch propagates
the return code of <arch>_set_breakpoint() up the call stack.  This ensures that
the higher layer breakpoint infrastructure is aware that an error ocurred, in
which case the breakpoint is not recorded.

Normally I wouldn't touch code that I can't test, but the code is very
uniform across architectures, and the change is rather benign, so I figured
after careful inspection that it is safe.  If the maintainers or others think
this is imprudent, the patch can be dropped.

Also changed the error code to something more appropriate in two cases where
hardware resources are unavailable.

Comments and criticisms of course gratefully received.

Mike

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-13 19:45:42 +02:00
Øyvind Harboe
8afd2309a4 helper: add stacktrace command that returns error stacktrace
Ability to access the stacktrace from a script is quite
handy.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-12 20:18:43 +02:00
Øyvind Harboe
73e5dffdfd jim: fix crash when using Jim_ListInsertElements
Jim_ListInsertElements was simply forgotten from the
fn that registered all the APIs.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-12 20:18:43 +02:00
Øyvind Harboe
505d4633cd version command: make it scriptable
you can now set a variable in a script like set version [version].

Also version takes an optional argument "git" to show git version
of source. If git is not installed during the build, then this
will yield an error that is ignored during the build and "version git"
returns an empty string.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-11 11:42:44 +02:00
Øyvind Harboe
ac86f4ccba command: capture command now handles both types commands
Commands that output progress output and no return value
will have the progress output captured.

Commands that do not output progress output(tcl commands)
will return the tcl return value instead.

The advantage here is that it is no longer necessary to
consider which command one is capturing, it works for
either.

Example #1: capture progress output:

set foo [capture help]

Example #2: capture tcl return value

set foo [capture {set abc def}]

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-11 11:42:38 +02:00
Øyvind Harboe
8c21659d2a cfi: random crash in cfi_probe() fixed
for non_cfi cfi chips free() was invoked on rodata.

The mystery is why this bug has survived for so long.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-11 10:37:32 +02:00
Øyvind Harboe
ef92da3315 cfi: tighten up type usage a bit
sizeof() is a bit less scary than seing assumption
about size of type, no bug as such.

Use NULL instead of 0 for pointers. More obvious that
it is a pointer from code inspection.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-11 10:37:32 +02:00
Mike Dunn
e1c6f6783d xscale: mark xscale registers invalid on debug entry
Hi everyone,

This simple patch fixes a problem I noticed on the xscale where incorrect values
are sometimes reported by the reg command.  The problem can occur when
requesting the value of registers in the xscale-specific register cache.  With a
couple of exceptions, none of the registers in the xscale register cache are
automatically retrieved on debug entry.  This is probably fine, as they are
unlikely to be needed on a regular basis during a typical debug session, and
they can be retrieved when explicitly requested by name using the reg command.
The problem is that once this is done, the register remains marked as valid for
the remainder of the OpenOCD session, and the reg command will henceforth always
report the same value because it is obtained from the cache and is never again
retrieved from the debug handler on the target.

The fix is to mark all registers in the xscale register cache as invalid on
debug entry (before the two exceptions are retrieved), thus forcing retrieval
(when requested) from the target across resumptions in execution, and avoiding
the reporting of stale values.

Small addition change by Øyvind: change 'i' to unsigned to fix compiler
warning for xscale_debug_entry() fn.

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-09 09:22:11 +02:00
Alexander Stein
a40f12d626 Remove duplicated initialization
I a mail conversation with Øyvind we stated that speed may not be set at
all on case CLOCK_MODE_KHZ and CLOCK_MODE_RCLK. Also there isn't proper
error propagation adapter_khz_to_speed or jtag_rclk_to_speed.
So jtag_get_speed may need some rewrite for error propagation.

CC: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-08 10:34:43 +02:00
Øyvind Harboe
98a66c4809 warning: fix silly -O3 warning
Some versions of GCC don't pick up that local variables
are set in all code paths.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-07 18:39:04 +02:00
Øyvind Harboe
35af12d3e7 jtag: fix regression with dummy driver and when starting OpenOCD with target powered down
Do not fail startup if communication with target is
not possible.

OpenOCD supports launching without a target connected
or the target powered down.

The user will typically power up the target and issue
a "reset init" + load his application after OpenOCD
is started then.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-09-03 22:13:50 +02:00
Wookey
ae80c3564a Numonyx M29W160ET patch
Someone called David Carne popped up on IRC and offered a fix (as he's not
on this list so can;t post here). I am just passing it on. (thanx David)

 10:54 < davidc__> Basically; the Numonyx M29W160ET has an incorrect CFI PRI
             block; it describes the erase blocks backwards
 10:54 < davidc__> the linked patch has a fixup for that part [really trivial]:
2010-09-03 22:08:30 +02:00
Spencer Oliver
3c69eee9ef cortex m3: add cortex_m3 reset_config cmd
This new cmd adds the ability to choose the Cortex-M3
reset method used.
It defaults to using SRST for reset if available otherwise
it falls back to using NVIC VECTRESET. This is known to work
on all cores.

Move any luminary specific reset handling to the stellaris cfg file.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-31 20:09:26 +01:00
Spencer Oliver
1ca286557a flash: increase stellaris flash loader buffer
This speeds up programming for targets with more working area,

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-31 20:09:25 +01:00
Spencer Oliver
31b47688ca cfg: update Luminary config files
- Update all Luminary config's to use a common target/stellaris.cfg.
 - Add Luminary ek-lm3s6965 config.
 - Increase working area for boards with more ram.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-08-31 20:09:24 +01:00
David Brownell
6f84198841 bitq: unshadow pause()
bitq.c: In function ‘bitq_scan_field’:
bitq.c:224: error: declaration of ‘pause’ shadows a global declaration
/usr/include/unistd.h:429: error: shadowed declaration is here

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-27 15:16:39 -07:00
Øyvind Harboe
5c98e063b9 imx35pdk: fix clock and reset delays
Use rclk and 100ms delay on ntrst

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-19 16:06:45 +02:00
Øyvind Harboe
2c4ef30b11 mcb1700: Keil MCB1700 w/1768 config script
Ca. 93kBytes/s flashing speed @ 10MHz JTAG clock

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-17 21:52:39 +02:00
David Brownell
962946ea89 update more Stellaris EK board comments
Using the bundled JTAG/SWD debug support in JTAG mode
is optional on *all* of the EK boards.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-16 08:25:37 -04:00
David Brownell
66fb176766 two NEWS updates
Mention AVR32 AP7000 support.
Clarify ARM semihosting update was for V7M (not ARM9 etc).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-16 01:11:39 -04:00
David Brownell
70794664f1 Update comments for some Stellaris EK boards.
These  don't need to use the on-board debuggers in JTAG mode.
Off-board is OK, as would be SWD mode.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-16 00:36:52 -04:00
Oleksandr Tymoshenko
c54c323cf3 avr32: basic target script 2010-08-15 21:56:41 +02:00
David Brownell
d23428a47f at32ap7000 config file
nice board to play with.
2010-08-15 21:54:01 +02:00
Oleksandr Tymoshenko
c3d51bf0da avr32: work-in-progress
committed so as to ease cooperation and to let it be improved
over time.

So far it supports:
- halt/resume
- registers inspection
- memory inspection/modification

I'm still getting up to speed with OpenOCD internals and AVR32 so code is a little
bit messy and I'd appreciate any feedback.
2010-08-15 21:51:34 +02:00
Catalin Patulea
bb88f3f470 Fix typo in usb_blaster_vid_pid error message 2010-08-14 07:59:41 +02:00
Catalin Patulea
36333f9ca8 Fix typo in documentation of usb_blaster_vid_pid command 2010-08-13 23:34:58 +02:00
Øyvind Harboe
f60a2390cc lpc1768: turn down the jtag clock
Tests should that it needs to be as low as 100kHz to be
stable.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-13 12:59:36 +02:00
Piotr Esden-Tempski
dce422516a Added support for the Lisa/L jtag LEDs. 2010-08-13 09:52:35 +02:00
Piotr Esden-Tempski
52ba344a09 Added Lisa/L script as a target board. 2010-08-13 09:52:31 +02:00
Piotr Esden-Tempski
c3ee26d272 Added support for Lisa/L builtin JTAG interface. 2010-08-13 09:52:27 +02:00
Øyvind Harboe
a72faf6405 at91cap7a-stk-sdram.cfg: faster reset
crank up JTAG speed as soon as clocks are set up.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-12 15:01:23 +02:00
Thomas Koeller
07e0bd4685 jtag: fix handling of 'tap enable' error
if a tap could not be _enabled_, the error message was
'failed to disable tap'. Fixed that. Also, display the failing
tap's name.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:05 +02:00
Thomas Koeller
14a25cd6de DM36x: Set OSCDIV divider
The ability to set up the OSCDIV divider was missing.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:04 +02:00
Thomas Koeller
4ed89e4e42 DM36x: Disable unused SYSCLKs
Clear the enable bits for all clocks that are not set explicitly.
This is done to increase robustness by removing pre-existing
state.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:03 +02:00
Thomas Koeller
98d2579c61 DM36x: Use enable bit for PLL pre-divider
The PLL pre- and postdividers seem to have enable bits, although
these are not mentioned in the chip documentation.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-08-12 08:59:02 +02:00
Fredrik Hederstierna
a8c8c238f2 str9x: faster flash erase of entire chip
The patch improves flash erase for STR9x in case of a full bank erase.
Then the chip erase command is used instead which improves speed significantly.

Also I think it might help if e.g. STR912 enters some state where flash banks are locked, and a chip erase command is the key for unlocking the flash.
2010-08-12 08:53:29 +02:00
Øyvind Harboe
8f779cf66b tcl: remove silly ocd_ prefix to array2mem and mem2array
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 17:24:55 +02:00
Øyvind Harboe
f1bd1274ee board: added at91cap7a stk w/sdram config scripts
The strange thing here with this board is that 16MHz kinda
works, but only 2MHz is really stable.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 17:09:44 +02:00
Øyvind Harboe
676f48d77d debug: use assert's when approperiate
error was returned instead of using assert.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 11:01:14 +02:00
Øyvind Harboe
f941192723 arm: add missing error reporting
when an unknown core mode is read from the target,
report error. Can be communication failure.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 10:58:49 +02:00
Øyvind Harboe
ba951aede3 config scripts: remove useless reference to OpenOCD docs
clutters config scripts.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 10:53:54 +02:00
Ben Gardiner
91305bfa7f cfg: add omapl138 support and da850evm preliminary support
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.

I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.

The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.

local.cfg:
gdb_memory_map disable

gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on

Comments welcome.

Best Regards,
Ben Gardiner
2010-08-10 09:43:30 +02:00
Øyvind Harboe
3e71449ade arm7/9: fix "reset run + halt"
if polling is off, then "reset run + halt" would fail
since halt incorrectly assumed the target was in the
reset state as it is the internal poll implementation
that moves the sw tracking of the target state out
of the reset state.

To reproduce:

> reset run; halt
JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)
BUG: arm7/9 does not support halt during reset. This is handled in arm7_9_assert_reset()

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-09 09:14:01 +02:00
Øyvind Harboe
1399e5f753 target: if polling fails, back off
back-off algorithm for polling. Double polling
interval up to 5000ms when it fails.

when polling succeeds, reset backoff.

This avoids flooding logs(as much) when working
with conditions where the target polling will fail.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-09 09:10:37 +02:00
David Brownell
28ddefd065 Luminary-icdi comment update
Clarify that ICDI is the generic logic, but this config is
for the JTAG-only (no-SWD) mode.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-03 21:29:05 -04:00
Mike Dunn
7682877c8c xscale documentation: vector table handling
Hi everyone.  I noticed some incorrect information in the user manual
regarding how the vector table is handled on the xscale, so for your
consideration, here's a short patch that corrects it, and adds a
little more detail I thought might be helpful.

The documentation states that OpenOCD does not attempt to synchronize
the vector tables in memory with those stored in the "mini instruction
cache".  In fact, on each resume it does copy from memory to the cache
all entries in the high and low tables that were not previously
defined using the 'xscale vector_table' command. (In
src/target/xscale.c, see xscale_update_vectors(), which is invoked by
xscale_resume().)  I take advantage of this during Linux boot-up.  The
extra detail describes in general terms how I do this.

Corrections, comments are of course gratefully received.

Thanks,
Mike

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
2010-08-02 22:39:48 +02:00
Øyvind Harboe
bfa34f88f8 verify_image: print out a statement that there are no further errors
It is useful to know that the printed errors are *all* the
errors there were.

Added missing error handling(found by inspection).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 22:22:03 +02:00
Øyvind Harboe
c49d4c9f7f zy1000: use correct base clock when calculating speed divisor
revc uses 60MHz and revb 64MHz, use this in calculations.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 22:22:03 +02:00
Øyvind Harboe
4e27305ed5 zy1000: print out khz correctly in response to setting JTAG speed
Calculate printout based on same core routines.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 22:22:02 +02:00
Øyvind Harboe
d1638abd6a lpc1768: even if rclk "works", it isn't necessarily the correct clk
rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 13:21:21 +02:00
Øyvind Harboe
6ed9ab5b58 ioutil: fix internal fn names
prefix w/ioutil_

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 11:59:46 +02:00
Øyvind Harboe
ab818f6898 jtag: measure_clk debug proc
It can be useful to get an approximate measurement of
rtck frequency for debugging purposes.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 11:15:21 +02:00
Øyvind Harboe
803351ec59 jtag: add jtag_flush_queue_sleep debug command
it can be useful to throttle performance: test
differences in behavior, test performance effect
of long roundtrips.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 09:54:06 +02:00
Øyvind Harboe
630fc86ee3 util: ms command to calculate length of operations
This can be used to calculate approximate RTCK frequency
for instance.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-01 09:35:58 +02:00
Peter Stuge
8e9b12dc8a Support NGX Technologies product NGX ARM USB JTAG
This is a standard FT2232 device. More info at their web page:
http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30
2010-08-01 09:10:47 +02:00
Peter Stuge
8772355bbd Remove srst_pulls_trst from LPC2148 target
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact
which is already documented in doc/openocd.texi, so it shouldn't be
set unconditionally in the target tcl.

This patch was needed to reflash when an Abort exception occured very
early after reset, before OpenOCD tried to halt the CPU.
2010-08-01 09:10:47 +02:00
David Brownell
a84112f471 stellaris flash comment update
This flash driver works on more than just two chips.
(Though it does need work still, e.g. to protect more than 64K.
(On non-'3748-A0 chips where errata allow that.))

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-01 02:27:14 -04:00
Øyvind Harboe
f4c1f08f16 lpc7168: make flash available upon reset init
set user mode to avoid ROM being mapped at address
0 rather than flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-30 22:36:00 +02:00
David Brownell
a463670c31 "transport select" returns Jim value
Make it scriptable, so code can be conditionalized based on
what transport is in use for the session.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-24 14:38:46 -04:00
Michal Demin
51d9b56861 Buspirate: fix shadow 2010-07-23 19:13:29 +02:00
Spencer Oliver
450aaad1e9 docs: removed unused cmd 'fast'
The cmd fast was removed in commit c0d14dc7f1

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-20 10:46:54 +01:00
Spencer Oliver
260eb4548b flash: remove algorithm exit_point address for supported targets
For the above targets the exit_point is
optional when used with run_algorithm, so remove it.

This makes updating the algorithm less error prone.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-20 09:02:42 +01:00
Spencer Oliver
ee17d5c48e mips32: exit_point optional for mips32_run_algorithm
As the mips32 uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.

This now matches the behaviour of the arm codebase.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-20 09:02:35 +01:00
Spencer Oliver
7176ed9afe armv7m: exit_point optional for armv7m_run_algorithm
As the armv7m uses instruction breakpoints for algorithms we do not really
need to check the pc on exit.

This now matches the behaviour of the arm4_5 codebase.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-20 09:02:27 +01:00
Spencer Oliver
f0c0256b1f armv4_5: add algorithms instruction breakpoint support
Update the arm_checksum_memory and arm_blank_check_memory
algorithms to use a breakpoint instruction on v5 arch.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-20 09:02:10 +01:00
Øyvind Harboe
1143bbc0c8 arm11 error propagation fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-20 08:42:52 +02:00
Øyvind Harboe
e0525cd182 arm_jtag_scann error propagation fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-20 08:24:53 +02:00
Øyvind Harboe
a9761c9093 arm_dpm: error propagation fixes
found by inspection

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
441ea95f69 adi_jtag_ error propagation
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
4333840ee3 arm: error propagation of arm_jtag_set_instr
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
5164fe5563 arm_adi_v5: dap_run() error propagation
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
b62c8d6009 arm_adi_v5: mem_ap_write error propagation
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
a7315891ef arm_adi_v5: error propagation of mem_ap_read_atomic_u32 failure
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
7dcde11b45 mem_ap_read_u32 error propagation
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
e7a1ec64bf arm_adi_v5: add error propagation for dap_setup_accessport
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
44ef0327dd debug: debug entry error propagation
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
6c573df11d cortex a8: added timeout handling
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:49 +02:00
Øyvind Harboe
6a237c23c1 arm: add error propagation for enable/disable mmu caches
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:48 +02:00
Øyvind Harboe
70fee9207b arm: add error propagation to generic get_ttb fn
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 22:13:48 +02:00
David Brownell
612184176f more careful luminary init
Set up more of the Luminary-specific signals, and stop cloning
a few of the JTAG defaults.  More comments too.

Still leaves the "dap info 0" bugs unresolved (presumably coupled
to this particular adapter family) where TPIU, ITM, DWT, and other
debug modules wrongly display as extra NVICs.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-19 16:08:09 -04:00
Spencer Oliver
8dbe367c53 cfg: add Amontec JTAGkey2p interface config (Issue #26)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 17:31:38 +01:00
Spencer Oliver
4611f87f0a flash: add nuc910 nand driver
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 12:22:18 +01:00
Spencer Oliver
0345667642 nand: nand probe also outputs manufacturer
The nand probe now outputs the manufacturer if found.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 09:10:55 +01:00
Spencer Oliver
8f5e84bf8d cfg: update rsc-w910 script
- Only enable the FMI (NAND) and DMA clocks.
 - Select NAND interface on the MFSEL.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 09:10:54 +01:00
Spencer Oliver
d249057adf docs: missing parameter from nand check_bad_blocks
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 09:10:52 +01:00
Øyvind Harboe
20c1d4cc9a cortex a8: lots of error propagation fixes
found by code inspection

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 08:36:15 +02:00
Øyvind Harboe
221ce7c89b cortex a8: mem_ap_read_buf_u32() error handling
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 08:36:15 +02:00
Øyvind Harboe
8249261b88 cortex a8: add missing error handling for cortex_a8_dap_write/read_coreregister_u32()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 08:36:15 +02:00
Øyvind Harboe
a2d5b0ef77 cortex a8: add missing error handling from cortex_a8_exec_opcode()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 08:36:15 +02:00
Øyvind Harboe
ad02493cf2 cortex a8: add missing error handling for mem_ap_atomic_write_u32()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 08:36:14 +02:00
Øyvind Harboe
19fc52f008 cortex a8: add missing error handling for mem_ap_read_atomic_u32()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-19 08:36:14 +02:00
David Brownell
d10f0def80 comments for Luminary ICDI layout
Provide $defines for more of the signals involved in the
Luminary ICDI hardware, and comment some of what's going on.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-18 17:29:25 -04:00
Øyvind Harboe
b85dcae447 spelling fixes in comments
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-18 22:56:01 +02:00
Øyvind Harboe
495ef923ef debug-feature: jtagtcpip, improve jtag performance
postpone callbacks until jtag execute queue time.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-18 16:33:02 +02:00
David Brownell
2fdc1db304 lm3s811-ek uses generic stellaris target config
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-17 02:59:23 -04:00
David Brownell
a4dace3122 ARM ADI-V5: cleanup CID/PID addressing
Use addition for offsetting, not masking.  Shorten some lines.
Make "component_start" print-only (unused otherwise; don't save).

Still doesn't resolve the issue where multiple components
are wrongly displaying as NVICs on some Cortex-M3 parts because
many PIDs appear to be zeroes ... maybe adapter related??

Signed-off-by: David Brownell <db@helium.(none)>
2010-07-16 19:22:15 -04:00
Spencer Oliver
b05ae41331 flash: use bkpt for str9 flash algo algorithm
STR9 is ARMv5 arch so use bkpt instruction rather than
waste a breakpoint.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-16 22:52:49 +01:00
Øyvind Harboe
d16f9259c2 fix warnings
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-16 16:03:32 +02:00
Øyvind Harboe
9cbf0723d5 debug-feature: jtagtcpip, reduce performance impact of ping times
queue read back of data

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-16 16:03:25 +02:00
Øyvind Harboe
01b2a3091a debug feature: jtagtcpip, improve performance
waiting for ZY1000 fifo to idle is now queued as
an asynchronous command. This radically improves
performance when waitIdle() is interspersed with
writes as no readback is required over TCP/IP.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-16 12:18:59 +02:00
Øyvind Harboe
bb588bdaec debug feature: jtagtcpip, improved performance
only check error flag when rclk is actually enabled.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-16 12:18:35 +02:00
David Brownell
0672a6497e ARM ADI-V5: PIDs and CIDs are 8 bits
Mask the upper bits after 32-bit reads.

Alsoo revert the ugly changes to use PRIx32; just cast to unsized
integers when printing (two chars not eight).

Signed-off-by: David Brownell <db@helium.(none)>
2010-07-13 19:34:04 -04:00
Spencer Oliver
1619facb5e cfg: add Avalue RSC-W910 config
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-13 14:17:00 +01:00
Spencer Oliver
f129ef67dc jtag: fix shadow issues in adapter_init
Use global jtag_only rather than local static.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-12 20:04:57 +01:00
Spencer Oliver
e521f6415b arm9: revert change arm9tdmi cmd group name to arm9
This reverts the incorrect change made to the arm9 cmd group in commit
d1eca9a74c.

The code now matches the docs and the release notes.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-12 19:48:45 +01:00
Spencer Oliver
dc4df8bb97 docs: fix transport typo
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-12 19:36:19 +01:00
Spencer Oliver
1c79432061 adapter.c: missing space in handle_interface_command
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-12 09:34:03 +01:00
David Brownell
e8445c9c9f transport selection tweaks
* Bugfix and simplify legacy jtag-only defaulting
* Make "dummy" declare its jtag-only nature
* likewise update ft2232
* warn if selection is _required_ (multi-transport adapters),

fixes the "only ft2232 works" bug for at least dummy, with
other drivers going the "legacy" path (submit patches).

Signed-off-by: David Brownell <db@helium.(none)>
2010-07-09 18:34:31 -04:00
Spencer Oliver
ac5ad4ad8d transport: fix bug/typo in transport_register cmd
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-09 22:02:52 +01:00
Øyvind Harboe
daa02f7d84 transport: fix segfault in transport select
String compare against addresses in range 0 or so due
to not checking if there was an active session first.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-07 17:33:04 +02:00
Øyvind Harboe
ccaa9edf29 transport: fix bug/typo in interface_transports command
Classic manifestation of weakness of dangling {
formatting :-) Hard to spot these sort of mistakes visually.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-07 15:09:13 +02:00
sb-sf
3099858c68 gdbserver: incorrect memory map for multiple targets (bug #24)
The gdb server incorrectly reports the memory map if we have
multiple targets with multiple flash banks.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-05 14:16:15 +01:00
Stacey Sheldon
1e0f898415 transport: fix segfault in setup_command_handler()
Commit 93f2afa45f dropped the sentinel off the end
of the command_registrants[] array.  The loop immediately
following the initialization will walk right off the end.

Signed-off-by: Stacey Sheldon <stac@solidgoldbomb.org>
2010-07-05 09:15:52 +02:00
David Brownell
db8b99aed6 Fix minor openocd.texi bug
::X
Signed-off-by: David Brownell <db@helium.(none)>
2010-07-02 17:14:52 -04:00
David Brownell
93f2afa45f initial "transport" framework
This adds the guts of a transport framework with initialization,
which should work with current JTAG-only configurations (tested
with FT2232).

Each debug adapter can declare the transports it supports, and
exactly one transport is initialized.  (with its commands) in
any given OpenOCD session.

  * Define a new "struct transport with init hooks and a few
 "transport"  subcommands to support it:

     "list" ... list the transports configured (just "jtag" for now)
     "select" ... makes the debug session use that transport
     "init" ... initializes the selected transport (internal)

  * "interface_transports" ... declares transports the current interface
    can support.  (Some will do this from C code instead, when there are
    no hardware versioning (or other) issues to prevent it.

Plus some FT2232 tweaks, including a few to streamline upcoming
support for an SWD transport (initially for Luminary adapters).

Eventually src/jtag should probably become src/transport, moving
jtag-specific stuff  to transport/jtag.

Signed-off-by: David Brownell <db@helium.(none)>
2010-07-02 16:45:28 -04:00
Spencer Oliver
deb176d335 ft2232: revert ft2232_read_scan changes
Revert change made in commit dd88b461da.
Caused segfaults when using ftdi driver under win32.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-02 17:00:57 +01:00
Spencer Oliver
f97b6b59ab ft2232: bugfix from previous commit
fix build error with commit dd88b461da

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-01 19:43:58 +01:00
Marc Pignat
dd88b461da ft2232: simplify ft2232_read_scan 2010-07-01 09:32:56 +02:00
Marc Pignat
cd7f443103 ft2232: cleanup ft2232_write
* Include the size check into ft2232_write, so calling it is simpler.
* Use sizeof(buffer) when possible
2010-07-01 09:32:48 +02:00
Olaf Lüke
2986320cde at91sam3s* support
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-25 21:37:53 +02:00
Øyvind Harboe
fb96b8607a openocd: setup_command_handler() must not be static
when OpenOCD is linked with an app this fn can be used from
the outside.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-23 11:43:40 +02:00
Øyvind Harboe
e5d1befe43 arm11: fix gaffe in no-ack transfers
The code did not transfer the last word in no-ack transfers.

The strange thing is that this did not lead to any
observable errors.

This gaffe was introduced in commit 1f5883ea56

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-23 11:10:30 +02:00
Antonio Borneo
6cb2d6dd7a error number: review
Review allocation of error numbers in openocd
to avoid overlap.
Put brackets around negative numbers to avoid
issues during macro expansion.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-23 07:55:43 +02:00
Øyvind Harboe
4fa3cc7746 am3517 evm: use physical write to memory while target is running
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 12:49:56 +02:00
Øyvind Harboe
d236a48e8f cortex a8: only physical read/write's are available when target is running
Memory read/writes to virtual memory, requires that the CPU is
halted.

Use 'phys' option to write to memory while target is running.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 12:47:30 +02:00
Øyvind Harboe
33e7696cfa target: $_TARGET mdw now has a phys option
just like the mdw command

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 12:43:30 +02:00
Øyvind Harboe
8b82171f75 target: mwX on target object now supporst phys argument
$_TARGETNAME mww phys 0x10 0xdeadbeef

=> write 0xdeadbeef to physical address 0x10

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 12:36:32 +02:00
Edgar Grimberg
f44eeba16f xsvf: Fix shadow issues on Mac
wait is declared in /usr/include/sys/wait.h

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
2010-06-22 08:24:26 +02:00
Edgar Grimberg
bf8d954352 target: Fix shadow issues on Mac
wait is declared in /usr/include/sys/wait.h

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
2010-06-22 08:24:23 +02:00
Edgar Grimberg
bef497aeb0 flash: fix shadow issues on Mac
Wait is declared in /usr/include/sys/wait.h

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
2010-06-22 08:24:19 +02:00
Øyvind Harboe
fe1f7f63b6 board: add alpha am3517evm ti board config file
Signs of life: reset(kinda), halt, resume and memory
display/modify.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:01 +02:00
Øyvind Harboe
9a8fe44c83 gitignore: start list of emacs temp files to ignore
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:01 +02:00
Øyvind Harboe
b50bb632ad cortex a8: print message that locking debug access succeeded on second try
when locking the debug access fails on the first try, it's a
bit noisy, so print out message that it succeeded on second try.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:01 +02:00
Øyvind Harboe
4d238c7f91 cortex a8: add error propagation for poll/resume
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:01 +02:00
Øyvind Harboe
59bf45be1f cortex a8: add timeouts waiting for restart, prepare and halt
It would previously sit in an infinite loop rather
than reporting an error.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:01 +02:00
Øyvind Harboe
37cfbe4917 cortex a8: add error propagation for mem_ap_read/write_atomic_u32
Error propagation avoids e.g. infinite loops waiting
for target to halt, etc.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:00 +02:00
Øyvind Harboe
19925e4d7f arm_adi_v5: error propagation fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:00 +02:00
Antonio Borneo
f747b16e4e nand/mx2: review scope of symbols
Add "static" qualifier to private variable.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:24 +08:00
Antonio Borneo
9b5572857a nor/str7x: review scope of symbols
Add "static" qualifier to private function.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:23 +08:00
Antonio Borneo
bc7fa896e6 openocd.c: review scope of symbols
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:21 +08:00
Antonio Borneo
190986eb8c nor/virtual: review scope of symbols
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:19 +08:00
Antonio Borneo
ff1c09fbea target/avrt: review unused symbols
Remove unused functions:
- mcu_write_dr_u16
- mcu_write_dr_u8
- mcu_write_ir_u16
- mcu_write_ir_u32

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:18 +08:00
Antonio Borneo
decd417064 target/avr: review scope of symbols
Add "static" qualifier to private functions.
Move duplicated global declarations from "target/avrt.c"
and "nor/avrf.c" to "target/avrt.h".
Remove unused declarations form "nor/avrf.c".

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:17 +08:00
Antonio Borneo
d26b5236ba target/feroceon: review scope of symbols
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:15 +08:00
Antonio Borneo
3f59fcf77e target/mips_m4k: review scope of symbols
Add "static" qualifier to private functions.
Remove private prototypes from include file.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:14 +08:00
Antonio Borneo
b978dcbbee helper/jim-eventloop.h: review unused definitions
Remove unused typedef and define

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:12 +08:00
Antonio Borneo
3cfbf70559 helper/jim-eventloop: review unused symbols
Remove unused functions:
- Jim_CreateSignalHandler
- Jim_DeleteSignalHandler

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:11 +08:00
Antonio Borneo
ec073e8943 helper/jim-eventloop: review scope of symbols
Add "static" qualifier to private functions.
Remove private prototypes from include file.
Remove empty definition of JIM_STATIC.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-21 22:14:08 +08:00
Øyvind Harboe
2fbb0b5972 jtag: retire jtag_get_error()
This fn is an implementation detail of jtag_execute_queue()
that is not to be exposed externally.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-21 13:43:36 +02:00
Øyvind Harboe
dcba070958 jtag: do not use jtag_get_error()
normal code should not call jtag_get_error(), but rather check
the return code from jtag_execute_queue().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-21 13:43:23 +02:00
Øyvind Harboe
7013b960fe adi_v5_jtag: add missing error handling
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-21 09:03:31 +02:00
Øyvind Harboe
8d1dcb9bcd cortex a8: add missing error handling
cortex examine was missing error handling.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-21 09:03:31 +02:00
Andreas Fritiofson
acee9d1c65 arm-jtag-ew: -Wshadow fix
declaration of ‘index’ shadows a global declaration
in /usr/include/string.h

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2010-06-19 11:37:20 +02:00
Øyvind Harboe
2a25c968bf cortex a8: fix segfault for unexamined targets
print error message instead of segfaulting for
unexamined targets.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-19 09:26:53 +02:00
Antonio Borneo
b8f8d756a2 target/dsp563xx: review unused symbols
Remove unused functions:
- dsp563xx_jtag_senddat
- dsp563xx_write_ir_u16
- dsp563xx_write_dr_u16
- dsp563xx_write_ir_u32

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-18 10:03:40 +02:00
Antonio Borneo
2319caff7d target/dsp563xx: review scope of symbols
Add "static" qualifier to private functions.
Remove private prototypes from include file.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-18 10:03:40 +02:00
Andreas Fritiofson
3f9d377ce7 reverse order of Jim stack trace output
The stack traces makes much more sense this way.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2010-06-18 08:06:19 +02:00
Andreas Fritiofson
127f9da4fe don't add confusing source info to Jim
When an interactive command fails, the Jim stack trace prints references to
the line in "command.c" where the interpreter was invoked. Since that
location has no relation to the actual command that failed, the information
serves only to add confusion.

By not adding the useless source info to Jim the noise can be reduced,
while still printing a useful trace for nested commands.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-18 07:57:15 +02:00
Antonio Borneo
c3ee63be77 helper/jim: review unused symbols
Remove unused functions:
- Jim_IdentityHashFunction
- StringAppendObj
- JimReferencesHTDoubleHashFunction

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-18 07:52:51 +02:00
Antonio Borneo
cebd817cee helper/jim: review scope of symbols
Add "static" qualifier to private functions.

Function Jim_InterpolateTokens() is private, but has not
been changed to "static".
This function is called only once, so compiler inlines it.
After inline, there is a warning for variable uninitialized.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-18 07:52:47 +02:00
Freddie Chopin
ada8f5963d mingw32: -Wshadow fixes in arm-jtag-ew.c
(error: declaration of ‘stat’ shadows a global declaration; /usr/local/lib/gcc/i686-w64-mingw32/4.4.2/../../../../i686-w64-mingw32/include/sys/stat.h:279: error: shadowed declaration is here)

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-06-17 21:10:10 +02:00
Freddie Chopin
3eaab9b55b mingw32: -Wshadow fixes in rlink.c
(error: declaration of ‘byte’ shadows a global declaration; /usr/local/lib/gcc/i686-w64-mingw32/4.4.2/../../../../i686-w64-mingw32/include/rpcndr.h:50: error: shadowed declaration is here)

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-06-17 21:10:01 +02:00
Freddie Chopin
647fe050db rlink: -Wshadows fixes
(error: declaration of ‘pHDev’ shadows a global declaration; ../../../../src/jtag/drivers/rlink.c:102: error: shadowed declaration is here)

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-06-17 21:09:43 +02:00
Freddie Chopin
b1cd202f9a mingw32: -Wshadow fixes
in jim.c (error: declaration of ‘boolean’ shadows a global declaration; /usr/local/lib/gcc/i686-w64-mingw32/4.4.2/../../../../i686-w64-mingw32/include/rpcndr.h:52: error: shadowed declaration is here)

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-06-17 21:09:24 +02:00
Antonio Borneo
f2f798fdd3 jlink: fix -Wshadow warning
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-17 18:14:20 +02:00
Antonio Borneo
d4e4da0fa1 vsllink: fix -Wshadow warning
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-17 18:14:12 +02:00
Oyvind Harboe
8a2808681e gdb-server: fix -Wshadow warning
This warning was only reproducable with
Cygwin.

Cygwin now builds without warnings for the basic
case.

Signed-off-by: Oyvind Harboe <oyvind.harboe@zylin.com>
2010-06-17 15:41:07 +02:00
Øyvind Harboe
80eb7e2a78 zy1000: fix arm11 optimisation
copy & paste error + added FIFO throttling to work around
lockup bug in FPGA.

The arm11 optimisation was introduced post v0.4.0, so this
is not a regression compared to previous release.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-17 12:17:12 +02:00
Antonio Borneo
b89462d7dc helper: remove helper membuf
Helper is now unused. Can be removed.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-17 07:20:42 +02:00
Antonio Borneo
984bf15821 nor/at91sam3: replace helper membuf
Helper ./src/helper/membuf.c is only used in at91sam3.c

1) Replace membuf with LOG_*

2) The original code in sam3_GetDetails() invalidates
   all the buffered output of sam3_GetInfo(). The new
   code skips sam3_GetInfo() if its output should not
   be printed.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-17 07:20:36 +02:00
Øyvind Harboe
814c2a8f9a build: enable -Wshadow by default
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 08:58:40 +02:00
Øyvind Harboe
818120d409 gdb: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 08:58:40 +02:00
Øyvind Harboe
5104d56e5c gdb: clean up error handling in step/continue
if step/continue fails, then the error should be
reported to the calling fn.

The calling fn decides if the connection has to be
aborted or if packet processing can continue.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 08:57:49 +02:00
Øyvind Harboe
cd9c61cc06 xsvf: -Wshadow warning fixes
I think this fixed an error message where the error
message would show the *previous* uc code rather than
the current unsupported uc code.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 08:19:25 +02:00
Øyvind Harboe
9bbbbdc0bd svf: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 08:17:27 +02:00
Øyvind Harboe
f4958d61ef mflash: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 07:42:41 +02:00
Øyvind Harboe
94f373b404 arm_io: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 07:41:43 +02:00
Øyvind Harboe
6de2b2d14b nand: when verify failed, it didn't return an error
when the verify failed, it didn't return an error,
which breaks e.g. tcl scripts that rely on this for
exceptions to work.

Found by -Wshadow

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 07:39:46 +02:00
Øyvind Harboe
72d227cd5e tms470: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 00:08:58 +02:00
Øyvind Harboe
42c84c59b1 str9xpec: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 00:07:59 +02:00
Øyvind Harboe
f9acaa894f str9x: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 00:05:58 +02:00
Øyvind Harboe
f1ce4fe288 oops... backup file snuck in, remove it.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 00:04:23 +02:00
Øyvind Harboe
8022940c5c str7x: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 00:02:58 +02:00
Øyvind Harboe
72eb87673c stm32x: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-16 00:00:57 +02:00
Øyvind Harboe
e538367186 stellaris: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:59:21 +02:00
Øyvind Harboe
0a837fc36b lpc2900: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:58:19 +02:00
Øyvind Harboe
0365225c48 lpc2000: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:53:36 +02:00
Øyvind Harboe
953d96f1e2 ecos flash: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:32:47 +02:00
Øyvind Harboe
88aa5e31d1 at91sam7: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:31:36 +02:00
Øyvind Harboe
90454525b6 flash: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:29:08 +02:00
Øyvind Harboe
4d0d649ef9 mips_ejtag: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:27:08 +02:00
Øyvind Harboe
26a77f71e1 mips32_pracc: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:26:16 +02:00
Øyvind Harboe
e85fe0a637 mips_m4k: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:25:32 +02:00
Øyvind Harboe
43a9282203 mips32: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:24:47 +02:00
Øyvind Harboe
78b7a571e9 cortex_a8: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:23:16 +02:00
Øyvind Harboe
4bd415d01b arm11_dbgtap: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:22:24 +02:00
Øyvind Harboe
8cfd25d29e arm926ejs: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:20:00 +02:00
Øyvind Harboe
97197c98eb arm920t: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:18:44 +02:00
Øyvind Harboe
da5979c38d arm720t: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:17:00 +02:00
Øyvind Harboe
ab6e62ab76 adi_v5_jtag: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:15:50 +02:00
Øyvind Harboe
66f42b6f74 arm_adi: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:14:41 +02:00
Øyvind Harboe
a09d6020e0 arm_simulator: -Wshadow warning fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:14:20 +02:00
Øyvind Harboe
748863c2e2 arm_dpm: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:09:12 +02:00
Øyvind Harboe
64cf05f0c4 target: -Wshdaow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:07:45 +02:00
Øyvind Harboe
83ebddd519 breakpoint: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:04:22 +02:00
Øyvind Harboe
9161b5fc5c zy1000: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:02:46 +02:00
Øyvind Harboe
395d3bff8c fileio: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 23:01:42 +02:00
Øyvind Harboe
00017c90ae jim: -Wshadow warning fix
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 22:47:52 +02:00
Øyvind Harboe
3c8a0e72f3 jim: more jim -Wshadow fixes that should be straightforward
this bunch was a bit less obvious, but looked
straightforward.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 22:45:24 +02:00
Øyvind Harboe
2eba49b8b1 jim: -Wshadow fixes
this batch of fixes should be pretty straightforward
rename of 'index' and an 'i' local variable shadowing.

'index' conflicts with a global name.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 22:45:23 +02:00
Thomas Koeller
c9e2d13cf9 DM36x: pll & clock setup
Added a function 'pll_v03_setup' to set up PLLs and clock
dividers on DM365 and DM368.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 10:40:05 +02:00
michal smulski
bf3410fcc7 arm1136 scripts
Here is a patch to fix a startup in C100 (arm1136). Basically make sure
that UART is configured before using it.

Michal

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 07:39:59 +02:00
Øyvind Harboe
3e51d893ed -Wshadow fixes
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-14 22:12:04 +02:00
Øyvind Harboe
9132f7083d cfi: add LOG_ERROR() in case of unsupported intel erase algorithm
found by code inspection. There are many other places in
CFI where LOG_ERROR() should be called similarly...

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-14 15:42:39 +02:00
Øyvind Harboe
b6a8254065 flash: fix bug in error propagation of flash write_image
when a write/unlock/erase failed during write_image, then
an error was not propagated back up so e.g. flash write
image from tcl scripts would not throw an exception.

Also flash filling speed was printed even when the
operation failed. Output is now less confusing.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-14 12:27:58 +02:00
Øyvind Harboe
f3ae52cace helper: fix -Wshadow warning in number parsing
use obtuse local variable names in macros to avoid
interfering with global name space

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-14 12:27:57 +02:00
Øyvind Harboe
18918a0423 cfi: fix gaffe introduced in previous version
flash probe broke w/in last commit.

ecc8041c0f

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-14 09:48:12 +02:00
Øyvind Harboe
aa2de47d3c target: fix retval gaffe in mwX commands
failure to write to memory was not propagated.

This is an interesting case of broken error handling:
with exceptions we wouldn't have had this at all,
and I also wonder if there is a GCC option to warn
about these kinds of potential bugs.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-14 09:30:37 +02:00
Antonio Borneo
bac52fbac8 TARGET: removed unused parameters
Parameters "domain" and "ap" of function armv4_5_mmu_translate_va()
are not used.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12 16:41:46 +02:00
Antonio Borneo
9e62f86f24 TARGET: removed unsed parameter
Parameter "type" of function armv4_5_mmu_translate_va()
is now not used.
Remove the parameter and the "enum" listing its values.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12 12:08:12 +02:00
Antonio Borneo
ce58ab9a4e TARGET: fix handling return code of MMU translation
Function armv4_5_mmu_translate_va() now properly signals
errors in the return value.
Remove former error handling by setting variable "type" to
value "-1".

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12 12:08:06 +02:00
Antonio Borneo
dcc7de4f9b TARGET/ARM920T: fix return value
Function arm920t_write_memory() default return value
should be ERROR_OK.
All cases of local errors are handled immediately and
not further propagated.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12 12:08:00 +02:00
Antonio Borneo
20724e3325 TARGET/ARM920T: fix compile warning
Commit 0538081246
introduces a compile time warning:
arm920t.c: In function ‘arm920t_write_memory’:
arm920t.c:567: warning: ‘retval’ may be used uninitialized in this function

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-06-12 12:07:53 +02:00
Øyvind Harboe
4532dc7831 flash: add error handling to get_flash_by_addr/name
autoprobing can fail and this error has to be
reported up the call stack.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-11 15:53:23 +02:00
Øyvind Harboe
0538081246 arm mmu: error propagation added for address translation
The return value for MMU translation was a mess, either
error or value.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-11 15:53:23 +02:00
Øyvind Harboe
ecc8041c0f cfi: fix error propagation
any read/write operation to memory can fail.

block write algorithm error propagation was broken
in that it would continue after an error was reported
writing data to ram or the algorithm failing.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-11 15:53:23 +02:00
Thomas Koeller
73aaaf4830 jtag: added mising header
Distributions created by 'make dist' were incomplete due to a
missing header file.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
2010-06-10 17:29:25 +02:00
Øyvind Harboe
9ab7636ce6 flash: add error message if image is too big for flash
replaced assert() w/error message if the image is
too big.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-09 17:12:52 +02:00
Øyvind Harboe
49e6c61bcc flash: flash erase_address takes unsigned arguments
fixed bug where address was parsed as a signed, rather
than unsigned it.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-09 16:01:10 +02:00
Øyvind Harboe
c634680384 zy1000: fix optimisation gaffe
DCC optimisation was broken on targets w/multiple TAP's.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-08 10:50:48 +02:00
Øyvind Harboe
f6236ade0e zy1000: added watchdog server
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-08 10:50:48 +02:00
Øyvind Harboe
14c112e992 cfi: fix GDB keep alive bug
Long running CFI writes could cause GDB timeout.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-08 10:48:46 +02:00
Øyvind Harboe
31bbb3cf0c verify: display up to 128 diff's
Showing up to 128 differences.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-08 10:46:33 +02:00
Øyvind Harboe
54f3f8e4c1 gdb-server: fix error reporting bugs
GDB and OpenOCD has two different error number
spaces and no mapping exists between them.

If a specific error number is to be reported
to GDB then this has to be done at the calling
site, rather than as a generic routine that
tries to map "retval" to GDB error number speak.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-08 10:37:03 +02:00
Øyvind Harboe
00635e28ba jtag: rename JTAG_MOVESTATE to JTAG_TLR_RESET
JTAG_MOVESTATE is misleading, this cmd is only used
for reset.

JTAG_PATHMOVE should be used otherwise.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-07 15:08:30 +02:00
gcembed
a1cf1b5244 stm32 : change returned value of mass_erase function
Hello,
"stm32x mass_erase" return ERROR_OK even if something goes wrong.
Here is a summary of changes :
* in stm32x_mass_erase : return ERROR_FLASH_OPERATION_FAILED when error
detected in FLASH_SR register;
* in COMMAND_HANDLER(stm32x_handle_mass_erase_command) : return the
returned value of stm32x_mass_erase().

I don't know if there is reason to always return ERROR_OK ?

Gaëtan
2010-06-03 20:40:00 +02:00
Spencer Oliver
631514724d NEWS: updates
Add new features since 0.4.0 release.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-06-03 10:20:06 +01:00
Jon Povey
d944a0bed7 etm: print something when trace buffer empty
ETM analyze produced no output when the trace buffer was empty.
This patch provides users with a clue.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-31 07:14:38 +02:00
Spencer Oliver
86e851e1e2 nor: fix memory leaks during probe
Fix similar memory leaks as per commit:
ef72484b78

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-29 15:43:42 +01:00
Spencer Oliver
215353ef67 flash: virtual driver update for get_flash_bank_by_name_noprobe
Make sure we do not probe a flash when getting info.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:10:17 +01:00
Spencer Oliver
ee4106ee99 nor: add get_flash_bank_by_name autoprobe
When a flash cmd is called using the flash name the autoprobe
function is not called. autoprobe is called if flash_command_get_bank
falls through to get_flash_bank_by_num.

This makes both get_flash_bank_by_name and get_flash_bank_by_num
behave the same.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:10:16 +01:00
Spencer Oliver
94dc7c0a93 cfg: add pic32 virtual banks
make use of the new virtual bank flash driver.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:10:15 +01:00
Spencer Oliver
5319ccd7eb flash: add virtual flash bank driver
This adds a virtual flash bank driver that allows virtual banks to
be defined that refer to an existing flash bank.

For example the real address for bank0 on the pic32 is 0x1fc00000
but the user program will either be in kseg0 (0xbfc00000) or
kseg1 (0x9fc00000).
This also means that gdb will be aware of all the read only flash
addresses.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:10:15 +01:00
Antonio Borneo
ef72484b78 NOR/CFI: fix memory leak; check malloc return value
Every time command "flash probe #" is executed, memory
structures are re-allocated without preventive free()
of former areas, causing memory leak.
Also, memory allocation does not check return value,
determining segmentation fault in case of out of memory.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:01:07 +01:00
Freddie Chopin
f1c1bed39a There are no variants of arm7tdmi target
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:40 +01:00
Freddie Chopin
e2c9518eda All LPC2xxx chips are little endian and that cannot be changed - update config scripts
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:30 +01:00
Freddie Chopin
9c3b4cfc5d add correct CPUTAPID value for LPC2129
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:18 +01:00
Freddie Chopin
0e4f4bacdc Update "flash bank" helper comments for LPC2xxx chips
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:08 +01:00
Freddie Chopin
06df4664a9 LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so "flash bank" parameter should be 4000 (not 12000)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:20:43 +01:00
Øyvind Harboe
2e1eaaae35 at91sam9260: use RCLK
It might be possible to get this target going without
RCLK, but it would require more careful analysis and
usage of the reset events.

Enable fast memory accesses.

Tested on an at91sam9260 custom board w/external DRAM
and flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-21 14:00:11 +02:00
Spencer Oliver
82ef8472bf cfg: update stm32 performance stick config
- As this is a complete unit, including jtag we might as welli nclude
the jtag cfg.
 - Add missing id for the str750 that is also in the jtag chain.
 - Reduce jtag startup speed to 500kHz.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-21 11:45:40 +01:00
Spencer Oliver
c0cdb7c631 arm_adi_v5: correct ahbap_debugport_init mem-ap id (bug #23)
We request a id register read at the end of ahbap_debugport_init
but we never actually run the queue. In some cases this causes a
segfault.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-21 11:43:17 +01:00
Jon Povey
72ba8ec90e board: dm355evm.cfg SDTIMR0/1 minor naming fix
Register name fix; ref. TI document sprueh7d

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-21 07:31:40 +02:00
gcembed
f40faeb349 nand : Add Freescale iMX27 nand flash controller support
This patch add support of iMX27 nand flash controller. This is based on
driver for imx31 nand flash controller.
OOB functionality is not fully working. As in mx31 controller, mx2 NFC
has a bug that swap two bytes between SPARE and MAIN buffer.
I used this driver for several months and no problems appear.
2010-05-20 08:28:36 +02:00
Gary Carlson
8465e99442 reset: fix reset halt bug
I was finally able to figure out the cause of this problem.  There are two
parts to the patch.  The first patch modifies the configuration file I
originally generated for the Atmel AT91SAM9G20 board and achieves the
following:

+++ Splits the reset-init handler into a reset-start handler for some of the
initial configuration activities and keeps the remainder in the reset-init
handler as was the case before.  This was the real issue that was causing
the timing problems I identified before.  This solution was confirmed with
an o-scope on actual target hardware.

+++ Adds a new instruction in the reset-start handler to disable fast memory
accesses in the reset-start handler.  When the target jtag clock is started
out at 2 kHz during system clock initialization, memory writes (i.e.
register write to enable external reset pin -- basically to RSTC_MR) are
naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for
additional fixes).

+++ Modifies the configuration file to use srst_only reset action. The
reset-start/reset-init handler split also now allows the correct behavior to
be used in the configuration file (previously had to use both SRST and TRST
even though only SRST is actually used and connected on the evaluation
board).

+++ Adds external NandFlash configuration support to take advantage of flash
driver added earlier.  Doesn't fix any bugs but adds functionality that was
marked as TBD before and thrown in when I did other work on the
configuration file.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-19 07:37:07 +02:00
Gary Carlson
b80d0501b6 target: slow targets could cause GDB to time out
This second half of the patch is proposed to clean up some GDB keep alive
issues on arm7_9 targets that start up with very slow clocks.  If an attempt
is made to write to key registers on the processor with a slow jtag speed,
GDB timeout warnings appear on the console (at least mine) when "reset halt"
or "reset init" commands are issued from the gdb client:

*** BEFORE PATCH ***

(gdb) monitor reset init
fast memory access is disabled
2 kHz
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1026). Workaround: increase "set remotetimeout" in GDB
JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part:
0x7926, ver: 0x0)
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1027). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1006). Workaround: increase "set remotetimeout" in GDB
keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not
sent! (1004). Workaround: increase "set remotetimeout" in GDB
RCLK - adaptive
dcc downloads are enabled
fast memory access is enabled
NAND flash device 'NAND 256MiB 3,3V 8-bit' found
(gdb)

I added additional keep alive steps in areas that troubleshooting revealed
were causing problems.  I only did this however for non-fast write memory
accesses.  I don't think most people would be using fast memory accesses to
write to memory when the jtag and system clocks are slow anyway.

If you disagree with my feeling, think there is a more elegant way to handle
the problem, or think the patch will cause other unforeseen problems with
other targets, let me know.  As you can see below, the patch does eliminate
the problem on my development station and I suspect that it will benefit
others.

*** AFTER PATCH ***

(gdb) monitor reset init
fast memory access is disabled
2 kHz
JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part:
0x7926, ver: 0x0)
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
RCLK - adaptive
dcc downloads are enabled
fast memory access is enabled
NAND flash device 'NAND 256MiB 3,3V 8-bit' found
(gdb)

Gary Carlson

Gary Carlson, MSEE
Principal Engineer
Carlson-Minot Inc.
2010-05-19 07:33:27 +02:00
Øyvind Harboe
c86d7bdad4 jim: fix bug in tcl "puts"
tcl "puts" didn't work because the logging code sensored strings
that did not include a '\n'. The correct thing is to sensor
empty strings, which are used to keep gdb connection alive.

The tcl "puts" code broke apart strings which do contain '\n' in
order to implement the -nonewline argument, which is how it
got hurt by the bug in log.c

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 12:34:12 +02:00
Øyvind Harboe
e804a34a63 zy1000: fix false positive warning about unitialized local variable
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 12:10:44 +02:00
Marc Pignat
e92b203a76 at91rm9200 : reset_config should go to the board config file
Let other boards do other things with srst and trst.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 11:48:47 +02:00
Jon Povey
dc464ad88e NAND/davinci: Fix segfault for hwecc4_infix reads
Page reads using hwecc4_infix layout segfaulted for check_bad_blocks because
the read assumed a valid data buffer, which check_bad_blocks does not use
(it only passes a 6 byte buffer for the start of OOB).

This version copes with undersized or missing data or oob buffers and uses
random read commands within the page to skip unwanted areas of data/OOB for
speed.

NOTE: Running check_bad_blocks with this layout will be reading infix
OOB locations, not manufacturer bad block markers. This means that if you
check blocks written in infix layout they will appear good, but manufacturer-
marked bad blocks may also appear good.
If you want to scan for manufactuer-marked bad blocks, you need to enable
raw_access before running check_bad_blocks, or use the non-infix layout.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
CC: David Brownell <dbrownell@users.sourceforge.net>
2010-05-18 09:25:03 +02:00
Jon Povey
fafed75d98 NAND: catch read errors when building BBT
nand_build_bbt() was ignoring the return value from nand_read_page() and
blindly continuing.
It now passes the return value up to the caller if the read fails.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
2010-05-18 09:23:48 +02:00
Spencer Oliver
3ecc191b36 gdbserver: gdb cmds returning failure on success
The gdb_memory_map cmd for example fell through and returned
ERROR_COMMAND_SYNTAX_ERROR on success - behaviour is now as expected.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-17 10:17:58 +01:00
Jon Povey
5fd1c2db9a Change kb/s to KiB/s in messages about kibibytes
Change download rate messages about kibibytes from "kb/s" to "KiB/s" units.
See: http://en.wikipedia.org/wiki/Data_rate_units

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
2010-05-16 13:55:01 +02:00
Antonio Borneo
76b81682ee NOR/CFI: minor code cleanup
Remove few LOG_DEBUG() messages, together with code and
variables required to build such messages.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
602685e66f NOR/CFI: add cfi_read() implementation
Final step to force bus_width size during CFI flash
read.

Added CFI specific implementation cfi_read() that uses
only accesses at bus_width size.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
bc8be110ff NOR: add read() callback to struct flash_driver
Final target is to force bus_width size during CFI flash
read.
In this first step I need to replace default flash read
with flash specific implementation.
This patch introduces:
- flash_driver_read() layer;
- default_flash_read(), backward compatible;
- read() callback in struct flash_driver;
- proper initialization in every flash_driver instance.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
24ebfffff5 NOR/TCL: fix typo in error message
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
feb95fbb7b NOR: fix comment for Doxygen
Either bus_width and chip_width are in bytes.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
ebdd3a1670 NOR/CFI: remove use of cfi_add_byte()
Remove the function cfi_add_byte() and rewrite the only
instance of it.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
34f70956ed NOR/CFI: use bus_width for memory access in cfi_write()
During cfi_write(), head and tail of destination area
could be not aligned to bus_width.
Since write operation must be at bus_width size, source
buffer size is extended and buffer padded with current
values read from flash.

Force using bus_width to read current value from flash.
Do not use cfi_add_byte() anymore, to allow removing this
function later on.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
a69cbf0f74 NOR/CFI: use bus_width for memory access on flash ID.
NOR flash structure requires each access to be bus_width wide.
Fix read of flash ID accordingly to rule above.
Add case (chip_width == 4), allowed by CFI spec and coherent
with current value of CFI_MAX_CHIP_WIDTH but currently not
used by any target.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
61bb0d3d23 NOR/CFI: identify memory accesses not using "bus_width".
Since NOR flash devices does not handle "byte enable lanes",
each read/write access involves the whole "chip_width".
When multiple devices are in parallel, usually all chips are
enabled during each access.
All such cases are compatible with flash accesses at
"bus_width" size.

Access at "bus_width" size is mandatory for write access to
avoid transferring of garbage values to flash.
During read access the flash controller should take care,
and discard unneeded bytes. Anyway, it is good practice to
use "bus_width" size also for read.

Every memory access that does not respect "bus_width" size
is marked with a "FIXME" comment.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
89747f81f2 NOR/CFI: simplify bufferwsize computation
Review and simplify computation of bufferwsize.
Add comments about variables' meaning.

The same code is present 3 times in the file.
Current patch updates all the 3 instances.

Step 1)
  Replace "switch(bank->chip_width) {...}".
  Illegal values of bank->chip_width are already dropped.
  For legal values, the code is equivalent to:
        bufferwsize = buffersize / bank->chip_width;

Step 2)
  The above code replacement plus the following line:
        bufferwsize /= (bank->bus_width / bank->chip_width);
  is merged in a single formula:
        bufferwsize = (buffersize / bank->chip_width) /
                (bank->bus_width / bank->chip_width);
  and simplified as:
        bufferwsize = buffersize / bank->bus_width;

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Antonio Borneo
c7b269ace1 NOR/CFI: check "flash bank" command arguments
Arguments chip_width and bus_width of command "flash bank" are
not fully checked.
While bus_width is later on redundantly checked in several other
parts (e.g. in cfi_command_val()) and generates run-time error,
chip_width is never checked, nor related to actual bus_width
value.
Added check to avoid:
- (chip_width == 0), that would mean no memory chip at all,
  avoiding also division by zero e.g. in cfi_get_u8();
- (bus_width == 0), that would mean no bus at all;
- unsupported cases of chip_width or bus_width value not power
  of 2;
- unsupported case of chip width wider than bus.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-05-16 13:39:47 +02:00
Jun Ma
b8c54b362b comments on doc/manual/primer/jtag.txt
1. fix some errors in jtag.txt(in my personal opinion, please review).
2. remove a broken link

Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-15 10:07:55 +02:00
Jun Ma
9597dcefaa missing pointer's declaration when enable macro -D_DEBUG_GDB_IO_.
reproducable when "./configure --enable-maintainer-mode CFLAGS=-D_DEBUG_GDB_IO_"

Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-14 15:08:29 +02:00
Jon Povey
dcca0b7694 NAND: fix first and last handling in nand_build_bbt
Last block was being skipped, fix by changing the loop test from "<" to "<="

First block argument was ignored, always started from block 0 (and counted
the wrong blocks as bad if first was nonzero). Now we use it.

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-14 13:23:01 +02:00
Jon Povey
0eb7fb59a0 NAND: fix off-by-one error in erase command argument range
The last_block argument to nand_erase() is checked against nand->num_blocks,
but the highest valid block number is (total - 1), the test for invalid should
be ">=" rather than ">".

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-14 13:22:59 +02:00
Spencer Oliver
215a5f7442 scripts: update flash bank names
As the flash bank name is now unique update the scripts to suit.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:08 +01:00
Spencer Oliver
a7fb60dc7b flash: require unique flash bank name
Make sure the flash bank name is unique

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:07 +01:00
Spencer Oliver
7b36d2a229 flash: add flash bank name support
flash cmds can now be passed either the bank name or the bank number.
For example.
flash info stm32.flash
flash info 0

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:07 +01:00
Øyvind Harboe
7b76da57f4 zy1000.cfg: gdb connect will fail first time without gdb-attach
gdb-attach does a reset init to make sure that the CFI probe
will succeed upon first gdb connect.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-12 13:45:04 +02:00
Jun Ma
b05f8171c9 fix instruction refilling bug when using software breakpoints on a big-endian arm926ej-s system
Signed-off-by: Jun Ma <sync.jma@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-12 13:37:33 +02:00
Karl Kurbjun
6f03e92959 Fujitsu MBM29SL800TE flash support
Hi,

This is my first post to the list.  First, I would like to thank
everyone for their work on OpenOCD, it is a great tool to work with.  I
have been using it to debug code on hardware for the Rockbox project
(www.rockbox.org).

The target that I primarily work with has a Spansion/Fujitsu NOR flash
(MBM29SL800TE).  I attached a patch that adds support for this flash.  I
hope it can be included in the main repository.  If there is something
that needs to be changed with the patch before inclusion please let me
know.

-Karl Kurbjun
2010-05-11 20:10:08 +02:00
Marc Pignat
4e022886d6 Documentation: consistency in GDB command name
Always use the complete name of the GDB command, not an abbreviation.
2010-05-11 20:01:18 +02:00
Marc Pignat
4cf13101e5 Documentation : arm920t implements armv4
There is a small typo in the cpu list, arm920t is armv4.
2010-05-11 20:01:18 +02:00
Spencer Oliver
3650981de7 mips32: 20 second timeout/megabyte for CRC check
There was a fixed 20 second timeout which is too little
for large, slow timeout checks.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-10 15:39:56 +01:00
Spencer Oliver
2ae192699f armv7m: 20 second timeout/megabyte for CRC check
There was a fixed 20 second timeout which is too little
for large, slow timeout checks.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-10 15:39:46 +01:00
Spencer Oliver
bbc8f4e6ce cfi: add Numonyx M29W128G reset workaround
The ST/Numonix M29W128G has an issue when a 0xff cmd is sent,
it cause an internal undefined state. The workaround according
to the Numonyx is to send another 0xf0 reset cmd

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-10 15:39:29 +01:00
Spencer Oliver
cf811d8e6b cfg: add stm32eval board configs
Increase working area for stm3210e_eval.cfg.
Add new configs for the following boards:
STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-07 14:24:13 +01:00
Spencer Oliver
f32492c74f server: incorrectly display socket port number
c->sin.sin_port does not contain a valid port number so just use
service->port as this is always correct.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-06 22:51:20 +01:00
Øyvind Harboe
737c9b6258 flash: stop caching protection state
There are a million reasons why cached protection state might
be stale: power cycling of target, reset, code executing on
the target, etc.

The "flash protect_check" command is now gone. This is *always*
executed when running a "flash info".

As a bonus for more a more robust approach, lots of code could
be deleted.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:25 +02:00
Øyvind Harboe
f7e0f3c285 flash: erase_address now has an unlock option
Quite useful to be able to unlock the flash, just like in
the flash write_image cmd.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:25 +02:00
Øyvind Harboe
3077f5845f cfi: fix error handling for protect fn
No error was propagated.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Øyvind Harboe
2fba796e27 zy1000: fix tcl command to read power dropout status
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Øyvind Harboe
82ea640830 gdb: connect will now fail if flash autoprobe fails
This stops GDB from launching with an empty memory map,
making gdb load w/flashing fail for no obvious reason.

The error message points in the direction of the gdb-attach
event that can be set up to issue a halt or "reset init"
which will put GDB in a well defined stated upon attach
and thus have a robust flash autoprobe.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Øyvind Harboe
812e21ac39 zy1000: fix keep_alive() bug
introduced in latest commit. Should have held off merging
that commit. Sigh....

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Matthias Bode
31b050108a Fixed bug in tcl-server
No segmentationfault when sending commands to tcl-server.

	modified:   src/server/server.c
	modified:   src/server/tcl_server.c
	modified:   src/server/tcl_server.h
2010-05-05 15:24:24 +02:00
Øyvind Harboe
91b9f3de0b command context: fix errors when running certain commands on startup
Various commands, e.g. "arm mcr xxxx" would fail if invoked upon startup
since it there was no command context defined for the jim interpreter
in that case.

A Jim interpreter is now associated with a command context(telnet,
gdb server's) or the default global command context.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Øyvind Harboe
7e33f87b3d flash: more flash write_image bugfixes
Remove/fix lots of bugs in handling of non-contigious sections
and out of order sections.

Fix a gaffe introduced in previous commit to src/flash/nor/core.c

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Øyvind Harboe
0d8f60e28f str7x: improve error handling
clean up error handling a bit. No change in behavior.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 15:24:24 +02:00
Marc Pignat
ca0f6a5c58 documentation typo
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 11:10:12 +02:00
Øyvind Harboe
80660288e0 docs: now builds again
Fix gaffe committed last time.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-05 09:21:58 +02:00
Spencer Oliver
909130e16e str71x: fix previous commit
fix build issue with 70226c221f commit

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-04 15:51:43 +01:00
Øyvind Harboe
282e89c878 flash: less bogus errors
Removed bogus errors when trying to allocate a large
a target memory buffer as possible.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-04 09:11:21 +02:00
Øyvind Harboe
70226c221f str7x: fix bogus error messages
Remove bogus error messages when trying to allocate a
large chunk of target memory and then falling back to
a smaller one.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-04 09:11:21 +02:00
Øyvind Harboe
8865209545 target: clean up target memory allocation error messages
target memory allocation can be implemented not to show
bogus error messages.

E.g. when trying a big allocation first and then a
smaller one if that fails.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-04 09:11:20 +02:00
Øyvind Harboe
32e647acf4 zy1000: wait for srst to deassert
make wait for srst deassert more long latency friendly
(JTAG over TCP/IP), print actual time if it was more than
1ms.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-04 09:11:15 +02:00
Øyvind Harboe
fe60480b7a cfi: made som info output debug output
E.g. how much target memory that is used during flashing
is debug info.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-04 07:40:46 +02:00
Tobias Ringström
14f4606dcb STM32 flash erase timeout fix
The current timeout for STM32 flash block erase and flash mass erase is
10 (ms), which is too tight, and fails around 50% of the time for me.
The data sheet for STM32F107VC specifies a maximum erase time of 40 ms
(for both operations).

I'd also consider it a bug that the code does not detect a timeout, but
just assumes that the operation has completed.  The attached patch does
not address this bug.

The attached patch increases the timeouts from 10 to 100 ms.  Please apply.

/Tobias
2010-05-03 11:55:08 +02:00
Øyvind Harboe
da9f72ca0a zy1000: it has a CFI chip, no need for the ecosflash driver
The ecosflash driver is no longer used by any of the config
scripts. It is more useful to get more testing of CFI.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-30 02:51:05 +02:00
Øyvind Harboe
5e79f999bc flash: write_image would fail for certain images
Fix a bug where write_image would fail if the sections
in the image were not in ascending order. This has previously
been fixed in gdb load.

Solved by sorting the image sections before running flash
write_image erase unlock foo.elf.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-29 18:39:48 +02:00
Øyvind Harboe
78248f1df6 flash: write_image will now pad erase to nearest sector
this is done for unlocking and it is a simple omission that
it wasn't done for sectors.

The unnerving thing is that nobody has complained about this
until now....

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-29 03:54:43 +02:00
Øyvind Harboe
49b7905cae nor: remove bogus output about padding sections
padding of 0 bytes is actually no padding, do not output
warning about padding in that case.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-28 08:01:28 +02:00
Marek Vasut
56a21c9cb1 Add Voipac PXA270 module support
This patch adds support for the Voipac PXA270 module. Including NOR flash.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-04-26 07:08:55 +02:00
Marek Vasut
e0285dbe73 Add VPACLink interface definition
This patch adds definition file for the Voipac VPACLink JTAG adaptor. The
adaptor is combined JTAG/UART device.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-04-26 07:08:52 +02:00
Mike Dunn
4f1296d151 xscale: add support for length arg to wp command
This patch adds support for the length argument to the xscale implementation of
the wp command.  Per discussion with David, the length argument specifies the
range of addresses over which a memory access should generate a debug exception.
This patch utilizes the "mask" feature of the xscale debug hardware to implement
the correct functionality of the length argument.  Some limitations imposed by
the hardware are:

   - The length must be a power of two, with a minumum of 4.
   - Two data breakpoint registers are available, allowing for two watchpoints.
     However, if the length of a watchpoint is greater than four, both registers
     are used (the second for a mask value), limiting the number of watchpoints
     to one.

This patch also removes a useless call to xscale_get_reg(dbcon) in
xscale_set_watchpoint() (value had already been read from the register cache,
and the same previously read value is then modified and written back).

I have been using and testing this patch for a couple days.

Questions, corrections, criticisms of course gratefully received.
2010-04-24 16:54:36 +02:00
michal smulski
c6cd253ae1 telo: update configuration scripts to matched master branch
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-24 16:51:34 +02:00
michal smulski
48e282aa00 adapter: allow adjusting srst assert with
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-24 16:51:14 +02:00
michal smulski
cc5f3c85de docs: improve load_image docs
add docs for missing args.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-20 22:18:04 +02:00
Øyvind Harboe
e4056cca2d doc: gdb-attach can fix gdb connect issues
Flash probing must succeed for e.g. gdb load and automatic
hardware/software breakpoints to work.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-20 09:05:07 +02:00
Andreas Fritiofson
ddf7aabc67 stm32x: allow flash probe on a running target
If the flash has not yet been probed and GDB connects while the target is
running, the flash probe triggered by GDB's memory map read will fail. In
that case the returned memory map will be empty, causing a subsequent load
from within GDB to fail. There's not much you can do from GDB to recover,
other than a restart; a 'mon reset init' and manual 'mon flash probe' won't
help since GDB has already made up its mind about the memory map.

It seems there's no reason to require the target to be halted when probing
the flash. Remove the check to let a valid memory map be provided to GDB
even when connecting to a running target.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2010-04-20 08:55:48 +02:00
David Brownell
620310bcc6 NOR/core bugfix: restore invariants
The The patch labeled "CFI CORE: bug-fix protect single sector" was merged
rged without some requested bugfixes.  Most significantly it broke invariants
in the code, invalidating descriptions and changing the calling convention
for underlying drivers.  (It (Also wasn't CFI-specific...)

Fix that, and Include an update from Antonio Borneo for the degenerate
"nothing to do" case, (although that's still in the  wrong location.  which
is presumably why that is it was working in some cases but not all.)

 src/flash/nor/core.c |   21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-04-15 19:48:55 -07:00
Antonio Borneo
b886049c74 NOR/CFI: remove redundant code
Arguments for "flash bank" command are already
parsed and put in "bank" struct.
Removed code to parse them again.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-15 19:19:54 +02:00
Antonio Borneo
c9e58238c3 NOR/CFI: fix order of arguments check
Syntax of "flash bank" command requires:
- chip_width as CMD_ARGV[3]
- bus_width  as CMD_ARGV[4]
Actual code swaps the arguments.
Bug has no run time impact since wrong variables
are only used to check value and both are checked
against same constraint.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-15 19:19:46 +02:00
Mike Dunn
ee13916411 xscale: fix analyze_trace for trace data collected in wrap mode
This patch fixes the xscale_analyze_trace() function.  This function was
defective for a trace collected in 'fill' mode (hiccups with repeated
instructions) and completely broken when buffer overflowed in 'wrap' mode.  The
reason for the latter case is that the checkpoint registers were interpreted
incorrectly when two checkpoints are present in the trace (which will be true in
'wrap' mode once the buffer fills).  In this case, checkpoint1 register will
contain the older entry, and checkpoint0 the newer.  The original code assumed
the opposite.  I eventually gave up trying to understand all the logic of the
function, and rewrote it.  I think it's much cleaner and understandable now.  I
have been using and testing this for a few weeks now.  I'm confident it hasn't
regressed in any way.

Also added capability to handle (as best as possible) the case where an
instruction can not be read from the loaded trace image; e.g., partial image.
This was a 'TODO' comment in the original xscale_analyze_trace().

Outside of xcsale_analyze_trace(), these (related) changes were made:

- Remove pc_ok and current_pc elements from struct xscale_trace.  These elements
  and associated logic are useless clutter because the very first entry placed
  in the trace buffer is always an indirect jump to the address at which
  execution resumed.  This type of trace entry includes the literal address in
  the trace buffer, so the initial address of the trace is immediately
  determined from the trace buffer contents and does not need to be recorded
  when trace is enabled.

- Added num_checkpoints to struct xscale_trace_data, which is necessary in order
  to correctly interpret the checkpoint register contents.

- In xscale_read_trace()
  - Fix potential array out-of-bounds condition.
  - Eliminate partial address entries when parsing trace (can occur in wrap mode).
  - Count and record number of checkpoints in trace.

- Added small, inlined utility function xscale_display_instruction() to help
  make the code more concise and clear.

TODO:
 - Save processor state (arm or thumb) in struct xscale_trace when trace is
   enabled so that trace can be analyzed correctly (currently assumes arm mode).
 - Add element to struct xscale_trace that records (when trace is enabled)
   whether vector table is relocated high (to 0xffff0000) or not, so that a
   branch to an exception vector is traced correctly (curently assumes vectors
   at 0x0).
2010-04-15 19:17:31 +02:00
Antonio Borneo
d31bbc33fa TCL SCRIPTS: fix command name
Some tcl script has underline between the words "flash bank"
resulting in 'invalid command name "flash_bank"'.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-15 19:10:36 +02:00
Anton Fedotov
decad30865 cortex-a8: more MMU support
+ virt2phys() can now convert virtual address to real
+ read_memory() and write_memory() are renamed to read_phys_memory()
and write_phys_memory()
+ new read_memory() and write_memory() try to resolve real address if
mmu is enambled than perform real address reading/writing
   + if address is bellow 0xc000000 than TTB0 is used for page table
dereference, if above - than TTB1. Linux style of user/kernel address
separation
   + if above fails (i.e address is unspecified) than mode is checked
whether it is Supervisor (than TTB1) or User (than TTB0)
- Software breakpoints doesn't work. You should invoke
"gdb_breakpoint_override hard" before you start debugging
+ cortex_a8_mmu(), cortex_a8_enable_mmu_caches(),
cortex_a8_disable_mmu_caches() are implemented

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-14 07:36:08 +02:00
Antonio Borneo
a8a9eddca0 TARGET/ARM7_9_COMMON: review scope of symbols
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-11 01:31:42 +08:00
Antonio Borneo
41cb911853 NOR/TMS470: review scope of symbols
Add "static" qualifier to private functions and data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-11 01:19:41 +08:00
Antonio Borneo
f549dadb85 TARGET/MIPS32: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-11 01:16:14 +08:00
Antonio Borneo
689fa8ad8c TARGET/MIPS32_PRACC: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-11 01:11:11 +08:00
Antonio Borneo
da741a51f2 TARGET/MIPS32_DMAACC: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-11 01:03:53 +08:00
Antonio Borneo
f1be0e6af2 HELPER/LOG: review unused symbols
Remove unused functions:
- log_catch
- log_rethrow
- log_try

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 22:25:22 +08:00
Antonio Borneo
2ea78551ab TARGET/MIPS_EJTAG: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 22:20:41 +08:00
Antonio Borneo
4809dbb2d7 NOR/CFI: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 22:14:34 +08:00
Antonio Borneo
11fd673f0c TARGET/DSP563XX_ONCE: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 22:12:20 +08:00
Antonio Borneo
b2495c0101 OPENOCD: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 22:04:03 +08:00
Antonio Borneo
787a5067fb JTAG/COMMANDS: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 22:01:16 +08:00
Antonio Borneo
fdb9199001 BINARYBUFFER: review scope of data and functions
Add "static" qualifier to private data and functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 21:54:37 +08:00
Antonio Borneo
d7246f452f NOR/STR7X: review scope of data
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 21:52:33 +08:00
Antonio Borneo
c936cb334b NAND/TCL: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 21:50:15 +08:00
Antonio Borneo
5926b5a94f MFLASH: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 20:11:40 +08:00
Antonio Borneo
a6307fed91 NAND/ARM_IO: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 20:09:59 +08:00
Antonio Borneo
617811ac66 NAND/CORE: review scope of functions
Add "static" qualifier to private functions.
Move function's comment from core.h to core.c.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 20:08:41 +08:00
Antonio Borneo
aaf848596c NAND/MX3: review scope of data
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 20:03:19 +08:00
Antonio Borneo
9acd453d9f NOR/ADUC702X: review scope of data
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 19:58:15 +08:00
Antonio Borneo
069f88cfac NOR/AVRF: review scope of data
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 19:56:24 +08:00
Antonio Borneo
300f0f53c5 NOR/CORE: review scope of data
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 19:54:22 +08:00
Antonio Borneo
402d3292bb NOR/DRIVERS: review scope of functions
Add "static" qualifier to private functions.
Remove unused "extern" in src/ecosboard.c

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 19:38:15 +08:00
Antonio Borneo
61c0635991 STR9XPEC: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 19:29:51 +08:00
Antonio Borneo
0c82bea44a TCL: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 19:28:13 +08:00
Antonio Borneo
c0b5ca6d17 TIME_SUPPORT: review unused symbols
Remove unused functions:
- timeval_add

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 19:25:32 +08:00
Antonio Borneo
b2468e3c4f HELLO: review unused symbols
Remove unused functions:
- hello_register_commands

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 17:23:06 +08:00
Antonio Borneo
4678108034 PLD: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 17:06:16 +08:00
Antonio Borneo
ec1c90e3cd ADI_V5_JTAG: review scope of data
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 17:03:02 +08:00
Antonio Borneo
8ffdefcc59 ARM920T: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 17:01:06 +08:00
Antonio Borneo
de27d28df9 ARM_JTAG: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 16:59:50 +08:00
Antonio Borneo
8a871560f9 ARM_SIMULATOR: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 16:57:49 +08:00
Antonio Borneo
4a1bd5b806 ARMV4_5_MMU: review unused symbols
Remove unused data:
- armv4_5_mmu_page_type_names
Remove prototype of not existing function:
- armv4mmu_translate_va

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 16:46:59 +08:00
Antonio Borneo
0f3bbcf096 ARMV4_5: review scope of data
Add "static" qualifier to private data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 16:46:01 +08:00
Antonio Borneo
263b4b9057 EMBEDDEDICE: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 16:44:54 +08:00
Antonio Borneo
3f0b17e48a TARGET: review unused symbols
Remove unused functions:
- target_all_handle_event

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 00:25:35 +08:00
Antonio Borneo
321aa6aa8f TARGET: review scope of functions
Add "static" qualifier to private functions.
Remove unused "extern" in src/ecosboard.c

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 00:22:46 +08:00
Antonio Borneo
81fab96c0d ARMv7M: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-10 00:07:40 +08:00
David Brownell
2a17fd9f9b Restore deleted '!' character
I'm not sure what caused this significant character to get deleted.
it may be related to intermittent Editor or terminal flakes  I've
been seeing lately (sigh).  This fix is trivial.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-04-04 01:29:24 -07:00
David Brownell
876bf9bf4c target: are we running algorithm code?
Fixing one bug can easily uncover another  .... in this case,
making sure that we properly invalidate some cached NOR state when
resuming arbitrary target code turned up an issue when the code
wasn't quite arbitrary (and we couldn't know that, but some parts
of OpenOCD assumed the cache would not be invalidated.

Specifically:  some flash drivers (like CFI) update that state in loops
with downloaded algorithms, thus invalidating the state as it's probed.

 + Add a new target state flag, to record whether the target is
  running downloaded algorithm code.

 + Use that flag to add a special case:  "trust" downloaded algorithms
   not to corrupt that cached state, bypassing cache invalidation.

Also update some of the documentation to stipulate that this flavor of
trustworthiness is now *required* ... not just a fortuitous acident.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-04-04 00:42:05 -07:00
David Brownell
88fcb5a9ef simplify and unconfuse target_run_algorithm()
For some reason there are *two* schemes for interposing logic into
the run_algorithm() code path...  One is a standard procedural wapper
around the target method invocation.

the other (superfluous) one hacked the method table by splicing
a second procedural wrapper into the method table.  Remove it:

	* Rename its  slightly-more-featureful wrapper so it becomes
	  the standard procedural wrapper, leaving its added logic
	  (where it should have been in the first place.

          Also add a paranoia check, to report targets that don't
	  support algorithms without traversing a NULL pointer, and
	  tweak its code structure a bit so it's easier to modify.

	* Get rid of the superfluous/conusing method table hacks.

This is a net simplification, making it simpler to analyse what's
going on, and then interpose logic . ... by ensuring there's only one
natural place for it to live.

------------

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-04-04 00:38:39 -07:00
David Brownell
d37a10da52 buildfix
Without this, a system using gcc (GCC) 4.2.4 (Ubuntu 4.2.4-1ubuntu4)
aborts builds after reporting:

tcl.c: In function ‘handle_irscan_command’:
tcl.c:1168: warning: passing argument 1 of ‘buf_set_u32’ discards qualifiers from pointer target type

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-04-03 18:36:07 -07:00
Mike Dunn
33e5dd1272 xscale: fix trace buffer functionality when resuming from a breakpoint
Problem: halt at a breakpoint, enable trace buffer ('xscale trace_buffer enable
fill'), then resume.  Wait for debug exception when trace buffer fills (if not
sooner due to another breakpoint, vector catch, etc).  Instead, never halts.
When halted explicitly from OpenOCD and trace buffer dumped, it contains only
one entry; a branch to the address of the original breakpoint.  If the above
steps are repeated, except that the breakpoint is removed before resuming, the
trace buffer fills and the debug exception is generated, as expected.

Cause: related to how a breakpoint is stepped over on resume.  The breakpoint is
temporarily removed, and a hardware breakpoint is set on the next instruction
that will execute.  xscale_debug_entry() is called when that breakpoint hits.
This function checks if the trace buffer is enabled, and if so reads the trace
buffer from the target and then disables the trace (unless multiple trace
buffers are specified by the user when trace is enabled).  Thus you only trace
one instruction before it is disabled.

Solution: kind of a hack on top of a hack, but it's simple.  Anything better
would involve some refactoring.  This has been tested and trace now works as
intended, except that the very first instruction is not part of the trace when
resuming from a breakpoint.

TODO: still many issues with trace: doesn't work during single-stepping (trace
buffer is flushed each step), 'xscale analyze_trace' works only marginally for
a trace captured in 'fill' mode, and not at all for a trace captured in 'wrap'
mode.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-29 20:24:02 +02:00
David Brownell
d60ebc0ab5 jtag/tcl.c cleanup -- split out "adapter.c"
Clean up the jtag/tcl.c file, which was one of the biggest and
messiest ones in that directory.  Do it by splitting out all the
generic adapter commands to a separate "adapter.c" file (leaving
the "tcl.c" file holding only JTAG utilities).

Also rename the little-used "jtag interface" to "adapter_name", which
should have been at least re-categorized earlier (it's not jtag-only).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-27 10:07:13 -07:00
Antonio Borneo
a092e8d237 NOR TCL: fix usage message
The command "flash bank" has updated syntax.
Add the mandatory parameter <target> to the usage message
that prints in case of error.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-26 09:14:56 +01:00
Antonio Borneo
27b98c2fa5 TCL scripts: update to current "flash bank" syntax
While "flash bank" syntax has been changed long ago,
several tcl script are still not fully update.

Fix following cases related with "cfi" driver:
- syntax error: the mandatory <name> parameter is missing
- warning: the <target> parameter is a number, instead of
  the target name
- the comment line above the command does not report
  actual syntax

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-26 08:42:58 +01:00
Øyvind Harboe
ed81249129 zy1000: dev tool
first cut peek/poke over tcp/ip, used for debug/research
purposes only. Long term JTAG over TCP/IP might be an
offshoot. The performance is usable for development/testing
purposes.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-25 20:46:34 +01:00
Øyvind Harboe
ed6756fb23 target: fix poll off
I don't know when "poll off" broke, but "poll off" didn't
stop background polling of target. The polling status flag
simply wasn't checked in the handle_target timer callback.

All target polling(including power/reset state) is now stopped
upon "poll off".

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-25 20:46:34 +01:00
Daniel Bäder
010492a1ed change %x and %d to PRIx32 and PRId32 where needed for cygwin 2010-03-25 12:45:32 +01:00
Øyvind Harboe
e736468b0e zy1000: allow it to build on linux host for testing purposes
For testing and checking the build this can be useful,
it doesn't have any practical application outside development.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-25 09:50:37 +01:00
Antonio Borneo
4af724df23 telnet_server: review unused symbols
Remove unused function

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-25 07:44:59 +01:00
Antonio Borneo
ec28c674af telnet_server: review scope of functions
Add "static" qualifier to private functions.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-25 07:44:55 +01:00
David Brownell
d7dba8d346 FT2232 Messaaging fix
The init cleanup patch overlooked a message which was
wrongly specific to the "usbjtag" layout.  Fix.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-24 16:04:26 -07:00
Antonio Borneo
1cda3e64e4 server: review unused symbols
Remove unused function

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-24 07:44:28 +01:00
Antonio Borneo
9f1d9499ce server: review scope of functions and data
Add "static" qualifier to private functions and data.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-24 07:44:18 +01:00
Øyvind Harboe
721502f1d3 zy1000: fix optimisaion bug in dcc writes
Introduced & corrected since 0.4.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-22 08:28:19 +01:00
Mike Dunn
4be9eded7f fix software breakpoints on xscale
This patch fixes xscale software breakpoints by cleaning the dcache and
invalidating the icache after the bkpt instruction is inserted or removed.  The
icache operation is necessary in order to flush the fetch buffers, even if the
icache is disabled (see section 4.2.7 of the xscale core developer's manual).
The dcache is presumed to be enabled; no harm done if not.  The dcache is also
invalidated after cleaning in order to safeguard against a future load of
invalid data, in the event that cache_clean_address points to memory that is
valid and in use.

Also corrected a confusing typo I noticed in a comment.

TODO (or not TODO...?): the xscale's 2K "mini dcache" is not cleaned.  This
cache is not used unless the 'X' bit in the page table entry is set.  This is a
proprietary xscale extension to the ARM architecture.  If a target's OS or
executive makes use of this for memory regions holding code, the breakpoint
problem will persist.  Flushing the mini dcache requires that 2K of valid
cacheable memory (mapped with 'X' bit set) be designated by the user for this
purpose.  The debug handler that gets downloaded to the target will also need to
be extended.
2010-03-22 08:28:19 +01:00
Øyvind Harboe
ccfaed8bc7 bitq: fix warning now that out_value is const
This was an easy one. Just add the missing "const" to a
local variable definition.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-22 07:21:09 +01:00
David Brownell
c2f714bd44 ft2232 init mess cleanup
In the ft2232 driver, initialization for many layouts punts to a routine
called usbjtag_init(), instead of a routine specific to each layout.

That routine is  a mess  built around a "what type layout am I" core.
That's a bad design ... in this case, especially so, since it bypasses
the layout-specific dispatch which was just done, and obfuscates the
initialization which is at least somewhat generic, instead of being
specific to the "usbjtag" layout.

Split and document out the generic parts of usbjtag_init(), and make
the rest of those layouts have layout-specific init methods.  Also,
rename usbjtag_reset() ... that also was not specific to the "usbjtag"
layout, and thus contributed to the previous code structure confusion.

(Eventually, all layout-specific code (and method tables) should probably
live in files specific to each layout.  These changes will facilitate
those and other cleanups to this driver.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-21 22:49:23 -07:00
Øyvind Harboe
b7811b7679 arm breakpoints: amended fix comment
the handling of caches, should be moved into the breakpoint
specific callbacks rather than being plonked into generic
memory write fn's.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-21 19:21:15 +01:00
Øyvind Harboe
5dcad2d34f jtag: make out_value const
Tightens up the jtag_add_xxx_scan() API

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-21 19:13:49 +01:00
Øyvind Harboe
96949890ee jtag: move towards making out_value const
These were relatively straightforward fixes which are
backwards compatible.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-20 11:16:49 +01:00
David Brownell
3b310dbac5 FT2232 comment tweaks
Note that the FT4232 chips have four channels not two, and
Elaborate on uses of the additional channels.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-19 10:31:44 -07:00
Øyvind Harboe
7373d1c342 zy1000: clean up jtag_add_xx_scan fn's
The implementation is now more straightforward as the
scan_fields have been greatly simplified over time.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19 14:47:01 +01:00
Øyvind Harboe
03359b1680 zy1000: fix bug in end state of DCC writes
Introduced in latest commits, found by code inspection &
GCC warning.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19 14:27:19 +01:00
Øyvind Harboe
7f6bab0c4c jtag: retire jtag_get/set_end_state()
Voila! This get rids of mysteries about what what
state the TAP is in.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19 08:31:44 +01:00
Øyvind Harboe
15ff2aeca9 jtag: remove jtag_get_end_state() usage
Code inspection indicated what constant end states to
use.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19 08:31:44 +01:00
Øyvind Harboe
1911c8ec8d jtag: get rid of unecessary jtag_get_end_state()
By code inspection.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19 08:31:44 +01:00
Øyvind Harboe
7298452382 jtag: remove unecessary usage of jtag_get_end_state().
By code inspection.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19 08:31:44 +01:00
Øyvind Harboe
8ce828dd38 jtag: remove jtag_get_end_state()'s that should be unecessary
By a bit of code inspection it seems like all of these
instances of jtag_get_end_state() can be unambigously
replaced by constants.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-19 08:31:44 +01:00
Mike Dunn
8d411d0d24 Fix underlying problem with xscale icache and dcache commands
Fix problem with the xscale icache and dcache commands.  Both commands were
enabling or disabling the mmu, not the caches

I didn't look any further after my earlier patch fixed the trivial problem
with command argument parsing.  Turns out the underlying code was broken.

The resolution is straightforward when you look at the arguments to
xscale_enable_mmu_caches() and xscale_disable_mmu_caches().  I finally
took a deeper look after dumping the cp15 control register (XSCALE_CTRL)
and seeing that the cache bits weren't changing, but the mmu bit was
(which caused all manner of grief, as you can imagine).  This has been
tested and works OK now.

 src/target/xscale.c |   17 +++++++++++------
 1 files changed, 11 insertions(+), 6 deletions(-)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-18 21:34:13 -07:00
David Brownell
fc9de56a25 ADI_v5 - it's not always an "SWJ-DP"
So don't use the name "swjdp" for all DAPs; rename to
plain old "dap", which *is* always correct.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-18 12:32:35 -07:00
David Brownell
c09035ea2c Merge branch 'master' of ssh://dbrownell@openocd.git.sourceforge.net/gitroot/openocd/openocd 2010-03-18 12:11:58 -07:00
David Brownell
52a788e008 remove more duplication
Not sure how the original "move code to adi_v5_swd.c" patch left
some code in the "arm_adi_v5.c" file, but a recent patch was only
a partial fix -- it didn't remove all the duplication.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-18 11:56:17 -07:00
Øyvind Harboe
ec108ff59e jtag: retire one instance of jtag_get_end_state() usage
Less global variables....

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18 12:08:11 +01:00
Øyvind Harboe
46f92878da oops: committed and pushed two temp files....
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18 12:08:11 +01:00
Spencer Oliver
d37ed9094a DOCS: update flash bank examples
- include the $_FLASHNAME in all flash bank examples.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-18 09:36:00 +00:00
Spencer Oliver
ae1c64706a PIC32MX: add unlock cmd
'unlock' performs a full unlock/erase of the device, removing any
code protection.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-18 09:35:45 +00:00
Spencer Oliver
b48a94f05d MIPS: remove unused arg from mips_ejtag_set_instr
This arg was never used and was just taken from the arm jtag code.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-18 09:19:39 +00:00
Øyvind Harboe
36df240cea jtag: cut down on usage of unintended modification of global end state
jtag_get/set_end_state() is now deprecated.

There were lots of places in the code where the end state was
unintentionally modified.

The big Q is whether there were any places where the intention
was to modify the end state. 0.5 is a long way off, so we'll
get a fair amount of testing.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18 08:43:19 +01:00
Øyvind Harboe
fccdfc1cd7 linker error: fix problem with duplicate fn
A fn was copied instead of moved to a new file. The linker
can discard exact copies of fn's without warning.

This is a C++'ism.

However on my Ubuntu 9.10 machine, it fails.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-18 08:39:51 +01:00
Øyvind Harboe
0529431fe7 mips: fix warning
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-17 21:34:43 +01:00
Øyvind Harboe
cc197c8086 gdb: long running "monitor mww" now works w/gdb
invoke keep_alive() to make sure that the default 2000ms
timeout does not trigger.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-17 12:59:33 +01:00
Øyvind Harboe
bf71e34cbf target: faster mww operations
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-17 12:45:56 +01:00
Øyvind Harboe
099ffc754a target: mdX/mwX on target were badly broken
- incorrect parsing of arguments
- mdX didn't display arguments correctly

I don't think anyone ever used that code path :-)

Did you know that "target mdw" and mdw are very different?

for {set i 0} {$i < 256} {set i [expr $i+1]} {mwb [expr 0x2000000+$i] $i}

 mdw 0x2000000 0x10
0x02000000: 03020100 07060504 0b0a0908 0f0e0d0c 13121110 17161514 1b1a1918 1f1e1d1c
0x02000020: 23222120 27262524 2b2a2928 2f2e2d2c 33323130 37363534 3b3a3938 3f3e3d3c

> zy1000.cpu mdb 0x2000000 0x20
0x02000000 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f ................
0x02000010 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f ................
> zy1000.cpu mdh 0x2000000 0x20
0x02000000 0100 0302 0504 0706 0908 0b0a 0d0c 0f0e ................
0x02000010 1110 1312 1514 1716 1918 1b1a 1d1c 1f1e ................
0x02000020 2120 2322 2524 2726 2928 2b2a 2d2c 2f2e  !"#$%&'()*+,-./
0x02000030 3130 3332 3534 3736 3938 3b3a 3d3c 3f3e 0123456789:;<=>?
> zy1000.cpu mdw 0x2000000 0x20
0x02000000 03020100 07060504 0b0a0908 0f0e0d0c ................
0x02000010 13121110 17161514 1b1a1918 1f1e1d1c ................
0x02000020 23222120 27262524 2b2a2928 2f2e2d2c  !"#$%&'()*+,-./
0x02000030 33323130 37363534 3b3a3938 3f3e3d3c 0123456789:;<=>?
0x02000040 43424140 47464544 4b4a4948 4f4e4d4c @ABCDEFGHIJKLMNO
0x02000050 53525150 57565554 5b5a5958 5f5e5d5c PQRSTUVWXYZ[\]^_
0x02000060 63626160 67666564 6b6a6968 6f6e6d6c `abcdefghijklmno
0x02000070 73727170 77767574 7b7a7978 7f7e7d7c pqrstuvwxyz{|}~.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-17 12:45:24 +01:00
Spencer Oliver
3ad171cd53 SCRIPT: add add_script_search_dir cmd
Add a add_script_search_dir cmd so that adding search
dir's can be added to cfg scripts.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-17 09:57:44 +00:00
Spencer Oliver
e7e9bfde47 PIC32: add software reset support
The PIC32MX does not support the ejtag software reset - it is
optional in the ejtag spec.

We perform the equivalent using the microchip specific MTAP cmd's.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-17 09:01:47 +00:00
Spencer Oliver
79ca05b106 MIPS: remove ejtag_srst variant
The mips_m4k_assert_reset has now been restructured
so the variant ejtag_srst is not required anymore.
The ejtag software reset will be used if the target does not
have srst connected.

Remove ejtag_srst from docs.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-17 09:01:45 +00:00
Øyvind Harboe
051e2c99ab gdb_server: improved gdb load performance
by ack'ing memory writes immediately and reporting either
at next memory write or stepi/continue time. GDB will then
send off a new packet that is ready by the time the previous
packet has been written to target memory.

On faster adapters this can be as much as 10% improvement.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-17 07:40:00 +01:00
Øyvind Harboe
7e447043cd zy1000: tweak the DCC inner loop a tiny bit
Uses FIFO a bit more efficiently now.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-17 07:40:00 +01:00
Øyvind Harboe
1d9fba8c14 arm7/9: remove unused post_restore_context
Unused. If something should happen after context restore, then the
calling code can just do it afterwards.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-17 07:40:00 +01:00
David Brownell
6f8b8593d6 ADIv5 transport support moves to separate files
Unclutter arm_adi_v5.c by moving most transport-specific code
to a transport-specific files adi_v5_{jtag,swd}.c ... it's not
a full cleanup, because of some issues which need to be addressed
as part of SWD support (along with implementing the DAP operations
on top of SWD transport):

 - The mess where mem_ap_read_buf_u32() is currently coded to
   know about JTAG scan chains, and thus needs rewriting before
   it will work with SWD;

 - Initialization is still JTAG-specific

Also  move JTAG_{DP,ACK}_* constants from adi_v5.h to the JTAG
file; no other code should care about those values.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-16 14:12:00 -07:00
Øyvind Harboe
030ee192dd bitbang: add jtag_add_tms_seq support
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-16 21:44:38 +01:00
Spencer Oliver
679f6602fd PARPORT: add PARPORTADDR tcl variable
Add PARPORTADDR tcl variable making it easier to
change parallel port address in scripts.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-16 10:10:21 +00:00
Spencer Oliver
82f44a4708 PIC32: add Microchip Explorer16 cfg
- add Microchip Explorer16 cfg using PIC32MX360F512L PIM.
 - remove reset config from PIC32 target cfg.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-16 10:10:20 +00:00
richard vegh
ab5f98edcd lpc3180: LPC3180(LPC3250) SLC driver implemented
Until this time only basic  SLC functionality exists when you want to use SLC to access external nand flash.
Basic functionality can be selected with command:
     lpc3180 select 0 slc
It is anyway very slow to write/read to/from nand flash.

With the new command, SLC speed improved about 20 times, and hardware ECC info also read/written from/to nand flash OOB area:
     lpc3180 select 0 slc bulk
Speed improvement achieved by using working are in SRAM of the LPC3250 chip and controlling DMA controller to interact between SRAM and SLC peripheral.

Here are the patches, and if they are ok than take them.
Tested with hitex LPC3250 usb stick.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-16 10:46:41 +01:00
Bradey Honsinger
f85ad1e52a image loading: fix problem with offsets > 0x80000000
Fixes bug that prevented users from specifying a base address of
0x80000000 or higher in image commands (flash write_image, etm image,
xscale trace_image).

image.base_address is an offset from the start address contained in
the image file (if there is one), or from 0 (for binary files). As a
signed 32-bit int, it couldn't be greater than 0x7fffffff, which is a
problem when trying to write a binary file to flash above that
address. Changing it to a 64-bit long long keeps it as a signed
offset, but allows it to cover the entire 32-bit address space.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-16 10:11:40 +01:00
David Brownell
a540033a71 move "reset_config" out of JTAG command group
The SRST configuration options are not specific to JTAG, so this
command may be needed with non-JTAG debug sessions.  Just move
the command to a different group.

(The TRST options are, however, clearly JTAG-specific, but for
compatibility, they're now left alone.  The flags they control
could later be disabled in non-JTAG sessions.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:43:16 -07:00
David Brownell
1bd3ae3986 rename jtag_nsrst_assert_width as adapter_nsrst_assert_width
Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width",
and move it out of the "jtag" command group ...  it needs to be used with
non-JTAG transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:42:26 -07:00
David Brownell
b559b273b5 rename jtag_nsrst_delay as adapter_nsrst_delay
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ...  it needs to be used with non-JTAG
transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:41:30 -07:00
David Brownell
96f9790279 rename jtag_khz as adapter_khz
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
command group ...  it needs to be used with non-JTAG transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.  (We may want to
update it to include a nag message too.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:37:43 -07:00
Spencer Oliver
4b964a81ca FT2232: bulidfix
Fix build issue with commit c23d4596d2

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-15 10:06:47 +00:00
Spencer Oliver
de761e350b PIC32MX: update cfg script
The default config script will now dynamically setup the BMX registers
in the reset init script.
This will also work if the user overrides the default working area.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-15 09:38:46 +00:00
David Brownell
c25fda2c95 rename jtag_interface_{init,quit}()
These routines apply to non-JTAG debug adapters too.  To
reduce confusion, give them better (non-misleading) names.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-14 13:13:39 -07:00
David Brownell
c23d4596d2 FT2232: lookup and save layout just once
Streamline use of the layout:  have the "ft2232_layout" command
look it up and save the result, instead of having a few different
chunks of code looking it up later, and saving just its name (which
is already part of the layout).  This

   - is cleaner
   - reports errors sooner
   - facilitates earlier adapter-specific setup
   - removes unused "default to "usbjtag" logic

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-14 13:10:26 -07:00
Mike Dunn
763013f15e fix xscale icache and dcache commands
Simple patch that fixes the broken xscale icache and dcache commands.
This broke when the helper functions and macros were changed.

[ dbrownell@users.sourceforge.net: don't use strcasecmp ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-11 16:53:05 -08:00
David Brownell
03a26d31e9 versaloon cleanup patch
Remove undesirable
 - backslashes at end-of-line;
 - initializations of BSS data to zero/NULL;
 - overlong lines (80+ characters)
 - whitespace issues
 - brackets around single-line statements

And other minor issues reported by the Linux "checkpatch" utility

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-11 14:21:36 -08:00
simon qian
db464f3cd4 New JTAG driver for Versaloon
This patch greatly simplifies the Versaloon driver:

 - reducing the code size from more than 50K to less than 28K
 - adding support for IR/DR scan with unlimited size
 - using tap_get_tms_path and tap_get_tms_path_len.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-11 14:11:30 -08:00
Michal Demin
24e1e3dd26 Add support for Bus Pirate as a JTAG adapter.
This includes a driver and matching config file.  This support needs to be
enabled through the initial "configure" (use "--enable-buspirate").

Signed-off-by: Michal Demin <michaldemin@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-11 11:35:50 -08:00
David Brownell
591e0bbab9 split "interface" commands from "jtag" ones
We'll need to be able to work with debug adapter interfaces (drivers)
even when they're not used for JTAG ... for example, while there are
multi-transport drivers which support JTAG *and* several other
transports (or just one more, like SWD) there are also adapters
with more limited goals (and no JTAG support at all).

Start decoupling the two concepts ("debug adapter driver", "jtag")
by having two command groups, which initialize separately.

This will help us support OpenOCD sessions using only non-JTAG
transports, in which JTAG commands should not be registered.
Update docs to mention that the JTAG, SVF, and XSVF commands
won't work without a JTAG transport.

Note that at least commands working with SRST are still inappropriately
coupled  to JTAG ... inappropriate because (a) SRST is not part of the
JTAG standard, for all that many platforms (like ARM) expect it; and also
(b) because they're used with non-JTAG debug and programming interfaces,
too.  They should perhaps become generic "interface" operations at some
point.  (Similarly with the clock rate to be used by a given adapter.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-11 09:47:47 -08:00
Spencer Oliver
edf52a6cc5 MIPS: make fixed code arrays static const
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 22:23:01 +00:00
Spencer Oliver
6030a5cb2a JLINK: user info message cleanup
- remove trailing LF's from user info messages.
 - split long lines.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 21:54:21 +00:00
Spencer Oliver
257a764582 PIC32: add flash algorithm support
Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
 - without fastload: 60secs
 - with fastload: 45secs
 - with fastload and algorithm: 2secs.

Add new devices to supported list.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 21:03:22 +00:00
Spencer Oliver
f10ed95a5c STM32: flash loader cleanup
- make algorithm array static const.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 20:32:18 +00:00
Spencer Oliver
d0a57c0f0c STR7: flash loader cleanup
- make algorithm array static const.
 - increase algorithm buffer size to 32k.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 20:32:06 +00:00
Spencer Oliver
6344f2ab98 STR9: flash loader cleanup
- make algorithm array static const.
 - increase algorithm buffer size to 32k.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 20:31:59 +00:00
Spencer Oliver
2946c895a1 ADUC702x: flash loader cleanup
- make algorithm array static const.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 20:31:53 +00:00
Antonio Borneo
17d437a7a1 CFI CORE: bug-fix protect single sector
Cannot protect or unprotect single sector in cfi flash.
When first==last the procedure fails.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-09 22:54:40 +01:00
David Brownell
c986cc200c move a constant table to .rodata section
The table of command registration functions shouldn't be
in writable memory, where stray pointers can clobber it.
Also, it shouldn't be initialized at runtime; that just
consumes needless code space.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-08 19:10:05 -08:00
Antonio Borneo
fc1063a1b9 cfi: simplify and clearify code
At the end I have added comments /* FIXME: to be removed */
There are 3 lines in which my simplification is not complete due to
data dependency with LOG_DEBUG() messages visible in the patch.
Such log_debug has been introduced on Jan 22, 2007 with commit
4fc97d3f27 during development activity
in this file/procedure.

From my point of view, these logs can be removed, since not part of a
consistent flow of information.
Alternatively, could be borrowed in the new cfi_send_command(), but
this will increase verbosity.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-08 18:31:27 +01:00
Øyvind Harboe
7a5c9c2f4a zy1000: embedded ice dcc tweak
How many bits to shift out before/after enabled tap not
in bypass is calculated outside the loop. This is more of
a demonstration of principle and to clarify code than
a performance optimisation as such. Follows up a bit
on the simplification work in jtag interface.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-08 08:37:13 +01:00
Øyvind Harboe
50dc56a488 jtag: simplify jtag_add_plain_ir/dr_scan
These fn's now clearly just clock out/in bits. No mystical
fields are involved.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-08 08:12:26 +01:00
Øyvind Harboe
57d7743639 jtag: jtag_add_ir_scan() now takes a single field
In the code a single field was all that was ever used. Makes
jtag_add_ir_scan() simpler and leaves more complicated stuff
to jtag_add_plain_ir_scan().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-08 08:12:25 +01:00
Øyvind Harboe
e018c7c1d2 jtag: retire tap field
jtag_add_dr/ir_scan() now takes the tap as the first
argument, rather than for each of the fields passed
in.

The code never exercised the path where there was
more than one tap being scanned, who knows if it even
worked.

This simplifies the implementation and reduces clutter
in the calling code.

use jtag_add_ir/dr_plain_scan() for more fancy situations.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-08 08:12:25 +01:00
Antonio Borneo
f7d1be714b CFI: review print of Voltage values
JEDEC standard reports Vpp integer part encoded as 4 bit HEX value.
To print it using decimal digits, %u is required.
Other voltage values are coded as BCD, so %x is appropriate.

Code already prints one nibble at a time, so no need for field width
and precision in format string.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-06 09:53:21 +01:00
David Brownell
c6e323b983 doc: not all debug adapters are "dongles"
Talk more about "debug adapters" instead of only "dongles".  Not all
adapters are discrete widgets; some are integrated onto boards.  If
we only talk about "dongles" we rule out many valid setups, and help
confuse some users (who may be using Dongle-free environments).

Also start bringing out the point that JTAG isn't the only transport
protocol, even though OpenOCD historically presumes "all is JTAG".
(Not all debug adapters are JTAG adapters, or JTAG-only adapters.)

Plus a few minor fixes (spelling etc) in the vicinity of those changes,
and updates about FT2232H clocking issues (they can go faster than the
older chips, and can support adaptive clocking).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-05 21:09:03 -08:00
David Brownell
74113cf725 README: update libftdi version
The FT2232H really wants libftdi 0.17 or newer; some notable
bugs got fixed in that version.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-05 19:00:08 -08:00
David Brownell
d33a81c549 ADIv5 share DAP command support
Get rid of needless and undesirable code duplication for
all the DAP commands (resolving a FIXME) ... there's no
need for coreas to have private copies of that stuff.
Stick a pointer to the DAP in "struct arm", letting common
code get to it.

Also rename the "swjdp_info" symbol; just call it "dap".

This is an overall code shrink.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-05 10:39:25 -08:00
Øyvind Harboe
57ebf6d3de minidriver: fix arm11 compilation problem
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-05 10:38:44 +01:00
David Brownell
45a528ff3c rename "swjdp_common" as "adiv5_dap"
This partially corrects an inappropriate name choice (and its
associated FIXME).

There are still too many variables named "swjdp", bug little
current code actually relies on them referencing an SWJ-DP instead
of some other flavor of DAP.  Only the two new dap_to{swd,jtag}()
calls could behave differently on an SWJ-DP instead of a SW-DP or
a JTAG-DP.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-04 21:51:58 -08:00
David Brownell
5e78ddcea0 NOR: trim range in flash_driver_protect()
When the beginning or end of the specified range of sectors
already has the requested protection status, don't ask the
flash driver to change those sectors.

This will among other things turn command sequences like
this into the NOPs one would expect:

	flash protect_check 0
	flash info 0
		... reports everything as unprotected ...
	flash protect 0 0 1 off

That speeds things up (by whatever work was just avoided).

Also, with Stellaris (which can't unprotect flash at  page level)
this can eliminate some undesirable/false error reports.  (And
finishes fixing a bug currently listed in our bug database...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-03 21:01:16 -08:00
David Brownell
5fdf9535ce NOR: invalidate cached state on target resume
The NOR infrastructure caches some per-sector state, but
it's not used much ... because the cache is not trustworthy.

This patch addresses one part of that problem, by ensuring
that state cached by NOR drivers gets invalidated once we
resume the target -- since targets may then modify sectors.

Now if we see sector protection or erase status marked as
anything other than "unknown", we should be able to rely
on that as being accurate.  (That is ... if we assume the
drivers initialize and update this state correctly.)

Another part of that problem is that the cached state isn't
much used (being unreliable, it would have been unsafe).
Those issues can be addressed in later patches.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-03 20:57:49 -08:00
David Brownell
99939c3c75 NOR: stellaris message tweaks
Give a more accurate failure message when trying to unprotect; don't
complain about pages being write protected, just say that unprotect is
not supported by the hardware ... referencing the new "recover" command,
which is the way to achieve that.

Likewise, when trying to protect, talk about "pages" (matching hardware
doc) not "sectors" (an concept that's alien to these chips).

Also make the helptext for the "recover" command mention that it
also erases the device.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-03 13:08:16 -08:00
Spencer Oliver
2119c0a764 STM32: Add Value Line Flash Programming Support
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-03 10:20:37 +00:00
David Brownell
381ce4308c ADIv5: use new DAP ops for AP read/write
Make ADIv5 internals use the two new transport-neutral calls for reading
and writing DP registers; and do the same for external callers.  Also,
bugfix some of their call sites to handle the fault returns, instead of
ignoring them.

Remove most of the JTAG-specific calls, using their code as the bodies
of the JTAG-specific implementation for the new methods.

NOTE that there's a remaining issue:  mem_ap_read_buf_u32() makes calls
which are JTAG-specific.  A later patch will need to remove those, so
JTAG-specific operations can be removed from this file, and so that SWD
support will be able to properly drop in as just a transport layer to the
ADIv5 infrastructure.  (The way read results are posted may need some more
attention in the transport-neutrality interface.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 22:49:36 -08:00
David Brownell
61ee632dbc ADIv5: use new DAP ops for DP read/write
Make ADIv5 internals use the two new transport-neutral calls for reading
and writing DP registers.  Also,  bugfix some of their call sites to
handle the fault returns, instead of ignoring them.

Remove the old JTAG-specific calls, using their code as the bodies
of the JTAG-specific implementation for the new methods.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 22:46:38 -08:00
David Brownell
24b1426a72 ADIv5: use new dap_run() operation
Make ADIv5 use one of the new transport-neutral interfaces: call
dap_run(), not jtagdp_transaction_endcheck().

Also, make that old interface private; and bugfix some of its call
sites to handle the fault returns, instead of ignoring them.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 22:42:45 -08:00
David Brownell
db6c994642 ARM: start abstracting ADIv5 transports (JTAG/SWD)
To support both JTAG and SWD, ADIv5 needs DAP operations which are
transport-neutral, instead being of JTAG-specific.  This patch:

 - Defines such a transport-neutral interface, abstracting access
   to DP and AP registers through a conceptual queue of operations.

 - Builds the first implementation of such a transport with the existing
   JTAG-specific code.

In contrast to the current JTAG-only interface, the interface adds
support for two previously-missing (and unused) DAP operations:

 - aborting the current AP transaction (untested);
 - reading the IDCODE register (tested) ... required for SWD init.

The choice of transports may be fixed at the chip, board, or JTAG/SWD
adapter level.  Or if all the relevant hardware supports both transport
options, the choice may be made at runtime, This patch provides basic
infrastructure to support whichever choice is made.

The current "JTAG-only" transport choice policy will necessarily continue
for now, until SWD support becomes available in OpenOCD.  Later patches
start phasing out JTAG-specific calls in favor of transport-neutral calls.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 22:41:59 -08:00
David Brownell
d72e90ae4b target_resume() doxygen
Add doxygen for target_resume() ... referencing the still-unresolved
confusion about what the "debug_execution" parameter means (not all
CPU support code acts the same).

The 'handle_breakpoints" param seems to have resolved the main issue
with its semantics, but it wasn't part of the function spec before.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 15:45:12 -08:00
David Brownell
53b3d4dd53 LPC1768 updates, IAR board support
Fix some issues with the generic LPC1768 config file:

 - Handle the post-reset clock config:  4 MHz internal RC, no PLL.
   This affects flash and JTAG clocking.

 - Remove JTAG adapter config; they don't all support trst_and_srst

 - Remove the rest of the bogus "reset-init" event handler.

 - Allow explicit CCLK configuration, instead of assuming 12 MHz;
   some boards will use 100 Mhz (or the post-reset 4 MHz).

 - Simplify: rely on defaults for endianness and IR-Capture value

 - Update some comments too

Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.

Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes.  Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 15:02:01 -08:00
David Brownell
5b31186578 ADIv5: use right ID for Cortex-M3 ETM
Correct a mistake made copying the ID of the Cortex-M3 ETM module
from the TRM, so that "dap info" on a CM3 with an ETM will now
correctly describe ROM table entries for such modules.  (They are
included on LPC17xx and some other cores.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 09:39:36 -08:00
David Brownell
cb72b7a270 arm_semihosting buildfix
The recent "add armv7m semihosting support" patch introduced two
build errors:

arm_semihosting.c: In function ‘do_semihosting’:
arm_semihosting.c:71: error: ‘spsr’ may be used uninitialized in this function
arm_semihosting.c:71: error: ‘lr’ may be used uninitialized in this function

This fixes those build errors.  The behavior is, however, untested.
(Also, note the two new REVISIT comments.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-01 10:39:57 -08:00
Øyvind Harboe
b1c00e5a4e zy1000: faster jtag_add_ir_scan()
Faster and simpler.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-01 15:41:49 +01:00
Øyvind Harboe
27401e4c80 zy1000: arm11 load is now faster
290kBytes/s @ 8MHz, no need to inline jtag_tap_next_enabled().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-01 15:27:12 +01:00
Øyvind Harboe
afbf927663 zy1000: add jtag_add_tms_seq support
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-01 13:36:03 +01:00
Øyvind Harboe
761d4555b8 jtag: the post TAP state is now passed to the drivers
after clocking out a tms sequence, then the TAP will be
in some state. This state is now handed to the drivers.

TAP_INVALID is a possible state after a TMS sequence if
switching to SWD.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-03-01 08:30:29 +01:00
Spencer Oliver
409e23e39b armv4_5: remove core_type check in mcr/mrc cmd
core_type check is not required as the core function will be
null for cores that do not support the mcr/mrc functions.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 23:06:49 +00:00
Spencer Oliver
57fc63f9f1 cm3-ftest: change to use arm disassemble
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:52:06 +00:00
Spencer Oliver
c9560ba190 stellaris: recover_command use usleep rather than sleep
windows api does not define a posix sleep, use usleep that
has an openocd wrapper to the win32 native function.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:48:57 +00:00
Spencer Oliver
73c1cff7c2 FT2232: add missing enum when using ftd2xx library
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:48:51 +00:00
Spencer Oliver
8d13a46626 semihosting: add armv7m semihosting support
do_semihosting and arm_semihosting now check the core type and
use the generic arm structure.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:48:44 +00:00
Spencer Oliver
9d6ede25dd semihosting: move semihosting cmd to arm cmd group
Move semihosting cmd to the arm cmd group.

Targets that support semihosting will setup the
setup_semihosting callback function.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:48:37 +00:00
Spencer Oliver
550abe7396 CortexM3: move disassemble cmd to arm cmd group
Rather than using a Cortex disassemble cmd, we now use
the arm generic version.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:48:19 +00:00
Spencer Oliver
4c9f29bd9c ARMv7M: add arm cmd group
- Add arm cmd group to armv7m cmd chain.
 - arm cmd's now check the core type before running a cmd.
 - todo: add support for armv7m registers for reg cmd.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:47:51 +00:00
Spencer Oliver
b8d8953ae9 MIPS: add mips algorithm support
- add mips support for target algorithms.
 - added handlers for target_checksum_memory and target_blank_check_memory.
 - clean up long lines

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:26:53 +00:00
Spencer Oliver
a851ce0d6f ARMv7M: use software breakpoints for algorithms
- armv7m_run_algorithm now requires all algorithms to use
   a software breakpoint at their exit address
 - updated all algorithms to support this

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-28 22:26:52 +00:00
Mariano Alvira
0324eb2496 Add board/redbee-usb.cfg
The Redbee USB is a small form-factor usb stick from Redwire, LLC
(www.redwirellc.com/store), built around a Freescale MC13224V
ARM7TDMI + 802.15.4 radio (plus antenna).

It includes an FT2232H for debugging, with Channel B connected to the
mc13224v's JTAG interface (unusual) and Channel A connected to UART1.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-28 10:33:46 -08:00
Mariano Alvira
63763345d9 add board/redbee-econotag.cfg and JTAG support
The Redbee Econotag is an open hardware development kit from
Redwire, LLC (www.redwirellc.com/store), for the Freescale
MC13224V ARM7TDMI + 802.15.4 radio.

It includes both an MC13224V and an FT2232H (for JTAG and UART
support).  It has flexible power supply options.

Additional features are:

  - inverted-F pcb antenna
  - 36 GPIO brought out to 0.1" pin header
    (includes all peripheral pins)
  - Reset button
  - Two push buttons (on kbi1-5 and kbi0-4)
  - USB-A connector, powered from USB
  - up to 16V external input
  - pads for optional buck inductor
  - pads for optional 32.768kHz crystal
  - 2x LEDS on TX_ON and RX_ON

[ dbrownell@users.sourceforge.net: shrink lines; texi ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27 22:52:34 -08:00
Mariano Alvira
e4a40d257d Add target/mc13224v.cfg
The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for
Zigbee and similar low-power wireless applications. Using PIP
(Platform In Package) technology, it integrates: an RF balun and
matching network; a buck converter (only an external inductor is
necessary); 96KB of SRAM; and 128KB of non-volatile memory.

It has an integrated bootloader and can boot from a variety of sources:
external SPI or I2C non-volatile memory, an image loaded over UART1,
or the internal non-volatile memory. The image loaded from one of these
sources is executed directly from SRAM starting at location 0x00400000.

Open source development code at http://mc1322x.devl.org

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27 22:51:41 -08:00
David Brownell
e70d42a727 new "stellaris recover" command
Stellaris chips have a procedure for restoring the chip to
what's effectively the "as-manufactured" state, with all the
non-volatile memory erased.  That includes all flash memory,
plus things like the flash protection bits and various control
words which can for example disable debugger access.  clearly,
this can be useful during development.

Luminary/TI provides an MS-Windows utility to perform this
procedure along with its Stellaris developer kits.  Now OpenOCD
users will no longer need to use that MS-Windows utility.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27 00:31:35 -08:00
David Brownell
3ef9beb52c ADIv5 DAP ops switching to JTAG or SWD modes
Define two new DAP operations which use the new jtag_add_tms_seq()
calls to put the DAP's transport into either SWD or JTAG mode, when
the hardware allows.

Tested with the Stellaris 'Recovering a "Locked" Device' procedure,
which loops five times over both of these.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27 00:31:35 -08:00
David Brownell
8c9b52e8b6 ft2232: implement TMS sequence command
Implement the new TMS_SEQ command on FT2232 hardware.
Also, swap a bogus exit() call with a clean failure return.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27 00:12:38 -08:00
David Brownell
a3245bd7cd interface: define TMS sequence command
For support of SWD we need to be able to clock out special bit
sequences over TMS or SWDIO.  Create this as a generic operation,
not yet called by anything, which is split as usual into:

 - upper level abstraction ... here, jtag_add_tms_seq();
 - midlayer implementation logic hooking that to the lowlevel code;
 - lowlevel minidriver operation ... here, interface_add_tms_seq();
 - message type for request queue, here JTAG_TMS.

This is done slightly differently than other operations: there's a flag
saying whether the interface driver supports this request.  (In fact a
flag *word* so upper layers can learn about other capabilities too ...
for example, supporting SWD operations.)

That approach (flag) lets this method *eventually* be used to eliminate
pathmove() and statemove() support from most adapter drivers, by moving
all that logic into the mid-layer and increasing uniformity between the
various drivers.  (Which will in turn reduce subtle bugginess.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-27 00:12:38 -08:00
Mariano Alvira
4a64820f23 ft2232: add a mechanism to specify channel in layout structs
FT2232-family chips have two or more MPSSE modules.   FTDI documentation
calls these channels.  JTAG adapter drivers thus need to be able to choose
which channel to use.  (For example, one channel may connect to a board's
microcontroller, while another connects to a CPLD.)

Since each channel has its own USB interface, libftdi (somewhat confusingly)
identifies channels using INTERFACE_* symbols.  Most boards use INTERFACE_A
for JTAG, which is the default in OpenOCD.  But some wire up a different one.

Note that there are two facets of what makes a wiring "layout":

 - The mapping between debug signals map and channel signals ... embedded
   in C functions.

 - Label used in Tcl configuration scripts ... part of the "layout" structure.

By letting the channel be part of the layout struct, we permit sharing the C
functions between Tcl-visible layouts, when those signal mappings are reused.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-25 00:01:55 -08:00
David Brownell
79010bf3df ARM ADIv5 doxygen and cleanup
Add doxygen for mem_ap_read_buf_u{8,16,32}() calls,
and shrink a few overlong lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-24 23:46:46 -08:00
Hans Peter Mortensn
7abe9f38b2 AVR flash: handle AT90CAN128 chips
I have successfully programmed the AT90CAN128, based on the mega128  
with some small modifications.

[ dbrownell@users.sourceforge.net: patch cleanup ]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-24 23:35:12 -08:00
David Brownell
75067c4042 ARM ADIv5: rename more JTAG-specific routines
Highlight more of the internal JTAG-specific utilities, so it's
easier to identify code needing changes to become transport-neutral.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-23 23:36:42 -08:00
Øyvind Harboe
faef631a4d arm11: improve performance using minidriver hook
zy1000 performance for GDB load went from 100kBytes/s
to 300kBytes/s @ 8 MHz by implementing the inner loop
of unack arm11 memory writes directly on top of the hw
fifo.

Profiling info:

 78.57      0.77     0.77                             arm11_run_instr_data_to_core_noack_inner
  5.10      0.82     0.05                             memcpy
  4.08      0.86     0.04                             jtag_tap_next_enabled
  3.06      0.89     0.03                             gdb_input

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-22 10:15:51 +01:00
Øyvind Harboe
1f5883ea56 arm11: allow minidrivers to implement inner loop of memory writes
This allows minidrivers to e.g. hardware accelerate memory
writes.

Same trick as is used for arm7/9 dcc writes.

Added error propagation for memory transfer failures in
code rearrangement.

Also the JTAG end state is not updated until after
the memory write run is complete.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-22 10:15:51 +01:00
Øyvind Harboe
90efc404f3 zy1000: jtag_add_dr_scan() performance improvement
Reduce overhead in jtag_add_dr_scan() a bit.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-22 08:00:10 +01:00
David Brownell
c21c740a89 ft2232 table init cleanup
Use labeled initializers in the table of layouts instead of
positional ones.  This ls cleaner and less error prone, plus
it simplifies patches which add members to these structure.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 17:19:08 -08:00
David Brownell
dc342f45f6 Developer's Guide: refresh release procedures
Be a closer match to what I've actually done for the past few cycles.

In particular, hold off pushing repository updates until after the
packages are published, as part of opening the merge window, and
mention the utility commands which actually create the archives.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 16:55:17 -08:00
David Brownell
c8ea748dc2 ADIv5: relocate memacess_tck cycles
When using an AP to access a memory (or a memory-mapped register),
some extra TCK (assuming JTAG) cycles should be added to ensure
the AP has enugh time to complete that access before trying to
collect the response.

The previous code was adding these cycles *before* trying to
access (read or write) data to that address, not *after*.  Fix
by putting the delays in the right location.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:58:16 -08:00
David Brownell
3b68a708c2 ADIv5: remove ATOMIC/COMPOSITE interface mode
This removes context-sensitivity from the programming interface and makes
it possible to know what a block of code does without needing to know the
previous history (specifically, the DAP's "trans_mode" setting).

The mode was only set to ATOMIC briefly after DAP initialization, making
this patch be primarily cleanup; almost everything depends on COMPOSITE.
The transactions which shouldn't have been queued were already properly
flushing the queue.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:56:56 -08:00
David Brownell
ecff73043c ARM: ADIv5, deadcode cleanup
I have no idea what the scan_inout_check() was *expecting* to achieve by
issuing a read of the DP_RDBUFF register.  But in any case, that code was
clearly never being called ("invalue" always NULL) ... so remove it, and
the associated comment.

Also rename it as ap_write_check(), facilitating a cleanup of its single
call site by removing constant parameters.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:54:54 -08:00
David Brownell
39cfe62796 ARM: ADIv5 code shrinkage, cleanup
adi_jtag_dp_scan_u32() now wraps adi_jtag_dp_scan(), removing
code duplication.  Include doxygen for the former.  Comment
some particularly relevant points.  Minor fault handling fixes
for both routines:  don't register a callback that can't run,
or return ERROR_OK after an error.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:53:15 -08:00
David Brownell
a97bb67543 ADIv5 clean up AP fault handling
Pass up fault codes from various routines, so their callers
can clean up after failures, and remove the FIXME comments
highlighting those previously goofy code paths.

 dap_ap_{read,write}_reg_u32()
 dap_ap_write_reg()
 mem_ap_{read,write}_u32()
 mem_ap_{read,write}_atomic_u32()
 dap_setup_accessport()

Make dap_ap_write_reg_u32() just wrap dap_ap_write_reg(),
instead of cloning its core code (and broken fault handling).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:51:19 -08:00
David Brownell
249263d29d ADIv5 clean up AP selection and register caching
Handling of AP (and AP register bank) selection, and cached AP
registers, is pretty loose ... start tightening it:

 - It's "AP bank" select support ... there are no DP banks.  Rename.
   + dap_dp_bankselect() becomes dap_ap_bankselect()
   + "dp_select_value" struct field becomes "ap_bank_value"

 - Remove duplicate AP cache init paths ... only use dap_ap_select(),
 and don't make Cortex (A8 or M3) cores roll their own code.

 - For dap_ap_bankselect(), pass up any fault code from writing
 the SELECT register.  (Nothing yet checks those codes.)

 - Add various bits of Doxygen

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:48:04 -08:00
David Brownell
1aac72d243 ARM: keep a handle to the PC
Keep a handle to the PC in "struct arm", and use it.
This register is used a fair amount, so this is a net
minor code shrink (other than some line length fixes),
but mostly it's to make things more readable.

For XScale, fix a dodgy sequence while stepping.  It
was initializing a variable to a non-NULL value, then
updating it to handle the step-over-active-breakpoint
case, and then later testing for non-NULL to see if
it should reverse that step-over-active logic.  It
should have done like ARM7/ARM9 does: init to NULL.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:34:33 -08:00
David Brownell
a299371a9e ARM DPM: support adding/removing HW breakpoints
Generalize the core of watchpoint setup so that it can handle
breakpoints too.  Create breakpoint add/remove routines which
will use that, and hook them up to target types which don't
provide their own breakpoint support (nothing, yet).

This suffices for hardware-only breakpoint support.  The ARM11
code will be able to switch over to this without much trouble,
since it doesn't yet handle software breakpoints.  Switching
Cortex-A8 will be a bit more involved.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:32:34 -08:00
David Brownell
27c068c1f8 ARM11: per-core options should not be global
Address some FIXME comments by getting rid of globals, moving
per-core parameters in the existing per-core data structure.

This will matter most whenever there are multiple ARM11 cores,
e.g. ARM11 MPcore chips, but in general is just cleanup.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:30:27 -08:00
David Brownell
ce1feaa732 ARMv7-M: start using "struct arm"
This sets up a few of the core "struct arm" data structures so they
can be used with ARMv7-M cores.  Specifically, it:

 - defines new ARM core_modes to match the microcontroller modes
   (e.g. HANDLER not IRQ, and two types of thread mode);

 - Establishes a new microcontroller "core_type", which can be
   used to make sure v7-M (and v6-M) cores are handled right;

 - adds "struct arm" to "struct armv7m" and arranges for the
   target_to_armv7m() converter to use it;

 - sets up the arm.core_cache and arm.cpsr values

 - makes the Cortex-M3 code maintain arm.map and arm.core_mode.

This is currently set up as a parallel data structure, primarily to
minimize special cases for the semihosting support with microcontroller
profile cores.

Later patches can rip out the duplicative ARMv7-M support and start
reusing core ARM code.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 14:28:53 -08:00
David Brownell
b853b9dbc0 Open the merge window for the 0.5.0 release cycle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 13:27:37 -08:00
David Brownell
56e74908d1 Label builds as OpenOCD v0.4.0
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 12:20:13 -08:00
David Brownell
4aa0a4d811 User's Guide mentions OS-specific installation
Specifically the Linux issue of needing "udev" rules, and MS-Windows
needing driver configuration.

Also, update the existing udev note to use the correct name of that
rules file in the source tree.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-21 09:29:24 -08:00
David Brownell
bb4cb7935e arm920t line length cleanup
The recent patch to fixbreakpoints and dcache handling added
a bunch of overlong lines (80+ chars) ... shrink them, and do
the same to a few lines which were already overlong.

Also add a few FIXME comments to nudge (a) replacement of some
magic numbers with opcode macros, which will be much better at
showing what's actually going on, and (b) correct return codes.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-20 20:47:38 -08:00
David Brownell
57d5673dea CSB337 board cleanup (quasi-regression)
Get rid of new nasty warning:

NOTE! Severe performance degradation without fast memory access enabled...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-20 20:47:38 -08:00
David Brownell
d2a2c14d20 FreeBSD buildfix
Fix an unused variable warning seen when building the parport driver
under FreeBSD.

Using information from Xiaofan Chen <xiaofanc@gmail.com>

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-20 11:11:43 -08:00
Marc Pignat
3f30563c88 atm920t : fix breakpoints and data cache handling
Breakpoints did not work because the data cache was not flushed
properly.

As a bonus add capability to write to memory marked as read only
by the MMU, which allows software breakpoints in such memory
regions.
2010-02-19 08:18:12 +01:00
David Brownell
aa8db989b9 ARM920T scanchain 15 comments/cleanup
For folk who don't know the ARM920 JTAG interface very well, the
two modes of scan chain 15 access to CP15 are confusing.

Make those parts of the ARM920 code less opaque, by:

 - Adding comments referencing the relevant parts of the TRM,
   catching up to similar updates in the User's Guide.

 - Replacing magic numbers in physical access clients with
   symbolic equivalents.

No functional change.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-16 18:50:16 -08:00
Øyvind Harboe
fa1cfc2d4d gpl: fix GPL startup message
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-15 22:59:41 +01:00
David Brownell
5869992314 LPC1768.cfg -- partial fixes for bogus reset-init handler
Cortex-M targets don't support ARM instructions.

Leave the NVIC.VTOR setup alone, but comment how the whole
routine looks like one big bug...

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-15 13:39:16 -08:00
Mathias Kuester
52d4ba3467 fix crash with DSP563XX
When a DSP563xx-aware GDB asks OpenOCD for target registers,
the result should be a GDB with register data ... not an
OpenOCD crash.

(Note that mainline GDB doesn't currently support this core,
so for now, this requires a GDB with FreeScale patches.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-14 12:59:10 -08:00
David Brownell
a2ce3a51df NEWS: mention removal of obsolete commands
Removed remaining support for various commands, like advice for
migrating old-style TAP declarations.

The documentation no longer describes them either ... so if users have
been delaying config updates, they may need to consult older releases.

ALL this stuff has been clearly marked as "do not use" for at least a
year now, so anyone still using it hasn't been holding up their end.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-13 20:14:49 -08:00
David Brownell
4c4ec09110 Restore "-dev" version suffix (0.4.0-rc2-dev)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-13 15:28:05 -08:00
David Brownell
a0a1be5cd6 v4.0-rc2 milestone
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-13 14:47:17 -08:00
Spencer Oliver
f7a6e62776 STR9xpec: issue warning when unlocking device
Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-12 10:49:18 +00:00
Spencer Oliver
747a607aef STM32x: issue warning when unlocking device (bug #16)
Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-12 10:49:11 +00:00
Øyvind Harboe
d4d4b11a77 arm720t: virt2phys callback added
This is a copy and paste of arm926ejs. Not tested, but
ready for testing at least. There is a good chance that
it will work if the generic armv4_5 fn's are robust enough...

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-12 08:39:56 +01:00
Marc Pignat
ff404da155 arm920: add virt2phys fn
Copy of the 926ejs function. I have tested it only using
my rtems application (where virtual address mapping == physical).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-12 08:31:06 +01:00
Viktar Palstsiuk
32188c5004 target library: configuration files for openocd tested with Atmel SAM-ICE V6 JTAG.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-11 21:10:51 +01:00
David Brownell
527e073bba User's Guide: "#" in filesystems names is bad
Sometimes MS-Windows users try to use filesystem names which include
the "#" character.  That's generally unwise, since it begins Tcl
comments.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-10 16:42:37 -08:00
Øyvind Harboe
65cc81ddb6 arm11: fix another infinite loop bug
reset init would get stuck in an infinite loop when
e.g. khz was too high. Added timeout. This is a copy
of paste of a number of such bugfixes in the arm11
code.

Arm11 code reviewed for further such infinite loop bugs
and I couldn't find any more. Xing fingers it's the last
one...

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-10 22:54:06 +01:00
David Brownell
84ac6bb0d9 User's Guide: clarify jtag_rclk advice
Not all cores and boards support adaptive clocking, so qualify
all advice to use it to depend on core and board support.

It's primarily ARM cores which support this; and many of the
newer ones (like Cortex-M series) don't.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-10 11:27:48 -08:00
Øyvind Harboe
c646b76797 target: add todo in target_write_memory() about alignment
target_write_buffer() does not align "buffer" in host
memory passed to target_write_memory().

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-09 21:57:23 +01:00
Spencer Oliver
f899c2aa97 str730.cfg: fix incorrect mem regions
- update str73x mem regions to correct values.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-09 14:49:47 +00:00
David Brownell
885a2f5b96 Re-title Developer's Guide
The Doxygen output was previously titled "OpenOCD Reference Manual",
which was quite misleading ... the User's Guide is the reference
manual which folk should consult about how to use the software.

Just rename it to match how it's been discussed previously, and to
bring out its intended audience:  developers of this software.  As a
rule, Doxygen is only for folk who work with the code it documents.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-06 19:19:25 -08:00
David Brownell
6f262b69f4 ADIv5: doxygen
Provide doxygen for many of the public ADIv5 interfaces (i.e. the ones
called from Cortex core support code).

Add FIXMEs (and a TODO) to help resolve implementation issues which
became more apparent when trying to document this code:

 - Error-prone context-sensitivity (queued/nonqueued) in many procedures.

 - Procedures that lie by ignoring errors and wrongly claiming success.

Also, there was no point in a return from dap_ap_select(); it can't fail,
and no caller checks its return status.  Clean that up, make it void.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-06 19:16:21 -08:00
Øyvind Harboe
41d0901115 zy1000: complete zy1000_uart to jim command switch
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-05 14:38:26 +01:00
David Brownell
ff5deeeeaa ARMv7-M: make DAP commands verify target is an ARMv7-M
Init the ARMv7-M magic number.  Define predicate verifying it.
Use it to resolve a lurking bug/FIXME:  make sure the ARMv7-M
specific DAP ops reject non-ARMv7-M targets.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-04 14:39:51 -08:00
David Brownell
3ea9e62189 Documentation: mention bug database
Have the User's Guide and BUG handling notes both reference
the fact that we now have a bug database at SourceForge.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-04 11:10:15 -08:00
David Brownell
e380930478 JLink: reference protocol documentation
Segger publishes some documentation on this protocol;
reference it, so future maintainers can know it exists.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-04 10:50:24 -08:00
Spencer Oliver
709f08f17a CMD: duplicate cmd error msg
When registering cmds we report duplicate attempts to register a cmd
as a LOG_ERROR.
Some situations need this, such as when registering dual flash banks.
http://www.mail-archive.com/openocd-development@lists.berlios.de/msg11152.html

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-04 10:33:33 +00:00
Ethan Eade
8b049fdba5 scripts: Phytec/LPC2350 config scripts
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-04 10:25:44 +01:00
Spencer Oliver
95ed9c4393 JTAG: fix bug when no interface connected
- fix coredump when OpenOCD is started without a jtag interface connected.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-02-03 13:09:24 +00:00
Harald Kipp
18969466c9 AT91R40008/Ethernut 3 configuration
Moved board specific settings from target/at91r40008.cfg to a new
file board/ethernut3.cfg.

Set correct CPUTAPID.  Reset delay increased, see MIC2775 data sheet.
Increased work area size from 16k to 128k.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-02 11:09:53 -08:00
David Brownell
5750e899e0 NOR: User's Guide updates
Remove long-obsolete text about "erase_check" affecting "flash info" output.
Move parts of that text to "protect_check", where it's still relevant; and
update the "flash info" description to mention the issue.

(This is still awkward.  It might be best to make "protect_check" mirror
"erase_check" by dumping what it finds, so "flash info" doesn't dump any
potentially-stale cache info.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-02 10:53:13 -08:00
Edgar Grimberg
cc440ca1d4 tcl/str7x: Reset init unlocks the flash
For STR7x flash, the device cannot be queried for the protect status.
The solution is to remove the protection on reset init. The driver
also initialises the sector protect field to unprotected.

[dbrownell@users.sourceforge.net: line length shrinkage]

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-02 09:30:33 -08:00
Edgar Grimberg
503f6139c7 flash/str7x: After reset init the flash is unlocked
The default state of the STR7 flash after a reset init is unlocked.
The information in the flash driver now reflects this.

The information about the lock status cannot be read from the
flash chip, so the user is informed that flash info might not
contain accurate information.

[dbrownell@users.sourceforge.net: line length shrinkage]

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-02 09:30:33 -08:00
Nicolas Pitre
3d2d5dcc9c ARM semihosting: fix EOF handling with SYS_READ
The semihosting interface has a strange convention for read/write where
the unused amount of buffer must be returned.  We failed to return the
total buffer size when the local read() call returned 0.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
2010-02-02 00:05:42 -05:00
Edgar Grimberg
bef37ceba2 Test cases ran on v0.4.0-rc1
Test cases ran on v0.4.0-rc1 for a number of targets:
AT91FR40162
LPC2148
SAM7
STR710
STR912

The goal of the testing session was to prove basic functionality of OpenOCD for different targets.

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
2010-02-01 15:44:06 +01:00
Øyvind Harboe
91e3268737 gdb: restore behavior from 0.3.1 for srst_asserted and power_restore
srst_asserted and power_restore can now be overriden to do
nothing. By default they will "reset init" the targets and
halt gdb.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-02-01 13:45:09 +01:00
David Brownell
82f2492138 ADIv5: more messaging cleanup, docs
When the TAR cache was explicitly invalidated, don't bother
printing it; the actual hardware status is more informative.

Provide some doxygen for the MEM-AP setup routine.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-31 14:16:53 -08:00
Øyvind Harboe
02731cf78b build: fix problems with "struct stat" not being defined under eCos
Include <sys/stat.h> according to
http://www.opengroup.org/onlinepubs/000095399/functions/stat.html

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-31 15:48:14 +01:00
Øyvind Harboe
f68dff6690 telnet: fix strage blank spaces at beginning of telnet lines
Sometimes we saw two strange blank spaces at the beginning
of the telnet lines.

progress
  ogress
>

This patch fixes this problem:

progress
progress
>

The code changes are *reasonably* clean, but perhaps it could be
made a bit more elegant, but I didn't want to change things after
I finished diagnosis/testing & submitting the patch.

The problem was that logging can send the text and the newline
separately in two different requests and the telnet code would
incorrectly remove the prompt from the end of a line.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-31 15:06:02 +01:00
David Brownell
e11ce3e6b0 Subject: ADIv5: fix more diagnostics
If the MEM-AP cache is invalid, don't display it; just report that
invalidity as an error.  (This bug has been observed with "mdw 0 32"
after just a "reset halt".  Some code is being wrongly bypassed...)

If it's valid, display that cache at DEBUG level, not ERROR.  Also,
don't assume it's an AHB-AP; it could be another flavor of MEM-AP.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-31 00:26:21 -08:00
David Brownell
695666d294 ADIv5 error checking for Tcl commands
Reject invalid AP numbers (256+) as Tcl operation parameters.
Shrink one of the overlong lines.

Add my copyright to the ADIv5 code (multiple contributions).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-30 22:46:00 -08:00
David Brownell
46b6d5bfe6 ARM ADIv5: fix diagnostics for block writes
They were reporting "read" errors, not "write" errors.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-30 18:08:19 -08:00
David Brownell
3d3128a8f5 ADIv5: cleanup, rename swjdp_transaction_endcheck()
Make messages reference "DAP" if they're actually transport-agnostic, or
"JTAG-DP" when they're JTAG-specific.  Saying SWJ-DP is often wrong (on
most Cortex-A8 chips) and is confusing even if correct (since we don't
yet support SWD).

Rename a JTAG-specific routine to jtagdp_transaction_endcheck() to highlight
that it's JTAG-specific, and that identify DAP clients undesirably depending
on JTAG.  (They will all need to change for SWD support.)

Shrink a few overlong lines of code.  Copy a comment from code removed
in a previous patch (for the ARMv7-M "dap baseaddr" command).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-29 14:31:19 -08:00
David Brownell
2248c387f2 ARMv7-M: use command handler for "dap baseaddr".
Make the ARMv7-M DAP code reuse the command handler for "dap baseaddr".
For some reason, this DAP command wasn't converted earlier.

This is a code shrink and simplification; it also removes a needless
transport dependency on JTAG.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-29 14:16:14 -08:00
David Brownell
303b493c22 NOR: cleanup driver decls
Fix goofy struct indents.  Function names *are* their addresses.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-29 13:52:08 -08:00
Alex Austin
cd3017cffa Clang buildfixes
Building with clang took a few very small changes. The change to
helper/log.h is because clang doesn't like an expression where the
result is unused. In helper/system.h, I just defined true and false
since clang doesn't have them builtin.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-29 00:02:12 -08:00
David Brownell
804c0b2ad3 doc clarifications for server flags
The "-f" is a shortcut for "-c" ... and providing any "-c" options
means the "openocd.cfg" file isn't implicitly used.  Both the User's
Guide and the manual page were weak on these points, which has led
to some confusion.

Also update the manual page to include highlights of the search path
mechanism, including the facts that it exists and that "-s" adds to it.
Stop saying only the current directory is involved; the OpenOCD
script library is quite significant.

(Missing: complete manpage coverage of the search path, including a
FILES section listing all components and saying where the script
library is found.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-28 14:03:29 -08:00
David Brownell
5dcf7898f6 ARM: reference DPM defn from v6/v7 arch spec
The term "DPM" is probably not well known ("Device Power Management"?),
so identify its source in the current ARM architecture specification.
It's relevant to ARMv6, ARMv7-A, and ARMv7-R ... but not "M" profiles.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-28 13:58:20 -08:00
Spencer Oliver
75cfda4cd1 ARM semihosting: win32 and cygwin fixes
Cygwin would fail to reopen a previously written file if the mode is
not given.

Simplified converting the open flags and made sure the win32 O_BINARY
bit is set.

Added define for systems that do not support O_BINARY.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-28 21:05:09 +00:00
Spencer Oliver
465a06dfdc ARM semihosting: fix writing to stdout
SYS_FLEN would be called before a write on a descriptor to check its size.
Currently lseek would fail with -1 when given the stdout/stderr descriptor.
Changing to use fstat seems to be the standard way of handling this.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-28 20:21:31 +00:00
David Brownell
3172be80a3 Cortex-M3: report lockup, and recover
ARMv7-M defines a "lockup" state that's entered in certain double
fault sequences which can't be recovered from without external help.
OpenOCD has previously ignored this.

Issue a diagnostic saying the chip has locked up, and force exit
from this state by halting the core.  It's not clear this is the
best way to handle lockup; but there should now be less confusion.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-27 13:47:48 -08:00
David Brownell
d44f1aaeff ARM ADIv5: messaging tweaks
Add space missing after the invalid ACK value.  On init, say
which AP is being used, and don't assume it's an AHP-AP.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-27 13:40:05 -08:00
David Brownell
2b5c444a32 Cortex-A8: debug messaging tweaks
Make that "TODO" message say what needs to be done.
Say what part of examining failed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-27 13:24:21 -08:00
David Brownell
30365886da various: don't mention wiki
The openfacts.berlios wiki isn't particularly current, and isn't
publicly editable.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-26 18:13:10 -08:00
David Brownell
9e52957efc cygwin buildfix
isspace() parameter must be an integer, else a 'char' gets
used as an array index (sigh).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-26 17:54:49 -08:00
simon qian
33fc60befc SVF: all content between parentheses is one parameter
More SVF fixes:

 * Treat all content between parentheses as part of the same
   parameter; don't (wrongly) treat whitespace as a delimiter.

 * Use isspace() to catch that whitespace; it's not all single
   spaces, newlines etc are also valid.

 * When parsing bitstrings, strip leading whitespace too.

So for example, these are equivalent and should (now) be OK:

  "TDI( 1234 )"
  "TDI( 1 2 3 4 )"
  "TDI(00 12 34 )"
  "TDI(
  	00 12
	34)"

[dbrownell@users.sourceforge.net: comment updates; trivial cleanup]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-25 13:06:46 -08:00
Edgar Grimberg
1dad2ee602 core arm11: Silence logs at level 3 if there is no activity
If the target and openocd are idling, the log should normally
be silent at level 3.  (Given no verbose logging options.)

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-25 12:19:52 -08:00
simon qian
9ff16575d2 SVF: insert space before '(' and after ')'
See http://forum.sparkfun.com/viewtopic.php?p=90983#90983 for discussion;
basically, the SVF parser wrongly expects "TDI (123)" but the space is
optional and it should accept "TDI(123)" too.

In the same way, "TDI(123)TDO(456)" should work too.

Rather than update the command parsing, this just makes sure the expected
spaces are present.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-23 14:24:10 -08:00
David Brownell
718ee762e7 EmbeddedICE - fix Feroceon/Dragonite message
The breakpoint/watchpoint message was wrong for Feroceon and
Dragonite, which have only one working watchpoint unit.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-22 22:54:39 -08:00
David Brownell
82c3c47825 NEWS updates
Summarize most ARM11 and Cortex-A8 updates as "acting much more
like other ARMs", and mention code sharing.

Clarify a few other points, including support for "reset-assert"
on all ARMs except Cortex-M (which doesn't exactly need it).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-22 22:49:42 -08:00
David Brownell
b7fa16eeac ARM11: fix breakpoints with GDB
This fixes a bug whereby GDB's breakpoints weren't activated.
The root cause is a confused interface to resume().  Fix by
almost ignoring the "handle breakpoints" parameter; it only
seems related to the case of skipping breakpoint-at-PC.

Update a few coments to clarify what's happening.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-22 22:37:15 -08:00
David Brownell
4960c9018f Various doc/comment updates
Doxygen: don't be needlessly verbose; alphabetically sort members
TODO: add random bits; clarify which manuals are referenced
ARM disassembler: mention a few opcodes that still aren't handled

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-21 16:45:00 -08:00
David Brownell
08b0be94b5 User's Guide secton on target hardware setup
Highlight the needs to properly jumper development boards; to
make the OpenOCD configuration match the jumpering; and to have
a usable "reset-init" method when debugging early boot code.

Specific mention of the "ATX Mode" that seems useful on
many i.MX boards, forcing NAND boot.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-21 16:15:41 -08:00
David Brownell
f06148612b ADIv5 header cleanup (+ #defines)
Update the comments about DP registers and some of the bitfields.
Remove inappropriate (and unused) DP_ZERO declaration.

Add some (currently unused) #defines needed for SWD protocol support,
based on previous patches from Andreas Fritiofson and Simon Qian.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-21 13:39:22 -08:00
Øyvind Harboe
98f7c2127b target: print reason why GDB halts
If GDB halts unexpectedly, print reason: srst assert or power
out detected.

If polling fails, then things are a bit trickier. We do not
want to spam telnet or the log with polling failed messages.
Leave that case be w/a comment in a code for now.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-21 16:20:58 +01:00
Edgar Grimberg
dfba7fa949 interface: Changed parport address to LPT1
Changed the parport address to LPT1, since it's the most obvious default value.

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
2010-01-21 15:58:59 +01:00
Edgar Grimberg
bc088b302b target: Fixed format problem for mdh
Fixed format problem for mdh. It needs to display 4 chars.

Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
2010-01-21 15:58:59 +01:00
Øyvind Harboe
1350b6aad0 gdb_server: handle stepi/continue packet while target is running with more grace
Rather than issuing a halt and then stepi/resume, just
wait for target to halt.

Issue a sterner warning via gdb console that any gdb
register changes will be ignored in this case.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-21 15:57:30 +01:00
Øyvind Harboe
60cb5bdd30 ecos: add missing PRId8 definition
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-21 08:11:39 +01:00
Spencer Oliver
dbecb13b24 BUILD: remove cygwin gcc 3.4.4 build warnings
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-20 23:11:25 +00:00
David Brownell
2a0c9b08d7 Cortex-M3 vector_catch testing support
The "cm3-ftest.cfg" can be used to verify that OpenOCD handles
certain faults correctly:

 - Test #1: it ignores faults that it wasn't told to catch
 - Test #2: if vector_catch is told to catch, it catches

The "fault.c" generates ASM code to trigger faults, while the
config script loads and runs pre-compiled code.

This covers most, but not all, of the vector_catch options.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-20 11:07:42 -08:00
David Brownell
22d25e6921 board configs -- unique names for flash chips
Don't give the same names to both flash chips on two OMAP boards.

For OSK, enable DCC downloads (removing a warning).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-20 10:46:53 -08:00
David Brownell
6f2b88448f gdb_server: correctly report flash sector sizes
Report each region of same-size sectors separately, instead of
incorrectly reporting that every sector has the same size.

This is a longstanding bug on NOR flash chips with non-uniform
sector sizes.  It was largely hidden by other bugs in flash
handling.  When some of those were recently fixed, this one was
exposed as a regression on str710.

[oyvind.harboe@zylin.com: update the loop to behave on str7 ]

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-20 10:43:32 -08:00
Michael Grzeschik
d036f17001 tcl/target/at91sam3u4e.cfg: changed case in dependent file
openocd does not start with the target configfile due to the case in the
dependent config file.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-20 10:32:53 -08:00
Øyvind Harboe
87cb29dcfe testing: fix str710 test case now builds
Make the test case easily adjustable in size. str710
has very peculiar flash sector layout, nice for testing,
but a larget test_rom.elf is required.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-20 15:12:31 +01:00
Øyvind Harboe
ff976cdb29 arm7/9: add nags upon reset about options to improve performance
arm7_9 fast_memory_access and working area nags added.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-20 14:51:17 +01:00
Spencer Oliver
0c3a4b4d81 ARMV7M: handle bkpt instruction on resume/step
Skip over a bkpt instruction if found on resume/step.
Only software breakpoints known to OpenOCD are currently handled.

So this handles the special case of either a user added bkpt
or library added, eg. semi-hosting support.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-20 09:07:55 +00:00
David Brownell
20d1ef70e8 User's guide: mention lpc2000 checksum issue
Folk almost certainly want to have OpenOCD compute the checksum
when they modify the vector table.  However, that almost guarantees
that "verify_image" will fail.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-20 00:04:17 -08:00
David Brownell
44aaba3d08 gdb_server -- subroutinize memory map logic
Put the memory map logic into its own subroutine.
This will make it a bit easier to package bugfixes,
and simplifies the query packet handling.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-19 23:32:54 -08:00
David Brownell
bf1e9a83c8 gdb_server -- symbol cleanup
Make most methods static; net minor object code shrink.
Likewise various data symbols; no net change.
Shrink some overlong lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-19 23:30:36 -08:00
Andreas Fritiofson
4f310aa0c9 update win32 script search path
The default script search path on Windows is out of date with
the current layout (from installation and documentation), which
makes the standard script library not be found after a normal

	./configure && make && make install

under msys/MinGW. The same should hold true for cygwin native builds
(not verified).

Update search path to ../share/openocd/scripts not ../lib/openocd,
relative to the openocd executable.

Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-19 15:02:15 -08:00
David Brownell
fb4239866c NOR: fix diagnostic
The "NOR: last_addr also needs correction when checking alignment"
patch omitted a necessary update to the key diagnostic; fix.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-19 13:56:33 -08:00
Øyvind Harboe
924bf27596 zy1000: flush jtag buffer before changing speed
It is conceivable that there could be commands in the
queue when a speed change request comes in. Flush the
hw queue before changing speed. Not observed, found by
inspection.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-19 10:58:48 +01:00
Øyvind Harboe
c795b0d8f1 zy1000: print out PCB revision upon boot
Simplify debugging a bit.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-19 10:58:48 +01:00
Øyvind Harboe
cdcb9b0885 flash: add error messages upon incorrect arguments to flash iteration
According to OpenOCD error handling rules the error is
logged at where it occurs(same site where an exception
would have been thrown).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-19 10:58:48 +01:00
David Brownell
5ab34b28ce vsllink -- add comment
Previous patch deserved *inline* comment, not just
in git revision history.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-18 13:18:33 -08:00
Øyvind Harboe
56d2c86500 commands: allow scan_chain command to be executed during config
Adding taps and then dumping them is quite reasonable thing
to do in a config script.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-18 21:42:34 +01:00
simon qian
0b641dac71 read target voltage first in vsllink
The very first command after init command should be "read target voltage".

This is a tweak for the Old Versaloon firmware.  Without this, in most
most cases, it works.   Under Ubuntu9.04, there is a chance that the USB
will fail.  The problem disappears if I read target voltage first.

For the lastest Versaloon firmware, it's OK.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-17 23:37:15 -08:00
richard vegh
daa1ff3535 NAND: lpc3180 crashes on LPC3250
The LPC3180 NAND driver was crashing on some large page chips.
Fix:

 - Crash and related functionality (don't memset too much OOB data)
 - Some debug messages
 - Command handling now works

[dbrownell@users.sourceforge.net: whitespace/linelength/message cleanup]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-16 12:27:45 -08:00
David Brownell
183765707f ADIv5 improved diagnostic
Don't just complain about an invalid ACK; say what the
value was, to help troubleshooting.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-15 13:02:45 -08:00
David Brownell
6c4a643d63 ARM DPM: disable some nyet-ready breakpoint code
Until we manage breakpoints at runtime (patches not ready for 0.4)
the only way this code should touch them is to disable them at server
startup (a previous debug session may have left them active).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-15 12:53:26 -08:00
David Brownell
187ccb60ee NEWS: include s3c64xx NAND driver
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-15 09:36:01 -08:00
David Brownell
0f7cea2847 jtag.h whitespace/comment cleanup
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-14 14:38:24 -08:00
David Brownell
8e1b5c3138 ARM ADIv5: add comments
Add doxygen and other comments for what's more or less the lowest
level JDAG-DP primitive, to access JTAG_DP_{A,D}PACC registers.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-14 12:58:39 -08:00
David Brownell
1d140c4dcd ARM7/ARM9: improved reset support
Teach most remaining ARM cores how to use the "reset-assert" event.

Same model as elsewhere:  iff a handler is provided for that event,
use that instead of trying to assert SRST (which may be unavailable,
or inappropriate since it resets too much).  Else no change.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-14 12:46:33 -08:00
Peter Korsgaard
000a1cfd01 nand flash support for s3c64xx
Identical to the existing 2412/2443 support except for the base address
and NFCONF value (bit 2 is reserved and should be written as 1 ref UM).

Tested on a s3c6410 board, but controller is identical in 6400/6410
except for 8bit MLC ECC support in 6410 which isn't supported by the
driver.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-14 21:07:46 +01:00
Laurentiu Cocanu
24653c950a str9x.c: remove optimization when erasing the whole bank
Using the erase bank command will cause a time out error. Replacing
this with the erase sector bank will provide a slower but safer and
stable method to erase the flash.

Signed-off-by: Laurentiu Cocanu <laurentiu.cocanu@zylin.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-14 15:07:24 +01:00
David Brownell
e1679a29f0 ARM7/9 minor cleanups
Shrink some overlong lines.  Add my 2009 copyright.
Move a declaration to the beginning of its block.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-14 03:16:07 -08:00
Spencer Oliver
e2d3266ff1 GDB: change gdb_breakpoint_override to COMMAND_ANY
- enable gdb_breakpoint_override to be used within config script.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-14 09:35:33 +00:00
David Brownell
b60dd35e33 User's Guide updates
Capture various bits of useful information that have come up on the
list but haven't yet gotten into the documentation:

 - Watchdog timers firing during JTAG debug need attention;

 - Some chips have special registers to help JTAG debug;

 - Cortex-M3 stepping example with IRQs and maskisr;

 - Clarifications re adaptive clocking:  not all ARMs do it, and
   explain it a bit better.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-13 23:33:53 -08:00
David Brownell
73566405b6 NOR: add optional "flash erase_address" sector padding
Add a NOR flash mechanism where erase_address ranges can be padded
out to sector boundaries, triggering a diagnostic:

  > flash erase_address 0x0001f980 16
  address range 0x0001f980 .. 0x0001f98f is not sector-aligned
  Command handler execution failed
  in procedure 'flash' called at file "command.c", line 647
  called at file "command.c", line 361
  >

  > flash erase_address pad 0x0001f980 16
  Adding extra erase range, 0x0001f800 to 0x0001f97f
  Adding extra erase range, 0x0001f990 to 0x0001fbff
  erased address 0x0001f980 (length 16) in 0.095975s (0.163 kb/s)
  >

This addresses what would otherwise be something of a functional
regression.  An earlier version of the interface had a dangerous
problem:  it would silently erase data outside the range it was
told to erase.  Fixing that bug turned up some folk who relied on
that unsafe behavior.  (The classic problem with interface bugs!)
Now they can get that behavior again.  If they really need it,
just specify "pad".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-13 23:33:25 -08:00
David Brownell
d91941d5a0 Cortex-M3: improved core exception handling
This updates three aspects of debugger/exception interactions:

 - Save the user's "vector_catch" setting, and restore it after reset.
   Previously, it was obliterated (rather annoyingly) each time.

 - Don't catch BusFault and HardFault exceptions unless the user says
   to do so.  Target firmware may need to handle them.

 - Don't modify SHCSR to prevent escalating BusFault to HardFault.
   Target firmware may expect to handle it as a HardFault.

Those simplifications fix several bugs.  In one annoying case, OpenOCD
would cause the target to lock up on ome faults which triggered after
the debugger disconnected.

NOTE:  a known remaining issue is that OpenOCD can still leave DEMCR
set after an otherwise-clean OpenOCD shutdown.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-13 03:17:23 -08:00
Øyvind Harboe
b8e930e3bf arm7/9: enable check that DCC downloads have been enabled
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-13 12:00:02 +01:00
Øyvind Harboe
ee519ab356 arm7/9: add fn to check if dcc downloads have been enabled
DCC downloads should be enabled for any self repecting
openocd config file for arm7/9. Print out note about
it otherwise.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-13 12:00:02 +01:00
Øyvind Harboe
dc793455e9 target: add check_reset hook
Allow targets to run checks post reset. Used to check
that e.g. DCC downloads have been enabled.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-13 12:00:02 +01:00
Øyvind Harboe
3e33393078 gdbserver: fix typo that broke read/write watchpoint
It looks like a bugfix from normal breakpoints was not
copied over.

Do not use clever mathematics and assumptions to convert from
GDB enum for break/watchpoints to OpenOCD enum.

Drop connection upon unknown breakpoint type, this code path
was not really considered by the previous code I think.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-13 12:00:02 +01:00
Øyvind Harboe
6c75f5249c debug: make logging of commands terser
one line / command instead of one line per argument.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-13 08:32:15 +01:00
David Brownell
b4a4d5c731 ARM: bugfix for "movt" disassembly
Use the correct bitfield to specify the register whose
top halfword gets replaced.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-12 12:40:39 -08:00
Vladimir Zapolskiy
1de107a5a2 Added Openmoko USB JTAG interface config file.
Added interface config file for JTAG/RS232 debug board originally
integrated to Neo 1973 and Neo FreeRunner phones.
Adapter was tested with i.MX31, S3C2410 and AT91SAM9260 processors.

Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com>
2010-01-11 15:58:13 +01:00
Øyvind Harboe
e5349bfb49 target: return JIM_OK instead of ERROR_OK
No change in actual binary as JIM_OK == ERROR_OK,
but JIM_OK is correct here.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-11 15:01:02 +01:00
Øyvind Harboe
fb71a0a0dd reset: better error messages
Use correct tcl syntax to throw exception.

the syntax is "return -code error" not "return -error"

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-11 12:58:06 +01:00
Øyvind Harboe
6d8604de37 commands: make error messages a bit more terse
we don't need to know the build path of command.c when
reading normal user level error messages.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-11 12:58:06 +01:00
Øyvind Harboe
c74ca40e09 zy1000: reset bugfix
flush JTAG FIFO before reset. Fixes RCLK problems observed
w/lpc2148, but really fixes a wider range of problems.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-11 10:25:13 +01:00
David Brownell
8c730aaee2 Doxygen file comments
Add file comments to a few files.  Make the GDB server use
more conventional (pointer-free) hex digit conversion.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-11 00:16:57 -08:00
Øyvind Harboe
88907cc7f9 shutdown: more graceful shutdown
Shutdown is not an error condition, do not return error
from main.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-11 08:13:17 +01:00
Spencer Oliver
d746dee833 build: doxygen build
- Fix for building doxygen out of tree

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-10 21:00:48 +00:00
David Brownell
c8267930c7 FreeBSD build fixes
Based on notes from Tomek Cedro <tomek.cedro@gmail.com> and
Steve Franks <bahamasfranks@gmail.com>.

In the User's Guide, sort the list of operating systems reported
through Tcl with $ocd_HOSTOS ... and include FreeBSD.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-10 10:06:58 -08:00
David Brownell
5e221fa3a7 Presto: doxygen fix
Newline needed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 22:24:43 -08:00
David Brownell
ab4307e693 jtag/tcl help/usage fixups
The usual: expand several helptexts to be more correct and to use
full sentences; make the usage messages use the same EBNF as the
User's Guide; use function names for their addresses.

Also add a comment about that odd jtag_command_handlers_to_move[] thing.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 22:15:57 -08:00
David Brownell
5cb1dcfad3 ZY1000 help/usage fixups
The usual:  same EBNF as in the User's Guide, full sentence helptext,
function names *are* their addresses.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 22:14:08 -08:00
David Brownell
0811f6b192 jtag: presto, parport help/usage updates
Presto: add doxygen file comment.

Parport: note a couple gaps in layout config.

Both: use the uniform EBNF for usage, bugfix helptexts, use function
name as its address not "&name".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 22:09:08 -08:00
David Brownell
ad5fd39063 jtag/gw16012 usage/help updates
Use standard BNF.  Improve/correct helptext for its "parport_port"
command.  Function address is just its name.
2010-01-09 22:05:55 -08:00
David Brownell
ff647e6bb4 parport (mostly) doc fixes
The "parport_port" commands generally don't *require* a port_number;
they're of the "apply any parameter, then print result" variety.  Update
the User's Guide accordingly.

Some of those commands are intended to be write-once: parport_port,
and parport_cable.  Say so.

Use proper EBNF for the parport_write_on_exit parameter.

Parport address 0xc8b8 is evidently mutant.  Say so in the "parport.cfg"
file, to avoid breaking anyone with that mutant config.  But update the
User's Guide to include a sane example for the LP2 port.

Finally document the "presto_serial" command.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 21:56:11 -08:00
David Brownell
1dd5277ba3 src/helper: usage/help updates
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets.  Improve and correct various helptexts.

Don't use "&function"; a function's name is its address.
Fix some whitespace glitches, shrink a few overlong lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 13:32:08 -08:00
David Brownell
1c5c57ec8e src/flash/nor: usage/help/doc updates
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets.  Improve and correct various helptexts.

Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace; shrink a
few overlong lines; fix some bad indents.

Add TODO list entry re full support for NAND/NOR bank names.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 10:25:03 -08:00
Spencer Oliver
70738bd75d MIPS: update arch_info access to match other targets
- add target_to_mips32 and target_to_m4k to match test of codebase.
 - mips32_arch_state now shows if processer is running mips16e isa.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-09 13:37:02 +00:00
David Brownell
fc9a2d0e6f src/server: usage/help/doc updates
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets.  Improve and correct various helptexts.

Specifically for the port commands, clarify that the number
is optional, and omitting it causes the current number to be
displayed.

Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace; shrink a
few overlong lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 00:55:41 -08:00
Masaki Muranaka
aafd3877e6 buildfix on MacOS
Recent Apple gcc versions use __APPLE__ instead of __DARWIN__; accept
that too.

Also use #warning, not #warn; neither is standard, but most CPP versions
require it to be spelled out.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-09 00:10:18 -08:00
David Brownell
973cd9a299 PLD: usage/help updates
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets.  Improve and correct various helptexts.

Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace, shrink
a few overlong lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-08 23:23:55 -08:00
David Brownell
2a76c1bcf9 NAND: help/usage/doc updates
Usage messages should use the same EBNF as the User's Guide;
no angle brackets.  Be more complete too ... some params were
missing.  Improve and correct various helptexts.

Make user's guide refer to the NAND "driver" name, not the
controller name; that's a bit more precise.

Don't use "&function"; its name is its address.  Line up struct
initializers properly.  Remove some blank lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-08 23:18:46 -08:00
David Brownell
ae71005929 Doc/examples: clarify usage messages
Update/bugfix the "hello" example; emphasize using EBNF syntax,
matching the User's Guide.  Correct the Texinfo style guide to
say EBNF, not BNF.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-08 23:13:39 -08:00
David Brownell
b800eb0336 *SVF: help/usage updates
Usage messages should use the same EBNF as the User's Guide;
no angle brackets.  Be more complete too ... some params were
missing.

Don't use "&function"; its name is its address.

Unrelated: fix typo in one "target.c" usage message.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-08 20:16:05 -08:00
David Brownell
1a2c258ed4 MFLASH: help/usage updates
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets.  Improve and correct various helptexts.

Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-08 20:12:18 -08:00
David Brownell
c1cb20971e Coexist with quilt: rename PATCHES --> PATCHES.txt
The issues is on Win32, which ignores case in filesystem
and thus doesn't tolerate the quilt "patches" directory.

Rename, and add "patches" to .gitignore so that developers
can choose to use quilt for local patch management.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-08 17:20:47 -08:00
David Brownell
296a011db5 NOR: add FIXMEs for writing ones
It can invalidate ECC codes, and in general is not guaranteed
to work.  (However on some chips it _appears_ to behave.)  Just
don't do it; don't write in those cases.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-08 16:47:58 -08:00
David Brownell
12c143d594 misc ARM help/usage updates
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.

Uupdate some helptext to be more accurate.

Don't use "&function"; functions are like arrays, their address
is their name.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:41:42 -08:00
David Brownell
82c0fb5277 ARM966: help/usage updates
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.

Fix the User's Guide to say where the magic CP15 bits are defined;
and add comments in case someone provides mcr/mrc methods.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:39:32 -08:00
David Brownell
e7965cd3eb Xscale: User's Guide updates
Fix some EBNF goofs ... these commands have *optional* params, etc

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:34:44 -08:00
David Brownell
a42bea654c ARM720: help/usage updates
Deprecate the "pass an instruction opcode" flavor of cp15
access in favor of the "arm mcr ..." and "arm mrc ..."
commands, which offer fewer ways to break things.

Use the same EBNF syntax in the code as for the user's guide.

Update User's Guide to say where to find those magic values
(which table in the ARM920 TRM).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:30:09 -08:00
David Brownell
e0b6e5deef ARM720: help/usage updates
Deprecate the "pass an instruction opcode" flavor of cp15 access
in favor of the "arm mcr ..." and "arm mrc ..." commands, which
offer fewer ways to break things.

Use the same EBNF syntax in the code as for the user's guide.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:25:03 -08:00
David Brownell
199abf49ea ARM11: help/usage updates
Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.

Uupdate some helptext to be more accurate.

Fix the User's Guide in a few places to be more consistent (mostly
to use brackets not parentheses) and to recognize that parameter may
be entirely optional (in which case the command just displays output,
and changes nothing).  Also reference NXP, not Philips, for LPC chips.

Don't use "&function"; functions are like arrays, their address
is their name.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:21:24 -08:00
David Brownell
48d51e1719 ARM7/ARM9: help/usage updates
Provide helptext which was sometimes missing; update some of it
to be more accurate.

Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.

Fix the User's Guide in a few places to be more consistent (mostly
to use brackets not parentheses) and to recognize that parameter may
be entirely optional (in which case the command just displays output,
and changes nothing).  Also reference NXP, not Philips, for LPC chips.

Don't use "&function"; functions are like arrays, their address
is their name.  Shrink some overlong lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:20:14 -08:00
David Brownell
17921f51ab ARMv7: help/usage updates
Provide helptext which was sometimes missing; update some of it
to be more accurate.

Usage syntax messages have the same EBNF as the User's Guide;
there should be no angle brackets in either place.

Don't use "&function"; functions are like arrays, their address
is their name.  Shrink some overlong lines, remove some empties.

Add a couple comments about things that should change:  those
extra TCK cycles for MEM-AP reads are in the wrong place (that
might explain some problems we've seen); the DAP command tables
should be shared, not copied.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 16:18:01 -08:00
David Brownell
e19fe9ad09 ARM ETM/ETB/trace: help/usage updates
Provide helptext which was sometimes missing; update some of it
to be more accurate.

Usage syntax messages have the same EBNF as the User's Guide;
no angle brackets in either place.

Don't use "&function"; functions are like arrays, their address
is their name.  Shrink some overlong lines, remove some empties.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 15:22:41 -08:00
David Brownell
dd8f679aa2 target misc: help/usage updates
Provide helptext which was sometimes missing; update some of it
to be more accurate.

Usage syntax messages have the same EBNF as the User's Guide.

Don't use "&function"; functions are like arrays, their address
is their name.  Shrink some overlong lines; remove some empties.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 15:05:26 -08:00
David Brownell
7c3aee96b2 XScale: help/usage updates
Provide helptext which was sometimes missing; update some of it
to be more accurate (mostly they display something w/no args).

Usage syntax messages have the same EBNF as the User's Guide.
In some cases, *exactly* what the user's guide shows... e.g.
talking about "offset" not "address" for trace_image.

Don't use "&function"; functions are like arrays, their name
is their address.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-07 14:51:59 -08:00
Spencer Oliver
991d030fcc MIPS: change bulk_write_memory fallback msg to LOG_DEBUG
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-07 22:39:35 +00:00
Spencer Oliver
c68c2751f3 MIPS: whitespace cleanup
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-07 20:56:07 +00:00
Spencer Oliver
2d450b9033 MIPS: fastdata bulk write fallback
If fastdata access fails, then fallback to default mips_m4k_write_memory
Remove unnecessary fastdata loader verify check

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-06 20:24:31 +00:00
David Brownell
2bc7446bb8 buildfix with -DNDEBUG
Don't save that state unless its only user, an assertion,
is compiled.  Saving it broke a cygwin build.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-05 14:11:03 -08:00
David Brownell
844b5eb49d don't require 'openocd.cfg' to start
Starting the daemon with with just a bare "openocd" I saw:

	Can't find openocd.cfg

That's not an error; don't treat it as if it were.  There may
be an error later -- like, "no interface set up" -- but let
messages only report real errors, not fake ones.
2010-01-05 13:32:39 -08:00
David Brownell
fccb812f82 ARM: add #defines for JTAG ack codes
JTAG has only two possible JTAG ack codes for APACC and DPACC
register reads/writes.  Define them, and remove empty "else"
clause in the code which now uses those codes.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-05 13:03:27 -08:00
David Brownell
adf2a9a267 ARM: add comments re DAP assumptions
I think some of these assumptions are not well-founded.
Related, that swjdp_transaction_endcheck() is a bit iffy.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-05 12:55:46 -08:00
Spencer Oliver
9d83df72dc MIPS: pracc access tweaks
reorder the pracc access so we can save a few access cycles

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-05 19:54:37 +00:00
Spencer Oliver
ba96fc3e9d PIC32: enable ram execution
add reset-init script to allow ram execution from reset, this is required for ejtag fastdata access.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-05 19:54:37 +00:00
Spencer Oliver
f6412d9c7b MIPS: optimize pracc access
remove unnecessary nops when accessing ejtag pracc
general fastdata patch cleanup

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-05 19:54:36 +00:00
Spencer Oliver
faad9e5923 parport: output port as hex rather than dec
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-05 19:54:36 +00:00
David Claffey
03e8649bc6 MIPS: merge mips fast_data patch from David N. Claffey
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-01-05 19:54:35 +00:00
Øyvind Harboe
95f86e8e05 gdb: fix regression in gdb_port command
The gdb_port command can be invoked during normal execution
to report the port used for gdb, whereas it was listed as
CONFIG stage only, which caused an error when excuting
it to return the reported error.

Also in line with the grander goal of making more commands
available during all "modes" (perhaps retiring config mode),
there is no particular reason to limit gdb_port to the
config stage.

Regression was introduced in:

b3bf1d12b2 aka
v0.4.0-rc1-32-gb3bf1d1

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-01-05 15:28:23 +01:00
Johannes Stezenbach
6d4abe906f update udev rules for new udev version
New versions of udev (148+) emit the following warnings:

udevd[425]: BUS= will be removed in a future udev version,
  please use SUBSYSTEM= to match the event device, or
  SUBSYSTEMS= to match a parent device, in /lib/udev/rules.d/60-openocd.rules:1
udevd[425]: SYSFS{}= will be removed in a future udev version,
  please use ATTR{}= to match the event device, or
  ATTRS{}= to match a parent device, in /lib/udev/rules.d/60-openocd.rules:4
udevd[425]: SYSFS{}= will be removed in a future udev version,
  please use ATTR{}= to match the event device, or
  ATTRS{}= to match a parent device, in /lib/udev/rules.d/60-openocd.rules:7
...

See also http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=560141

[dbrownell@users.sourceforge.net: add IDs for Stellaris ICDI, Olimex Tiny-H]

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-05 01:54:06 -08:00
David Brownell
1b3f15d51e ARMv7-M: use AP_REG_* symbol
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-04 22:11:34 -08:00
David Brownell
237a707f96 FT2232: fix doc typo
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-03 15:02:51 -08:00
David Brownell
e1258c703b JTAG/drivers: ft2232 docs
Add doxyegen description for this driver.

Correct the helptext (configures *or* displays based on #params),
and usage (use the same BNF as the User's Guide).

Remove superfluous #include

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-03 14:54:52 -08:00
David Brownell
50fb3a5129 JTAG/Drivers: Amontec JTAG accelerator fixes
Remove superfluous #include.

Correct the helptext (configures *or* displays based on #params),
and usage (use the same BNF as the User's Guide).

Add doxygen -- file-level description and a @todo for doing
RTCK correctly.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-03 14:51:01 -08:00
David Brownell
4aedb02fcd JTAG: Amontec JTAG accelerater "rtck" is back
The command processing conversion a while back lost the
"rtck" enable/disable command; restore it.

NOTE that having such a command is wrong; there's a standard
way to enable adaptive clocking ("speed 0").

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-03 13:30:06 -08:00
David Brownell
e0338293b8 JTAG/drivers: cleanup jtag_interface structs
Get rid of excess indents.
Ditto superfluous "&" before function pointers.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-03 13:07:18 -08:00
David Brownell
d9508b30e0 JTAG/drivers: amt_jtagaccel fixes + cleanup
Build fixes:  it failed abysmally with PPDEV enabled.  Swapped
a build-time error with a FIXME comment in the affected macros.

Cleanup: remove "&" before function pointers, and excess indent,
for the interface struct declaration.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-03 12:59:51 -08:00
David Brownell
4ed5b45097 ARM: ADIv5 JTAG symbol cleanup
Rename DAP_IR_* as JTAG_DP_* since those symbols are specifically
for JTAG-DP (or SWJ-DP in JTAG mode), and won't work with SWD.
Define the JTAG ABORT and IDCODE instructions for completeness;
add a comment about where to (someday) use ABORT.

Fix messaging which assumes everything is an SWJ-DP; say "JTAG-DP"
instead, it's at least more appropriate for all JTAG transports.

Shrink the affected lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 15:53:33 -08:00
David Brownell
858226aae2 ARM: dap info fix + tweaks
Fix: don't print the BASE address except if it's a MEM-AP;
that's an unlikely error, but there's no point getting it wrong.
Tweaks: comments, capitalization.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 15:53:18 -08:00
David Brownell
6105f2bc4a ARM: ADIv5 export cleanup
Make some private functions "static".  Remove their public declarations,
and what is now an obviously unused function.  Shrinks this object's size
(about 5% on x86_64) while making the code's scope easier to understand.
Shrink the affected lines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 15:53:06 -08:00
David Brownell
e60c164cdb ARM: ADIv5 symbol and comment cleanup
Instead of magic numbers, use their AP_REG_* constants.  Rename
the ROM address symbol as BASE to match ARM's documentation.

Comment various other symbols in the header; add some missing ones.
Remove an unused struct.  Add some doxygen for stuff including the
DAP structure and initialization.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 15:53:03 -08:00
David Brownell
ec88ccc51c Cortex-M3: minor breakpoint cleanup
Shrink some lines, add some comments, simplify some tests.
During debug startup, log the core revision level too.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 15:52:52 -08:00
David Brownell
b3bf1d12b2 streamline and document helptext mode displays
Most commands are usable only at runtime; so don't bother saying
that, it's noise.  Moreover, tokens like EXEC are cryptic.  Be
more clear: highlight only the commands which may (also) be used
during the config stage, thus matching the docs more closely.
There are

 - Configuration commands (per documentation)
 - And also some commands that valid at *any* time.

Update the docs to note that "help" now shows this mode info.

This also highlighted a few mistakes in command configuration,
mostly commands listed as "valid at any time" which shouldn't
have been.  This just fixes ones I noted when sanity testing.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 15:52:35 -08:00
Dean Glazeski
9d167d62f2 Fix usage/help search for subcommands.
This makes it so that the usage/help command properly uses the whole command,
including subcommand, in the search for help information.  This previously
caused erroneous output from the usage command handler.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 02:10:55 -08:00
Dean Glazeski
be01786186 Add the current command to the command information
I wanted to make it so I can be ignorant of a commands invocation string, so
I tried to use CMD_CURRENT (aka cmd->current) which is supposed to house a
pointer to the current command.  It turns out that this wasn't being set.

This patch adds the current command structure to the command invocation
structure before sending it along to the command handler.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 01:50:57 -08:00
Antonio Borneo
668f20d0ab Added ST FlashLINK interface config file.
The relevant cable config is already in OpenOCD, but not a config for
the JTAG adapter.  I have tested with FlashLINK on ARM926.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-01-02 01:50:57 -08:00
David Brownell
384e9193e9 User's Guide: warn about the forum
Namely, that developers don't hang out; it's a users-only club.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-31 03:09:03 -08:00
Dean Glazeski
7cef6d650c Remove some more Eclipse stuff from Git's eyes.
This adds the .settings folder and the .cproject file put down
by Eclipse from the eyes of Git.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-30 23:26:16 -08:00
Antonio Borneo
3ed254c18a ARM7_9: Fix segfaults
Handlers for commands
 - arm7_9 semihosting <enable | disable>
 - $_TARGETNAME arp_reset assert 1
didn't check if target has already been examined, and could
segfault when using the NULL pointer "arm7_9->eice_cache".

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-30 16:58:27 -08:00
Antonio Borneo
7c5acf8660 whitespace cleanup, mostly for docs
Remove useless space/tab at end of lines.
Remove spaces in indentation and replace with tab.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-30 11:51:29 -08:00
Antonio Borneo
17fb7ead4b ARM9TDMI: Fix segfault.
The handler for "arm9tdmi vector_catch ..." did not check
if target has already been examined.  Without this fix it
segfaults when using NULL pointer "arm7_9->eice_cache".

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-30 11:51:29 -08:00
Antonio Borneo
c116d8f6bc Fix parport_dcl5 config file.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2009-12-30 19:07:44 +01:00
Øyvind Harboe
20354a66b9 zy1000: add zy1000_ prefix to uart command
less polution of the general namespace(preventive action,
no problems reported).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-30 13:13:31 +01:00
Øyvind Harboe
2cf6d47375 zy1000: unlock flash upon startup for revc
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-30 12:36:22 +01:00
Øyvind Harboe
272c33c190 zy1000: reconfigure FPGA upon reset instead of just the CPU
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-30 12:12:32 +01:00
Øyvind Harboe
bd3700e89d zy1000: firmware upgrade fixes for revc
Use ecos firmwareutil upgrade utilities

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-30 12:12:24 +01:00
Øyvind Harboe
12618e4c6d zy1000: less warnings
use inline for static functions in header files to
avoid warnings about fn not being used.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2009-12-30 12:11:33 +01:00
Piotr Esden-Tempski
d4bef466c3 Added Open-BLDC board config file. 2009-12-29 12:41:43 +01:00
Piotr Esden-Tempski
aa81462618 Added floss-jtag interface config file. 2009-12-29 12:41:43 +01:00
Freddie Chopin
6b1eeb92fe MinGW build fixes
Print "ssize_t" as "%ld" (+ cast to long) not as "%zu".
Official MinGW (gcc 3.4.5) doesn't understand "z" flag.

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-28 13:09:31 -08:00
Freddie Chopin
37cc6c495f stm32x commands get "usage"
Add .usage fields to stm32x command_registration,
so that "help stm32x" shows required parameters.

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-28 13:05:50 -08:00
David Brownell
ec297e4bf1 Fix Luminary FT2232 layout docs/configs
Most of this patch updates documentation and comments for various
Luminary boards, supporting two bug fixes by helping to make sense
of the current mess:

 - Recent rev C lm3s811 eval boards didn't work.  They must use
   the ICDI layout, which sets up some signals that the older
   boards didn't need.  This is actually safe and appropriate
   for *all* recent boards ... so just make "luminary.cfg" use
   the ICDI layout.

 - "luminary-lm3s811.cfg", was previously unusable!  No VID/PID;
   and the wrong vendor string.  Make it work, but reserve it
   for older boards where the ICDI layout is wrong.

 - Default the LM3748 eval board to "luminary.cfg", like the
   other boards.  If someone uses an external JTAG adapter, all
   boards will use the same workaround (override that default).

The difference between the two FT2232 layouts is that eventually
the EVB layout will fail cleanly when asked to enable SWO trace,
but the ICDI layout will as cleanly be able to enable it.  Folk
using "luminary.cfg" with Rev B boards won't see anything going
wrong until SWO support is (someday) added.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-28 12:59:47 -08:00
Piotr Esden-Tempski
cba1813d5c NOR: last_addr also needs correction when checking alignment
Otherwise the new alignment checking algorithm thinks that the
address is not aligned, because it is way beyond the last sector.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-28 12:31:47 -08:00
David Brownell
3ace333663 create tcl/board/dm365evm.cfg
This config is only lightly tested, and doesn't work well yet;
but it's a start.

 * Notably missing is PLL configuration, since each DaVinci
   does that just a bit differently; and thus DDR2 setup.

 * The SRST workaround needed for the goof in the CPLD's VHDL
   depends on at least the not-yet-merged patch letting ARM9
   (and ARM7) chips perform resets that don't use SRST.

So this isn't yet suitable for debugging U-Boot.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-27 12:16:55 -08:00
David Brownell
155a6a2c0b NOR: make flash_write_unlock() pad to sector end
Resolve a regression when using newish automagic "write_image"
modes, by always padding to the end of affected sectors.

Also document some issues associated with those automagic options,
in the User's Guide and also some related code comments.

We might need similar padding at the *beginning* of some sectors,
but this is a minimalist fix for the problems which have currently
been reported (plus doc updates).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-27 11:34:31 -08:00
Catalin Patulea
84dbf8ab5a Driver for USB-JTAG, Altera USB-Blaster and compatibles
The 10-pin JTAG layout used with these adapters is used by
a variety of platforms including AVR.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-26 15:05:06 -08:00
Dean Glazeski
900d745567 Olimex SAM9-L9260 board configuration update.
This updates the board configuration for the SAM9-L9260 board with the
configuration for the on-board NAND and dataflash.  Included are commands
for configuring the AT91SAM9 NAND flash driver.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-26 13:08:24 -08:00
David Brownell
3a84436afb ARM: add comment re register exports
Modern versions of GDB can understand VFP3 and iwMMXt hardware.
2009-12-26 11:25:44 -08:00
David Brownell
e7f81c11c9 User's Guide: update GDB info
Advise leaving background polling enabled; fix broken URL;
add simple program startup example.
2009-12-26 10:35:24 -08:00
David Brownell
df58812b52 NOR: messaging fix
Fix syntax error:  default to "wrote N bytes"; writing a
single byte is an unusual case, not the normal one.
2009-12-26 10:24:39 -08:00
David Brownell
396b0f3012 NOR: Allocate the right amount of memory
Switch to calloc() to simplify review and initialization.
2009-12-26 10:22:28 -08:00
David Brownell
08a890e4aa cygwin 1.7 build fixes
It's less accepting of signed char ... insisting that e.g. tolower()
not receive one as a parameter.

It's probably good to phase out such usage, given the number of bugs
that lurk in the vicinity (assumptions that char is unsigned), so fix
these even though such usage is actually legal.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-26 10:19:19 -08:00
Antonio Borneo
f9d203d1e6 PARPORT code cleanup:
Align elements in array.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2009-12-26 10:19:57 +01:00
David Brownell
4e2b15fc93 Restore "-dev" version suffix
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-12-21 14:49:36 -08:00
638 changed files with 58270 additions and 40400 deletions

21
.gitignore vendored
View File

@@ -14,6 +14,17 @@
src/jtag/minidriver_imp.h
src/jtag/jtag_minidriver.h
# OpenULINK driver files generated by SDCC
src/jtag/drivers/OpenULINK/*.rel
src/jtag/drivers/OpenULINK/*.asm
src/jtag/drivers/OpenULINK/*.lst
src/jtag/drivers/OpenULINK/*.sym
src/jtag/drivers/OpenULINK/*.map
src/jtag/drivers/OpenULINK/*.mem
src/jtag/drivers/OpenULINK/*.lnk
src/jtag/drivers/OpenULINK/*.ihx
src/jtag/drivers/OpenULINK/*.rst
# editor files
*.swp
@@ -66,6 +77,16 @@ stamp-vti
INSTALL
NOTES
# coexist with quilt
patches
# Eclipse stuff
.project
.cproject
.settings
# Emacs temp files
*~
# CScope database files
*cscope.out

5
.gitmodules vendored
View File

@@ -1,3 +1,6 @@
[submodule "tools/git2cl"]
path = tools/git2cl
url = git://repo.or.cz/git2cl.git
url = http://repo.or.cz/r/git2cl.git
[submodule "jimtcl"]
path = jimtcl
url = http://repo.or.cz/r/jimtcl.git

14
BUGS
View File

@@ -6,6 +6,12 @@ posting a message with your report:
openocd-development@lists.berlios.de
Also, please check the Trac bug database to see if a ticket for
the bug has already been opened. You might be asked to open
such a ticket, or to update an existing ticket with more data.
https://sourceforge.net/apps/trac/openocd/
To minimize work for OpenOCD developers, you should try to include
all of the information listed below. If you feel that some of the
items below are unnecessary for a clear bug report, you may leave
@@ -22,12 +28,12 @@ that may be important.
- If the report is for a regression:
- Include logs for both working and broken versions.
- Find the precise version that caused the regression by binary search.
You can use "git bisect" to expedite this binary search:
You can use "git bisect" to expedite this binary search:
http://www.kernel.org/pub/software/scm/git/docs/git-bisect.html
If possible, please develop and attach a patch that helps to expose or
solve the reported problem. See the PATCHES file for more information
for that process.
solve the reported problem. See the PATCHES.txt file for information
about that process.
Attach all files directly to your posting. The mailing list knows to
transform attachments to links, but attachments must be less than 300KB
@@ -36,7 +42,7 @@ in total.
@section bugscrashdump Obtaining Crash Backtraces
If OpenOCD is crashing, there are two very effective things you can do to
improve your chances of getting help on the development mailing list.
improve your chances of getting help on the development mailing list.
Try to reproduce the problem using the dummy JTAG interface to allow other developers to replicate
your problem robustly and use GDB to get a trace:@par

View File

@@ -384,7 +384,7 @@ HIDE_SCOPE_NAMES = NO
# will put a list of the files that are included by a file in the documentation
# of that file.
SHOW_INCLUDE_FILES = YES
SHOW_INCLUDE_FILES = NO
# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
# is inserted in the documentation for inline members.
@@ -403,7 +403,7 @@ SORT_MEMBER_DOCS = YES
# by member name. If set to NO (the default) the members will appear in
# declaration order.
SORT_BRIEF_DOCS = NO
SORT_BRIEF_DOCS = YES
# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
# hierarchy of group names into alphabetical order. If set to NO (the default)
@@ -567,9 +567,9 @@ WARN_LOGFILE =
INPUT = @srcdir@/doc/manual \
@srcdir@/TODO \
@srcdir@/BUGS \
@srcdir@/PATCHES \
@srcdir@/PATCHES.txt \
@srcdir@/src \
@srcdir@/config.h
@builddir@/config.h
# This tag can be used to specify the character encoding of the source files
# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
@@ -692,13 +692,13 @@ SOURCE_BROWSER = YES
# Setting the INLINE_SOURCES tag to YES will include the body
# of functions and classes directly in the documentation.
INLINE_SOURCES = YES
INLINE_SOURCES = NO
# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
# doxygen to hide any special comment blocks from generated source code
# fragments. Normal C and C++ comments will always remain visible.
STRIP_CODE_COMMENTS = NO
STRIP_CODE_COMMENTS = YES
# If the REFERENCED_BY_RELATION tag is set to YES
# then for each documented function all documented

56
HACKING Normal file
View File

@@ -0,0 +1,56 @@
Submitting patches to the OpenOCD mailing list:
By the time you have read this, one supposes that
you have figured out how to clone the OpenOCD git
repository.
Below is a basic workflow and specific instructions
to get you going with git and patches.
0. Clone the git repository, rather than just
download the source.
git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
or if you have problems with the "git:" protocol, use
the slower http protocol:
git clone http://repo.or.cz/r/openocd.git
1. Set up git with your name and email:
git config --global user.name "John Smith"
git config --global user.email "john@smith.org"
2. Work on your patches. Split the work into
multiple small patches that can be reviewed and
applied seperately and safely to the OpenOCD
repository.
while(!done) {
work - edit files using your favorite editor.
run "git commit -a" to commit all changes.
}
TIP! use "git add ." before commit to add new files.
--- example comment, notice the short first line w/topic ---
topic: short comment
<blank line>
longer comments over several
lines...
-----
3. Next you need to make sure that your patches
are on top of the latest stuff on the server and
that there are no conflicts.
git pull --rebase
4. Generate the patch files. This will generate
patches for all commits that are on top of
the latest stuff on the server:
git format-patch origin/master
5. Email the patches to openocd-development@lists.berlios.de

View File

@@ -2,6 +2,9 @@
# have all needed files, that a GNU package needs
AUTOMAKE_OPTIONS = gnu 1.6
# make sure we pass the correct jimtcl flags to distcheck
DISTCHECK_CONFIGURE_FLAGS = --with-jim-ext=nvp --disable-lineedit
nobase_dist_pkgdata_DATA = \
contrib/libdcc/dcc_stdio.c \
contrib/libdcc/dcc_stdio.h \
@@ -9,11 +12,23 @@ nobase_dist_pkgdata_DATA = \
contrib/libdcc/README \
contrib/openocd.udev
SUBDIRS = src doc
if INTERNAL_JIMTCL
SUBDIRS = jimtcl
else
SUBDIRS =
endif
SUBDIRS += src doc
EXTRA_DIST = \
BUGS \
HACKING \
NEWTAPS \
PATCHES.txt \
README.Win32 \
Doxyfile.in \
tools/logger.pl
tools/logger.pl \
contrib/loaders
libtool: $(LIBTOOL_DEPS)
$(SHELL) ./config.status --recheck
@@ -26,6 +41,7 @@ Doxyfile: $(srcdir)/Doxyfile.in
echo "### @@@ -= DO NOT EDIT THIS FILE =- @@@ ###" && \
echo "### @@@ Make changes to Doxyfile.in @@@ ###" && \
sed -e 's,@srcdir\@,$(srcdir),' \
-e 's,@builddir\@,$(builddir),' \
-e 's,@doxygen_as_html\@,$(doxygen_as_html),' \
-e 's,@doxygen_as_pdf\@,$(doxygen_as_pdf),' $< \
) > $@
@@ -68,10 +84,10 @@ install-data-hook:
uninstall-hook:
rm -rf $(DESTDIR)$(pkgdatadir)/scripts
distclean-local:
rm -rf Doxyfile doxygen
rm -f $(srcdir)/jimtcl/configure.gnu
DISTCLEANFILES = doxygen.log
MAINTAINERCLEANFILES = \

98
NEWS
View File

@@ -1,72 +1,65 @@
This file includes highlights of the changes made in the
OpenOCD 0.4.0 source archive release. See the repository
OpenOCD 0.5.0 source archive release. See the repository
history for details about what changed, including bugfixes
and other issues not mentioned here.
JTAG Layer:
Support KT-Link JTAG adapter.
New driver for "Bus Pirate"
Rename various commands so they're not JTAG-specific
There are migration procedures for most of these, but you should
convert your scripts to the new names, since those procedures
will not be around forever.
jtag jinterface ... is now adapter_name
jtag_khz ... is now adapter_khz
jtag_nsrst_delay ... is now adapter_nsrst_delay
jtag_nsrst_assert_width ... is now adapter_nsrst_assert_width
Support Voipac VPACLink JTAG Adapter.
Boundary Scan:
Transport framework core ... supporting future work for SWD, SPI, and other
non-JTAG ways to debug targets or program flash.
Target Layer:
General
- new "reset-assert" event, for systems without SRST
ARM
- renamed "armv4_5" command prefix as "arm"
- recognize TrustZone "Secure Monitor" mode
- "arm regs" command output changed
- register names use "sp" not "r13"
- add top-level "mcr" and "mrc" commands, replacing
various core-specific operations
- basic semihosting support
ARM11
- Preliminary ETM and ETB hookup
- accelerated "flash erase_check"
- accelerated GDB memory checksum
- support "arm regs" command
- can access all core modes and registers
- watchpoint support
Cortex-A8
- support "arm regs" command
- can access all core modes and registers
- supports "reset-assert" event (used on OMAP3530)
- watchpoint support
Cortex-M3
- Exposed DWT registers like cycle counter
ETM, ETB
- "trigger_percent" command moved ETM --> ETB
- "etm trigger_debug" command added
Freescale DSP563xx cores (partial support)
ARM:
- basic semihosting support for ARMv7M.
- renamed "armv7m" command prefix as "arm"
MIPS:
- "ejtag_srst" variant removed. The same functionality is
obtained by using "reset_config none".
- added PIC32MX software reset support, this means srst is not
required to be connected anymore.
OTHER:
- preliminary AVR32 AP7000 support.
Flash Layer:
'flash bank' and 'nand device' take <bank_name> as first argument.
With this, flash/NAND commands allow referencing banks by name:
- <bank_name>: reference the bank with its defined name
- <driver_name>[.N]: reference the driver's Nth bank
New 'nand verify' command to check bank against an image file.
The "flash erase_address" command now rejects partial sectors;
previously it would silently erase extra data.
New at91sam9 NAND controller driver.
New "stellaris recover" command, implements the procedure
to recover locked devices (restoring non-volatile
state to the factory defaults, including erasing
the flash and its protection bits, and possibly
re-enabling hardware debugging).
PIC32MX now uses algorithm for flash programming, this
has increased the performance by approx 96%.
New 'pic32mx unlock' cmd to remove readout protection.
New STM32 Value Line Support.
New 'virtual' flash driver, used to associate other addresses
with a flash bank. See pic32mx.cfg for usage.
New iMX27 NAND flash controller driver.
Board, Target, and Interface Configuration Scripts:
ARM9
- ETM and ETB hookup for iMX2* targets
Add $HOME/.openocd to the search path.
Support IAR LPC1768 kickstart board (by Olimex)
Support Voipac PXA270/PXA270M module.
New $PARPORTADDR tcl variable used to change default
parallel port address used.
Remove lm3s811.cfg; use "stellaris.cfg" instead
Core Jim/TCL Scripting:
New 'usage' command to provide terse command help.
Improved command 'help' command output (sorted and indented).
Improved command handling:
- Most boolean settings now accept any of the following:
on/off, enable/disable, true/false, yes/no, 1/0
- More error checking and reporting.
New "add_script_search_dir" command, behaviour is the same
as the "-s" cmd line option.
Documentation:
New built-in command development documentation and primer.
Build and Release:
Use --enable-doxygen-pdf to build PDF developer documentation.
Consider upgrading to libftdi 0.17 if you use that library; it
includes bugfixes which improve FT2232H support.
For more details about what has changed since the last release,
see the git repository history. With gitweb, you can browse that
@@ -77,4 +70,5 @@ For older NEWS, see the NEWS files associated with each release
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES files in the source archive).
the BUGS and PATCHES.txt files in the source archive).

View File

@@ -9,7 +9,7 @@ must past stricter value checks, and many more error conditions have
been handled correctly. These efforts helped to make the 0.2.0 release
more stable and robust, though some changes may expose latent bugs in
your existing configuration scripts.
This release does not maintain backward compatibility in all respects,
so some target or configuration scripts may need to be updated. In some
cases, you may also see warnings; resolve those, because they indicate
@@ -20,7 +20,7 @@ The following areas of OpenOCD functionality changed in this release:
JTAG Layer:
- Improves modularity: core, TCL, driver commands, and interface have
been separated, encapsulated, and documented for developers. Mostly.
- Improves JTAG TAP transition tables:
- Improves JTAG TAP transition tables:
* Makes TAP paths variable length, rather than being fixed at 7 steps.
* Fixes problems with some targets that did not like longer paths.
- Improves JTAG driver/minidriver modularity and encapsulation.

98
NEWS-0.4.0 Normal file
View File

@@ -0,0 +1,98 @@
This file includes highlights of the changes made in the
OpenOCD 0.4.0 source archive release. See the repository
history for details about what changed, including bugfixes
and other issues not mentioned here.
JTAG Layer:
Support KT-Link JTAG adapter.
Support USB-JTAG, Altera USB-Blaster and compatibles.
Boundary Scan:
Target Layer:
General
- Removed commands which have been obsolete for at least
a year (from both documentation and, sometimes, code).
- new "reset-assert" event, for systems without SRST
ARM
- supports "reset-assert" event (except on Cortex-M3)
- renamed "armv4_5" command prefix as "arm"
- recognize TrustZone "Secure Monitor" mode
- "arm regs" command output changed
- register names use "sp" not "r13"
- add top-level "mcr" and "mrc" commands, replacing
various core-specific operations
- basic semihosting support (ARM7/ARM9 only, for now)
ARM11
- Should act much more like other ARM cores:
* Preliminary ETM and ETB hookup
* accelerated "flash erase_check"
* accelerated GDB memory checksum
* support "arm regs" command
* can access all core modes and registers
* watchpoint support
- Shares some core debug code with Cortex-A8
Cortex-A8
- Should act much more like other ARM cores:
* support "arm regs" command
* can access all core modes and registers
* watchpoint support
- Shares some core debug code with ARM11
Cortex-M3
- Exposed DWT registers like cycle counter
- vector_catch settings not clobbered by resets
- no longer interferes with firmware's fault handling
ETM, ETB
- "trigger_percent" command moved ETM --> ETB
- "etm trigger_debug" command added
MIPS
- use fastdata writes
Freescale DSP563xx cores (partial support)
Flash Layer:
'flash bank' and 'nand device' take <bank_name> as first argument.
With this, flash/NAND commands allow referencing banks by name:
- <bank_name>: reference the bank with its defined name
- <driver_name>[.N]: reference the driver's Nth bank
New 'nand verify' command to check bank against an image file.
The "flash erase_address" command now rejects partial sectors;
previously it would silently erase extra data. If you
want to erase the rest of the first and/or last sectors
instead of failing, you must pass an explicit "pad" flag.
New at91sam9 NAND controller driver.
New s3c64xx NAND controller driver.
Board, Target, and Interface Configuration Scripts:
ARM9
- ETM and ETB hookup for iMX2* targets
Add $HOME/.openocd to the search path.
Handle Rev C of LM3S811 eval boards.
- use "luminary-lm3s811.cfg" for older boards
- use "luminary.cfg" for RevC and newer
Core Jim/TCL Scripting:
New 'usage' command to provide terse command help.
Improved command 'help' command output (sorted and indented).
Improved command handling:
- Most boolean settings now accept any of the following:
on/off, enable/disable, true/false, yes/no, 1/0
- More error checking and reporting.
Documentation:
New built-in command development documentation and primer.
Build and Release:
Use --enable-doxygen-pdf to build PDF developer documentation.
Consider upgrading to libftdi 0.17 if you use that library; it
includes bugfixes which improve FT2232H support.
For more details about what has changed since the last release,
see the git repository history. With gitweb, you can browse that
in various levels of detail.
For older NEWS, see the NEWS files associated with each release
(i.e. NEWS-<version>).
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES.txt files in the source archive).

12
NEWTAPS
View File

@@ -30,7 +30,7 @@ Version Number Changes:
not a big deal. Please do report this information. We'd like to
know about it.
For example
For example
Error: ERROR: Tap: s3c4510.cpu - Expected id: 0x3f0f0f0f, Got: 0x1f0f0f0f
Error: ERROR: expected: mfg: 0x787, part: 0xf0f0, ver: 0x3
@@ -39,7 +39,7 @@ Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x1
========================================
Updating the Tap ID number your self
Why do this? You just want the warning to go away. And don't want
to update your version/instance of OpenOCD.
@@ -79,11 +79,11 @@ Examples:
0x3f0f0f0f - is a newer ARM7TDMI
0x3ba00477 - is an ARM cortex M3
Some chips have multiple JTAG taps - be sure to list
Some chips have multiple JTAG taps - be sure to list
each one individually - ORDER is important!
========================================
B) The maker of the part
B) The maker of the part
Examples:
Xilinx, Atmel, ST Micro Systems, Freescale
@@ -94,7 +94,7 @@ C) The family of parts it belongs to
Examples:
"NXP LPC Series"
"Atmel SAM7 Series"
========================================
D) The actual part number on the package
@@ -121,7 +121,7 @@ For example: A consumer GPS unit or a cellphone
ie: Olimex, LogicPD, Freescale(eval board)
========================================
(G) Identifying information on the board.
Not good: "iar red ST eval board"

View File

@@ -32,7 +32,7 @@ in response to feedback.
Add yourself to the GPL copyright for non-trivial changes.
To create a patch from the command line:
@code
@code
git diff >mypatch.txt
@endcode

10
README
View File

@@ -64,8 +64,8 @@ you can build the in-tree documentation.
Installing OpenOCD
==================
On Linux, you may have permissions problems to address. The best
way to do this is to use the contrib/udev.rules file. It probably
On Linux, you may have permissions problems to address. The best way
to do this is to use the contrib/openocd.udev rules file. It probably
belongs somewhere in /etc/udev/rules.d, but consult your operating
system documentation to be sure. In particular, make sure that it
matches the syntax used by your operating system's version of udev.
@@ -236,6 +236,8 @@ options may be available there:
Programmer
--enable-rlink Enable building support for the Raisonance RLink
JTAG Programmer
--enable-ulink Enable building support for the Keil ULINK JTAG
Programmer
--enable-usbprog Enable building support for the usbprog JTAG
Programmer
--enable-vsllink Enable building support for the Versaloon-Link JTAG
@@ -255,8 +257,6 @@ options may be available there:
--enable-ioutil Enable ioutil functions - useful for standalone
OpenOCD implementations
--enable-httpd Enable builtin httpd server - useful for standalone
OpenOCD implementations
--disable-doxygen-html Disable building Doxygen manual as HTML.
--enable-doxygen-pdf Enable building Doxygen manual as PDF.
@@ -317,7 +317,7 @@ The libftdi source code can be download from the following website:
For both Linux and Windows, both libusb and libftdi must be built and
installed. To use the newer FT2232H chips, supporting RTCK and USB high
speed (480 Mbps), you need libftdi version 0.16 or newer. Many Linux
speed (480 Mbps), use libftdi version 0.17 or newer. Many Linux
distributions provide suitable packages for these libraries.
For Windows, libftdi is supported with versions 0.14 and later.

View File

@@ -27,8 +27,8 @@ based JTAG debuggers.
http://sourceforge.net/projects/libusb-win32/
You need to download the libusb-win32-device-bin-0.1.12.2.tar.gz
package. Extract this file into a temp directory.
You need to download the libusb-win32-device-bin-0.1.12.2.tar.gz
package. Extract this file into a temp directory.
Copy the file libusb-win32-device-bin-0.1.12.2\include\usb.h
to your MinGW include directory.
@@ -59,10 +59,10 @@ released source tarball or the git tree.
If you are using the git tree, the following are the instructions from
README.mingw. You will need to have the cmake utility installed.
- Edit Toolchain-mingw32.cmake to point to the correct MinGW
- Edit Toolchain-mingw32.cmake to point to the correct MinGW
installation.
- Create a build directory like "mkdir build-win32", e.g in ../libftdi/
- cd into that directory and run
- cd into that directory and run
"cmake -DCMAKE_TOOLCHAIN_FILE=../Toolchain-mingw32.cmake .."
- Copy src/ftdi.h to your MinGW include directory.
- Copy build-win32/src/*.a to your MinGW lib directory.

42
TODO
View File

@@ -27,8 +27,8 @@ This section provides possible things to improve with OpenOCD's TCL support.
parameters. Currently variables assigned through one such parameter
command/script are unset before the next one is invoked.
- Isolate all TCL command support:
- Pure C CLI implementations using --disable-builtin-tcl.
- Isolate all TCL command support:
- Pure C CLI implementations using --disable-builtin-tcl.
- Allow developers to build new dongles using OpenOCD's JTAG core.
- At first, provide only low-level JTAG support; target layer and
above rely heavily on scripting event mechanisms.
@@ -112,7 +112,7 @@ TCP/IP packets handled by the server.
@section thelistswd Serial Wire Debug
- implement Serial Wire Debug interface
- implement Serial Wire Debug interface
@section thelistbs Boundary Scan Support
@@ -142,6 +142,8 @@ Once the above are completed:
https://lists.berlios.de/pipermail/openocd-development/2009-May/006590.html
- regression: "reset halt" between 729(works) and 788(fails): @par
https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
- registers
- add flush-value operation, call them all on resume/reset
- mcr/mrc target->type support
- missing from ARM920t, ARM966e, XScale.
It's possible that the current syntax is unable to support read-modify-write
@@ -163,17 +165,25 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
use hardware stepping if available.
- mdb can return garbage data if read byte operation fails for
a memory region(16 & 32 byte access modes may be supported). Is this
a bug in the .MX31 PDK init script? Try on i.MX31 PDK:
a bug in the .MX31 PDK init script? Try on i.MX31 PDK:
mdw 0xb80005f0 0x8, mdh 0xb80005f0 0x10, mdb 0xb80005f0 0x20. mdb returns
garabage.
- implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
- Thumb2 single stepping: ARM1156T2 needs simulator support
- Cortex A8 support (ML)
- add target implementation (ML)
- Cortex M3 support
- when stepping, only write dirtied registers (be faster)
- when connecting to halted core, fetch registers (startup is quirky)
- Generic ARM run_algorithm() interface
- tagged struct wrapping ARM instructions and metadata
- not revision-specific (current: ARMv4+ARMv5 -or- ARMv6 -or- ARMv7)
- usable with at least arm_nandwrite() and generic CFI drivers
- ETM
- don't show FIFOFULL registers if they're not supported
- use comparators to get more breakpoints and watchpoints
- add "etm drivers" command
- trace driver init() via examine() paths only, not setup()/reset
- MC1322x support (JW/DE?)
- integrate and test support from JW (and DE?)
- get working with a known good interface (i.e. not today's jlink)
@@ -197,8 +207,8 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
@section thelistsvf SVF/XSVF
- develop SVF unit tests
- develop XSVF unit tests
- develop SVF unit tests
- develop XSVF unit tests
@section thelistflash Flash Support
@@ -209,6 +219,16 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
- ocl
- str9xpec
- Don't expect writing all-ones to be a safe way to write without
changing bit values. Minimally it loses on flash modules with
internal ECC, where it may change the ECC.
- NOR flash_write_unlock() does that between sectors
- there may be other cases too
- Make sure all commands accept either a bank name or a bank number,
and be sure both identifiers show up in "flash banks" and "nand list".
Right now the user-friendly names are pretty much hidden...
@subsection thelistflashcfi CFI
- finish implementing bus width/chip width handling (suggested by NC)
@@ -328,7 +348,7 @@ at the bottom of the list below. Example, on amd64:
from unaligned memory addresses
- libopenocd support: @par
https://lists.berlios.de/pipermail/openocd-development/2009-May/006405.html
- review and clean up interface/target/flash APIs
- review and clean up interface/target/flash APIs
The following strategic tasks will require ambition, knowledge, and time
to complete:
@@ -346,9 +366,11 @@ to complete:
- Develop milestone and release guidelines, processes, and scripts.
- Develop "style" guidelines (and scripts) for maintainers:
- reviewing patches
- committing to Subversion
- Review The Guide for OpenOCD Users for documentation errors or omissions
- Update The Manual for OpenOCD Developers:
- committing to git
- Review Users' Guide for documentation errors or omissions
- "capture" and "ocd_find" commands
- "ocd_" prefix on various stuff
- Update Developer's Manual (doxygen output)
- Add documentation describing the architecture of each module
- Provide more Technical Primers to bootstrap contributor knowledge

View File

@@ -1,16 +1,24 @@
#!/bin/sh -e
#!/bin/sh
# Run the autotools bootstrap sequence to create the configure script
# Stop execution as soon as we have an unknown command
# Abort execution on error
set -e
if libtoolize --version >/dev/null 2>&1; then
libtoolize="libtoolize"
elif glibtoolize --version >/dev/null 2>&1; then
libtoolize="glibtoolize"
if which libtoolize > /dev/null; then
libtoolize="libtoolize"
elif which glibtoolize >/dev/null; then
libtoolize="glibtoolize"
else
echo "libtool is required" >&2
exit 1
echo "$0: Error: libtool is required" >&2
exit 1
fi
if [ "$1" = "nosubmodule" ]; then
SKIP_SUBMODULE=1
elif [ -n "$1" ]; then
echo "$0: Illegal argument $1"
echo "USAGE: $0 [nosubmodule]"
exit 1
fi
# bootstrap the autotools
@@ -26,4 +34,14 @@ automake --gnu --add-missing --copy
# AM_MAINTAINER_MODE requires --enable-maintainer-mode from everyone using
# current source snapshots (working from GIT, or some source snapshot, etc)
# otherwise the documentation will fail to build due to missing version.texi
echo "Bootstrap complete; you can './configure --enable-maintainer-mode ....'"
if [ -n "$SKIP_SUBMODULE" ]; then
echo "Skipping submodule setup"
else
echo "Setting up submodules"
git submodule init
git submodule update
fi
echo "Bootstrap complete. Quick build instructions:"
echo "./configure --enable-maintainer-mode ...."

11
common.mk Normal file
View File

@@ -0,0 +1,11 @@
# common flags used in openocd build
AM_CPPFLAGS = -I$(top_srcdir)/src \
-I$(top_builddir)/src \
-DPKGDATADIR=\"$(pkgdatadir)\" \
-DPKGLIBDIR=\"$(pkglibdir)\"
if INTERNAL_JIMTCL
AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
-I$(top_builddir)/jimtcl
endif

27
config_subdir.m4 Normal file
View File

@@ -0,0 +1,27 @@
dnl
dnl If needed, define the m4_ifblank and m4_ifnblank macros from autoconf 2.64
dnl This allows us to run with earlier Autoconfs as well.
ifdef([m4_ifblank],[],[
m4_define([m4_ifblank],
[m4_if(m4_translit([[$1]], [ ][ ][
]), [], [$2], [$3])])])
dnl
ifdef([m4_ifnblank],[],[
m4_define([m4_ifnblank],
[m4_if(m4_translit([[$1]], [ ][ ][
]), [], [$3], [$2])])])
dnl
dnl AC_CONFIG_SUBDIRS does not allow configure options to be passed
dnl to subdirs, this function allows that by creating a configure.gnu
dnl script that prepends configure options and then calls the real
dnl configure script
AC_DEFUN([AX_CONFIG_SUBDIR_OPTION],
[
AC_CONFIG_SUBDIRS([$1])
m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu],
[printf "#!/bin/sh
"\$"SHELL "../$srcdir/$1/configure" $2 \""\$"@"\" > "$srcdir/$1/configure.gnu"
])
])

View File

@@ -1,8 +1,10 @@
AC_PREREQ(2.60)
AC_INIT([openocd], [0.4.0-rc1],
AC_INIT([openocd], [0.5.0-dev],
[OpenOCD Mailing List <openocd-development@lists.berlios.de>])
AC_CONFIG_SRCDIR([src/openocd.c])
m4_include(config_subdir.m4)dnl
AM_INIT_AUTOMAKE([-Wall -Wno-portability dist-bzip2 dist-zip])
AM_MAINTAINER_MODE
@@ -392,6 +394,14 @@ AC_ARG_ENABLE(ft2232_ftd2xx,
AS_HELP_STRING([--enable-ft2232_ftd2xx], [Enable building support for FT2232 based devices using the FTD2XX driver from ftdichip.com]),
[build_ft2232_ftd2xx=$enableval], [build_ft2232_ftd2xx=no])
AC_ARG_ENABLE(usb_blaster_libftdi,
AS_HELP_STRING([--enable-usb_blaster_libftdi], [Enable building support for the Altera USB-Blaster using the libftdi driver, opensource alternate of FTD2XX]),
[build_usb_blaster_libftdi=$enableval], [build_usb_blaster_libftdi=no])
AC_ARG_ENABLE(usb_blaster_ftd2xx,
AS_HELP_STRING([--enable-usb_blaster_ftd2xx], [Enable building support for the Altera USB-Blaster using the FTD2XX driver from ftdichip.com]),
[build_usb_blaster_ftd2xx=$enableval], [build_usb_blaster_ftd2xx=no])
AC_ARG_ENABLE(amtjtagaccel,
AS_HELP_STRING([--enable-amtjtagaccel], [Enable building the Amontec JTAG-Accelerator driver]),
[build_amtjtagaccel=$enableval], [build_amtjtagaccel=no])
@@ -400,6 +410,10 @@ AC_ARG_ENABLE(ecosboard,
AS_HELP_STRING([--enable-ecosboard], [Enable building support for eCos based JTAG debugger]),
[build_ecosboard=$enableval], [build_ecosboard=no])
AC_ARG_ENABLE(zy1000_master,
AS_HELP_STRING([--enable-zy1000-master], [Use ZY1000 JTAG master registers]),
[build_zy1000_master=$enableval], [build_zy1000_master=no])
AC_ARG_ENABLE(zy1000,
AS_HELP_STRING([--enable-zy1000], [Enable ZY1000 interface]),
[build_zy1000=$enableval], [build_zy1000=no])
@@ -408,10 +422,6 @@ AC_ARG_ENABLE(ioutil,
AS_HELP_STRING([--enable-ioutil], [Enable ioutil functions - useful for standalone OpenOCD implementations]),
[build_ioutil=$enableval], [build_ioutil=no])
AC_ARG_ENABLE(httpd,
AS_HELP_STRING([--enable-httpd], [Enable builtin httpd server - useful for standalone OpenOCD implementations]),
[build_httpd=$enableval], [build_httpd=no])
case "${host_cpu}" in
arm*)
AC_ARG_ENABLE(ep93xx,
@@ -462,14 +472,25 @@ AC_ARG_ENABLE(rlink,
AS_HELP_STRING([--enable-rlink], [Enable building support for the Raisonance RLink JTAG Programmer]),
[build_rlink=$enableval], [build_rlink=no])
AC_ARG_ENABLE(ulink,
AS_HELP_STRING([--enable-ulink], [Enable building support for the Keil ULINK JTAG Programmer]),
[build_ulink=$enableval], [build_ulink=no])
AC_ARG_ENABLE(arm-jtag-ew,
AS_HELP_STRING([--enable-arm-jtag-ew], [Enable building support for the Olimex ARM-JTAG-EW Programmer]),
[build_armjtagew=$enableval], [build_armjtagew=no])
AC_ARG_ENABLE(buspirate,
AS_HELP_STRING([--enable-buspirate], [Enable building support for the Buspirate]),
[build_buspirate=$enableval], [build_buspirate=no])
AC_ARG_ENABLE(minidriver_dummy,
AS_HELP_STRING([--enable-minidriver-dummy], [Enable the dummy minidriver.]),
[build_minidriver_dummy=$enableval], [build_minidriver_dummy=no])
AC_ARG_ENABLE(internal-jimtcl,
AS_HELP_STRING([--disable-internal-jimtcl], [Disable building internal jimtcl]),
[use_internal_jimtcl=$enableval], [use_internal_jimtcl=yes])
build_minidriver=no
AC_MSG_CHECKING([whether to enable ZY1000 minidriver])
@@ -521,7 +542,7 @@ case $host in
is_win32=yes
parport_use_ppdev=no
AC_COMPILE_IFELSE(AC_LANG_PROGRAM([],[return __MINGW32__;]),
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [[return __MINGW32__;]])],
[is_mingw=yes],[is_mingw=no])
if test $is_mingw = yes; then
AC_DEFINE(IS_MINGW, 1, [1 if building for MinGW.])
@@ -551,7 +572,7 @@ case $host in
AC_MSG_WARN([--disable-parport-giveio is not supported by MinGW32 hosts])
fi
parport_use_giveio=yes
CFLAGS="$CFLAGS -D__USE_MINGW_ANSI_STDIO"
AC_DEFINE(IS_MINGW, 1, [1 if building for MinGW.])
@@ -614,6 +635,12 @@ else
AC_DEFINE(BUILD_ZY1000, 0, [0 if you don't want ZY1000.])
fi
if test $build_zy1000_master = yes; then
AC_DEFINE(BUILD_ZY1000_MASTER, 1, [1 if you want ZY1000 JTAG master registers.])
else
AC_DEFINE(BUILD_ZY1000_MASTER, 0, [0 if you don't want ZY1000 JTAG master registers.])
fi
if test $build_at91rm9200 = yes; then
build_bitbang=yes
AC_DEFINE(BUILD_AT91RM9200, 1, [1 if you want at91rm9200.])
@@ -651,6 +678,20 @@ else
AC_DEFINE(BUILD_FT2232_FTD2XX, 0, [0 if you don't want ftd2xx ft2232.])
fi
if test $build_usb_blaster_libftdi = yes; then
build_bitbang=yes
AC_DEFINE(BUILD_USB_BLASTER_LIBFTDI, 1, [1 if you want libftdi usb_blaster.])
else
AC_DEFINE(BUILD_USB_BLASTER_LIBFTDI, 0, [0 if you don't want libftdi usb_blaster.])
fi
if test $build_usb_blaster_ftd2xx = yes; then
build_bitbang=yes
AC_DEFINE(BUILD_USB_BLASTER_FTD2XX, 1, [1 if you want ftd2xx usb_blaster.])
else
AC_DEFINE(BUILD_USB_BLASTER_FTD2XX, 0, [0 if you don't want ftd2xx usb_blaster.])
fi
if test $build_amtjtagaccel = yes; then
AC_DEFINE(BUILD_AMTJTAGACCEL, 1, [1 if you want the Amontec JTAG-Accelerator driver.])
else
@@ -713,12 +754,32 @@ else
AC_DEFINE(BUILD_RLINK, 0, [0 if you don't want the RLink JTAG driver.])
fi
if test $build_ulink = yes; then
AC_DEFINE(BUILD_ULINK, 1, [1 if you want the ULINK JTAG driver.])
else
AC_DEFINE(BUILD_ULINK, 0, [0 if you don't want the ULINK JTAG driver.])
fi
if test $build_armjtagew = yes; then
AC_DEFINE(BUILD_ARMJTAGEW, 1, [1 if you want the ARM-JTAG-EW JTAG driver.])
else
AC_DEFINE(BUILD_ARMJTAGEW, 0, [0 if you don't want the ARM-JTAG-EW JTAG driver.])
fi
if test $build_buspirate = yes; then
AC_DEFINE(BUILD_BUSPIRATE, 1, [1 if you want the Buspirate JTAG driver.])
else
AC_DEFINE(BUILD_BUSPIRATE, 0, [0 if you don't want the Buspirate JTAG driver.])
fi
if test "$use_internal_jimtcl" = yes; then
if test -f "$srcdir/jimtcl/configure.ac"; then
AX_CONFIG_SUBDIR_OPTION([jimtcl], [--with-jim-ext=nvp --disable-lineedit])
else
AC_MSG_ERROR([jimtcl not found, run git submodule init and git submodule update.])
fi
fi
#-- Deal with MingW/Cygwin FTD2XX issues
if test $is_win32 = yes; then
@@ -727,7 +788,7 @@ then
AC_MSG_ERROR([The option: with_ftd2xx_linux_tardir is for LINUX only.])
fi
if test $build_ft2232_ftd2xx = yes -o $build_presto_ftd2xx = yes ; then
if test $build_ft2232_ftd2xx = yes -o $build_presto_ftd2xx = yes -o $build_usb_blaster_ftd2xx = yes ; then
AC_MSG_CHECKING([for ftd2xx.lib exists (win32)])
# if we are given a zipdir...
@@ -867,22 +928,17 @@ _CFLAGS=`eval echo $CFLAGS`
LDFLAGS=$_LDFLAGS
CFLAGS=$_CFLAGS
AC_RUN_IFELSE([
AC_RUN_IFELSE([AC_LANG_PROGRAM([[
#include "confdefs.h"
#if IS_WIN32
#include "windows.h"
#endif
#include <stdio.h>
#include <ftd2xx.h>
int
main( int argc, char **argv )
{
]], [[
DWORD x;
FT_GetLibraryVersion( &x );
return 0;
}
], [
]])], [
AC_MSG_RESULT([Success!])
], [
AC_MSG_ERROR([Cannot build & run test program using ftd2xx.lib])
@@ -891,15 +947,16 @@ main( int argc, char **argv )
])
AC_MSG_CHECKING([for ftd2xx highspeed device support])
AC_COMPILE_IFELSE([
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#include "confdefs.h"
#if IS_WIN32
#include "windows.h"
#endif
#include <stdio.h>
#include <ftd2xx.h>
DWORD x = FT_DEVICE_4232H;
], [
]], [])], [
AC_DEFINE(BUILD_FT2232_HIGHSPEED, [1],
[Support FT2232H/FT4232HS with FTD2XX or libftdi.])
build_ft2232_highspeed=yes
@@ -931,13 +988,10 @@ if test $build_ft2232_libftdi = yes ; then
LDFLAGS=$_LDFLAGS
CFLAGS=$_CFLAGS
AC_RUN_IFELSE([
AC_RUN_IFELSE([AC_LANG_PROGRAM([[
#include <stdio.h>
#include <ftdi.h>
int
main( int argc, char **argv )
{
]], [[
struct ftdi_context *p;
p = ftdi_new();
if( p != NULL ){
@@ -946,8 +1000,7 @@ main( int argc, char **argv )
fprintf( stderr, "calling ftdi_new() failed\n");
return 1;
}
}
], [
]])], [
AC_MSG_RESULT([Success])
], [
AC_MSG_ERROR([Cannot build & run test program using libftdi])
@@ -956,11 +1009,12 @@ main( int argc, char **argv )
])
AC_MSG_CHECKING([for libftdi highspeed device support])
AC_COMPILE_IFELSE([
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#include <stdio.h>
#include <ftdi.h>
]], [[
enum ftdi_chip_type x = TYPE_2232H;
], [
]])], [
AC_DEFINE(BUILD_FT2232_HIGHSPEED, [1],
[Support FT2232H/FT4232HS with FTD2XX or libftdi.])
build_ft2232_highspeed=yes
@@ -981,7 +1035,7 @@ fi
# check for usb.h when a driver will require it
build_usb=no
if test $build_jlink = yes -o $build_vsllink = yes -o $build_usbprog = yes -o \
$build_rlink = yes -o $build_armjtagew = yes
$build_rlink = yes -o $build_ulink = yes -o $build_armjtagew = yes
then
AC_CHECK_HEADERS([usb.h],[],
[AC_MSG_ERROR([usb.h is required to build some OpenOCD driver(s)])])
@@ -995,12 +1049,14 @@ AM_CONDITIONAL(GIVEIO, test x$parport_use_giveio = xyes)
AM_CONDITIONAL(EP93XX, test $build_ep93xx = yes)
AM_CONDITIONAL(ECOSBOARD, test $build_ecosboard = yes)
AM_CONDITIONAL(ZY1000, test $build_zy1000 = yes)
AM_CONDITIONAL(ZY1000_MASTER, test $build_zy1000_master = yes)
AM_CONDITIONAL(IOUTIL, test $build_ioutil = yes)
AM_CONDITIONAL(HTTPD, test $build_httpd = yes)
AM_CONDITIONAL(AT91RM9200, test $build_at91rm9200 = yes)
AM_CONDITIONAL(BITBANG, test $build_bitbang = yes)
AM_CONDITIONAL(FT2232_LIBFTDI, test $build_ft2232_libftdi = yes)
AM_CONDITIONAL(FT2232_DRIVER, test $build_ft2232_ftd2xx = yes -o $build_ft2232_libftdi = yes)
AM_CONDITIONAL(USB_BLASTER_LIBFTDI, test $build_usb_blaster_libftdi = yes)
AM_CONDITIONAL(USB_BLASTER_DRIVER, test $build_usb_blaster_ftd2xx = yes -o $build_usb_blaster_libftdi = yes)
AM_CONDITIONAL(AMTJTAGACCEL, test $build_amtjtagaccel = yes)
AM_CONDITIONAL(GW16012, test $build_gw16012 = yes)
AM_CONDITIONAL(PRESTO_LIBFTDI, test $build_presto_libftdi = yes)
@@ -1010,7 +1066,9 @@ AM_CONDITIONAL(OOCD_TRACE, test $build_oocd_trace = yes)
AM_CONDITIONAL(JLINK, test $build_jlink = yes)
AM_CONDITIONAL(VSLLINK, test $build_vsllink = yes)
AM_CONDITIONAL(RLINK, test $build_rlink = yes)
AM_CONDITIONAL(ULINK, test $build_ulink = yes)
AM_CONDITIONAL(ARMJTAGEW, test $build_armjtagew = yes)
AM_CONDITIONAL(BUSPIRATE, test $build_buspirate = yes)
AM_CONDITIONAL(USB, test $build_usb = yes)
AM_CONDITIONAL(IS_CYGWIN, test $is_cygwin = yes)
AM_CONDITIONAL(IS_MINGW, test $is_mingw = yes)
@@ -1021,14 +1079,16 @@ AM_CONDITIONAL(BITQ, test $build_bitq = yes)
AM_CONDITIONAL(MINIDRIVER, test $build_minidriver = yes)
AM_CONDITIONAL(MINIDRIVER_DUMMY, test $build_minidriver_dummy = yes)
AM_CONDITIONAL(INTERNAL_JIMTCL, test $use_internal_jimtcl = yes)
# Look for environ alternatives. Possibility #1: is environ in unistd.h or stdlib.h?
AC_MSG_CHECKING([for environ in unistd.h and stdlib.h])
AC_COMPILE_IFELSE([
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#define _GNU_SOURCE
#include <unistd.h>
#include <stdlib.h>
int main(int argc, char **argv) { char **ep = environ; }
], [
]], [[char **ep = environ;]]
)], [
AC_MSG_RESULT([yes])
has_environ=yes
], [
@@ -1036,10 +1096,10 @@ int main(int argc, char **argv) { char **ep = environ; }
# Possibility #2: can environ be found in an available library?
AC_MSG_CHECKING([for extern environ])
AC_LINK_IFELSE([
extern char **environ;
int main(int argc, char **argv) { char **ep = environ; }
], [
AC_LINK_IFELSE([AC_LANG_PROGRAM([[
extern char **environ;
]], [[char **ep = environ;]]
)], [
AC_DEFINE(NEED_ENVIRON_EXTERN, [1], [Must declare 'environ' to use it.])
has_environ=yes
], [
@@ -1055,7 +1115,7 @@ fi
AC_DEFINE([_GNU_SOURCE],[1],[Use GNU C library extensions (e.g. stdndup).])
# set default gcc warnings
GCC_WARNINGS="-Wall -Wstrict-prototypes -Wformat-security"
GCC_WARNINGS="-Wall -Wstrict-prototypes -Wformat-security -Wshadow"
if test "${gcc_wextra}" = yes; then
GCC_WARNINGS="${GCC_WARNINGS} -Wextra -Wno-unused-parameter"
GCC_WARNINGS="${GCC_WARNINGS} -Wbad-function-cast"
@@ -1118,9 +1178,11 @@ AC_OUTPUT(dnl
src/helper/Makefile dnl
src/jtag/Makefile dnl
src/jtag/drivers/Makefile dnl
src/transport/Makefile dnl
src/xsvf/Makefile dnl
src/svf/Makefile dnl
src/target/Makefile dnl
src/rtos/Makefile dnl
src/server/Makefile dnl
src/flash/Makefile dnl
src/flash/nor/Makefile dnl

View File

@@ -0,0 +1,68 @@
+OpenOCD and CoreSight Tracing
+
Many recent ARM chips (Using e..g. Cortex-M3 and
Cortex-M4 cores) support CoreSight debug/trace.
This note sketches an approach currently planned for those cores
with OpenOCD.
This tracing data can help debug and tune ARM software, but not
all cores support tracing. Some support more extensive tracing
other cores with trace support +should be able to use the same
approach and maybe some of the same analysis code.
+the Cortex-M3 is assumed here to be the
+core in use, for simplicity and to reflect current OpenOCD users.
This note summarizes a software model to generate, collect, and
analyze such trace data . That is not fully implemented as of early
January 2011, +and thus is not *yet* usable.
+
+
+Some microcontroller cores support a low pin-count Single-wire trace,
with a mode where +trace data is emitted (usually to a UART. To use
this mode, +SWD must be in use.
+At this writing, OpenOCD SWD support is not yet complete either.
(There are also multi-wire trace ports requiring more complex debug
adapters than OpenOCD currently supports, and offering richer data.
+
+
+* ENABLING involves activating SWD and (single wire) trace.
+
+current expectations are that OpenOCD itself will handle enabling;
activating single wire trace involves a debug adapter interaction, and
collecting that trace data requires particular (re)wiring.
+
+* CONFIGURATION involves setting up ITM and/or ETM modules to emit the
+desired data from the Cortex core. (This might include dumping
+event counters printf-style messages; code profiling; and more. Not all
+cores offer the same trace capabilities.
+
+current expectations are that Tcl scripts will be used to configure these
+modules for the desired tracing, by direct writes to registers. In some
+cases (as with RTOS event tracking and similar messaging, this might
+be augmented or replaced by user code running on the ARM core.
+
+COLLECTION involves reading that trace data, probably through UART, and
+saving it in a useful format to analyse For now, deferred analysis modes
are assumed, not than real-time or interactive ones.
+
+
+current expectations are to to dump data in text using contrib/itmdump.c
+or derived tools, and to post-process it into reports. Such reports might
+include program messaging (such as application data streams via ITM, maybe
+using printf type messaging; code coverage analysis or so forth. Recent
+versions of CMSIS software reserve some ITM codespace for RTOS event
tracing and include ITM messaging support.
Clearly some of that data would be valuable for interactive debugging.
+
+Should someone get ambitious, GUI reports should be possible. GNU tools
+for simpler reports like gprof may be simpler to support at first.
+In any case, OpenOCD is not currently GUI-oriented. Accordingly, we now
+expect any such graphics to come from postprocessing.
measurments for RTOS event timings should also be easy to collect.
+Examples include context and message switch times, as well as times
for application interactions.
+

View File

@@ -0,0 +1,91 @@
#!/usr/bin/perl
# Automatically generates the StellarisParts struct in src/flash/nor/stellaris.c
# Uses the header files from TI/Luminary's StellarisWare complete Firmware Development Package
# available from: http://www.luminarymicro.com/products/software_updates.html
$comment = "// Autogenerated by contrib/gen-stellaris-part-header.pl
// From Stellaris Firmware Development Package revision";
$struct_header = "static struct {
uint32_t partno;
const char *partname;
} StellarisParts[] =
{
";
$struct_footer = "\t{0,\"Unknown part\"}\n};\n";
$#ARGV == 1 || die "Usage: $0 <inc directory> <output file>\n";
-d $ARGV[0] || die $ARGV[0]." is not a directory\n";
$dir = $ARGV[0];
-f $ARGV[1] || die $ARGV[1]." is not a file\n";
$file = $ARGV[1];
print STDERR "Scanning $dir, Updating $file\n";
opendir(DIR, $dir) || die "can't open $dir: $!";
@files = readdir(DIR);
closedir(DIR);
@short_files = sort(grep(/lm3s...\.h/, @files));
@long_files = sort(grep(/lm3s....\.h/, @files));
$ver = 0;
$new_struct = $struct_header;
process_file(@short_files);
process_file(@long_files);
$new_struct .= $struct_footer;
$dump = "$comment $ver\n$new_struct";
{
local($/, *INPUT);
open(INPUT, $file) || die "can't open $file: $!";
$contents = <INPUT>;
close(INPUT);
}
$old_struct = qr/((^\/\/.*?\n)*)\Q$struct_header\E.*?$struct_footer/sm;
$contents =~ s/$old_struct/$dump/;
open(OUTPUT, ">$file") || die "can't open file $file for writing: $!";
print OUTPUT $contents;
close(OUTPUT);
sub process_file {
foreach $h_file (@_) {
($base) = ($h_file =~ m/lm3s(.{3,4})\.h/ig);
$base = uc($base);
local($/, *FILE);
open(FILE, "$dir/$h_file");
$content = <FILE>;
close(FILE);
$invalid = 0;
if ($content =~ /This is part of revision (\d+) of/) {
if ($ver != 0 and $ver != $1) {
print STDERR "File version mismatch: $ver != $1\n";
$ver = max($ver, $1);
} else {
$ver = $1;
}
}
if ($content =~ /SYSCTL_DID1_VER_[^M]\s+0x(\S+)/) {
$did1_ver = hex($1);
} else {
print STDERR "$h_file is missing SYSCTL_DID1_VER\n";
$did1_ver = 255;
$invalid = 1;
}
if ($content =~ /SYSCTL_DID1_PRTNO_$base\s+0x(\S+)/) {
$prtno = hex($1);
} else {
print STDERR "$h_file is missing SYSCTL_DID1_PRTNO\n";
$prtno = 0;
$invalid = 1;
}
$id = ($did1_ver | $prtno) >> 16;
$new_member = sprintf "{0x%04X,\"LM3S%s\"},", $id, $base;
if ($invalid == 1) {
#$new_struct .= "\t//$new_member\t// Invalid\n";
} else {
$new_struct .= "\t$new_member\n";
}
}
}

441
contrib/itmdump.c Normal file
View File

@@ -0,0 +1,441 @@
/*
* Copyright (C) 2010 by David Brownell
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or (at
* your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Simple utility to parse and dump ARM Cortex-M3 SWO trace output. Once the
* mechanisms work right, this information can be used for various purposes
* including profiling (particularly easy for flat PC-sample profiles) and
* for debugging.
*
* SWO is the Single Wire Output found on some ARM cores, most notably on the
* Cortex-M3. It combines data from several sources:
*
* - Software trace (ITM): so-called "printf-style" application messaging
* using "ITM stimulus ports"; and differential timestamps.
* - Hardware trace (DWT): for profiling counters and comparator matches.
* - TPIU may issue sync packets.
*
* The trace data format is defined in Appendix E, "Debug ITM and DWT packet
* protocol", of the ARMv7-M Architecture Reference Manual (DDI 0403C). It
* is a superset of the ITM data format from the Coresight TRM.
*
* The trace data has two encodings. The working assumption is that data
* gets into this program using the UART encoding.
*/
#include <errno.h>
#include <libgen.h>
#include <stdio.h>
#include <stdbool.h>
#include <string.h>
#include <unistd.h>
/* Example ITM trace word (0xWWXXYYZZ) parsing for task events, sent
* on port 31 (Reserved for "the" RTOS in CMSIS v1.30)
* WWXX: event code (0..3 pre-assigned, 4..15 reserved)
* YY: task priority
* ZZ: task number
*
* NOTE that this specific encoding could be space-optimized; and that
* trace data streams could also be history-sensitive.
*/
static void show_task(int port, unsigned data)
{
unsigned code = data >> 16;
char buf[16];
switch (code) {
case 0:
strcpy(buf, "run");
break;
case 1:
strcpy(buf, "block");
break;
case 2:
strcpy(buf, "create");
break;
case 3:
strcpy(buf, "destroy");
break;
/* 4..15 reserved for other infrastructure ops */
default:
sprintf(buf, "code %d", code);
break;
}
printf("TASK %d, pri %d: %s",
(data >> 0) & 0xff,
(data >> 8) & 0xff,
buf);
}
static void show_reserved(FILE *f, char *label, int c)
{
unsigned i;
printf("%s - %#02x", label, c);
for (i = 0; (c & 0x80) && i < 4; i++) {
c = fgetc(f);
if (c == EOF) {
printf("(ERROR %d - %s) ", errno, strerror(errno));
break;
}
printf(" %#02x", c);
}
printf("\n");
}
static bool read_varlen(FILE *f, int c, unsigned *value)
{
unsigned size;
unsigned char buf[4];
unsigned i;
*value = 0;
switch (c & 3) {
case 3:
size = 4;
break;
case 2:
size = 2;
break;
case 1:
size = 1;
break;
default:
printf("INVALID SIZE\n");
return false;
}
memset(buf, 0, sizeof buf);
if (fread(buf, 1, size, f) != size)
goto err;
*value = (buf[3] << 24)
+ (buf[2] << 16)
+ (buf[2] << 8)
+ (buf[0] << 0);
return true;
err:
printf("(ERROR %d - %s)\n", errno, strerror(errno));
return;
}
static void show_hard(FILE *f, int c)
{
unsigned type = c >> 3;
unsigned value;
unsigned size;
char *label;
printf("DWT - ", type);
if (!read_varlen(f, c, &value))
return;
printf("%#x", value);
switch (type) {
case 0: /* event counter wrapping */
printf("overflow %s%s%s%s%s%s",
(value & (1 << 5)) ? "cyc " : "",
(value & (1 << 4)) ? "fold " : "",
(value & (1 << 3)) ? "lsu " : "",
(value & (1 << 2)) ? "slp " : "",
(value & (1 << 1)) ? "exc " : "",
(value & (1 << 0)) ? "cpi " : "");
break;
case 1: /* exception tracing */
switch (value >> 12) {
case 1:
label = "entry to";
break;
case 2:
label = "exit from";
break;
case 3:
label = "return to";
break;
default:
label = "?";
break;
}
printf("%s exception %d", label, value & 0x1ff);
break;
case 2: /* PC sampling */
if (c == 0x15)
printf("PC - sleep");
else
printf("PC - %#08x", value);
break;
case 8: /* data tracing, pc value */
case 10:
case 12:
case 14:
printf("Data trace %d, PC %#08x", (c >> 4) & 3, value);
/* optionally followed by data value */
break;
case 9: /* data tracing, address offset */
case 11:
case 13:
case 15:
printf("Data trace %d, address offset %#04x",
(c >> 4) & 3, value);
/* always followed by data value */
break;
case 16 ... 23: /* data tracing, data value */
printf("Data trace %d, ", (c >> 4) & 3);
label = (c & 0x8) ? "write" : "read";
switch (c & 3) {
case 3:
printf("word %s, value %#08x", label, value);
break;
case 2:
printf("halfword %s, value %#04x", label, value);
break;
case 1:
printf("byte %s, value %#02x", label, value);
break;
}
break;
default:
printf("UNDEFINED");
break;
}
printf("\n");
return;
}
/*
* Table of SWIT (SoftWare InstrumentTation) message dump formats, for
* ITM port 0..31 application data.
*
* Eventually this should be customizable; all usage is application defined.
*
* REVISIT there can be up to 256 trace ports, via "ITM Extension" packets
*/
struct {
int port;
void (*show)(int port, unsigned data);
} format[] = {
{ .port = 31, .show = show_task, },
};
static void show_swit(FILE *f, int c)
{
unsigned size;
unsigned port = c >> 3;
unsigned char buf[4];
unsigned value = 0;
unsigned i;
printf("SWIT %u - ", port);
if (!read_varlen(f, c, &value))
return;
printf("%#08x", value);
for (i = 0; i <= sizeof(format) / sizeof(format[0]); i++) {
if (format[i].port == port) {
printf(", ");
format[i].show(port, value);
break;
}
}
printf("\n");
return;
err:
printf("(ERROR %d - %s)\n", errno, strerror(errno));
return;
}
static void show_timestamp(FILE *f, int c)
{
unsigned counter = 0;
char *label = "";
bool delayed = false;
printf("TIMESTAMP - ");
/* Format 2: header only */
if (!(c & 0x80)) {
switch (c) {
case 0: /* sync packet -- coding error! */
case 0x70: /* overflow -- ditto! */
printf("ERROR - %#02x\n", c);
break;
default:
/* synchronous to ITM */
counter = c >> 4;
goto done;
}
return;
}
/* Format 1: one to four bytes of data too */
switch (c) {
default:
label = ", reserved control\n";
break;
case 0xc:
/* synchronous to ITM */
break;
case 0xd:
label = ", timestamp delayed";
delayed = true;
break;
case 0xe:
label = ", packet delayed";
delayed = true;
break;
case 0xf:
label = ", packet and timetamp delayed";
delayed = true;
break;
}
c = fgetc(f);
if (c == EOF)
goto err;
counter = c & 0x7f;
if (!(c & 0x80))
goto done;
c = fgetc(f);
if (c == EOF)
goto err;
counter |= (c & 0x7f) << 7;
if (!(c & 0x80))
goto done;
c = fgetc(f);
if (c == EOF)
goto err;
counter |= (c & 0x7f) << 14;
if (!(c & 0x80))
goto done;
c = fgetc(f);
if (c == EOF)
goto err;
counter |= (c & 0x7f) << 21;
done:
/* REVISIT should we try to convert from delta values? */
printf("+%u%s\n", counter, label);
return;
err:
printf("(ERROR %d - %s) ", errno, strerror(errno));
goto done;
}
int main(int argc, char **argv)
{
FILE *f = stdin;
int c;
/* parse arguments */
while ((c = getopt(argc, argv, "f:")) != EOF) {
switch (c) {
case 'f':
/* e.g. from UART connected to /dev/ttyUSB0 */
f = fopen(optarg, "r");
if (!f) {
perror(optarg);
return 1;
}
break;
default:
usage:
fprintf(stderr, "usage: %s [-f input]",
basename(argv[0]));
return 1;
}
}
/* Parse data ... records have a header then data bytes.
* NOTE: we assume getc() deals in 8-bit bytes.
*/
bool overflow = false;
while ((c = getc(f)) != EOF) {
/* Sync packet ... 7 zeroes, 0x80 */
if (c == 0) {
int i;
for (i = 0; i < 6; i++) {
c = fgetc(f);
if (c == EOF)
break;
if (c != 0)
goto bad_sync;
}
c = fgetc(f);
if (c == 0x80) {
printf("SYNC\n");
continue;
}
bad_sync:
printf("BAD SYNC\n");
continue;
}
/* Overflow packet */
if (c == 0x70) {
/* REVISIT later, report just what overflowed!
* Timestamp and SWIT can happen. Non-ITM too?
*/
overflow = true;
printf("OVERFLOW ...\n");
continue;
}
overflow = false;
switch (c & 0x0f) {
case 0x00: /* Timestamp */
show_timestamp(f, c);
break;
case 0x04: /* "Reserved" */
show_reserved(f, "RESERVED", c);
break;
case 0x08: /* ITM Extension */
/* FIXME someday, handle these ... */
show_reserved(f, "ITM EXT", c);
break;
case 0x0c: /* DWT Extension */
show_reserved(f, "DWT EXT", c);
break;
default:
if (c & 4)
show_hard(f, c);
else
show_swit(f, c);
break;
}
}
return 0;
}

33
contrib/loaders/README Normal file
View File

@@ -0,0 +1,33 @@
Included in these directories are the src to the various ram loaders used
within openocd.
** target checksum loaders **
checksum/armv4_5_crc.s :
- ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code
checksum/armv7m_crc.s :
- ARMv7m checksum loader : see target/armv7m.c:cortex_m3_crc_code
checksum/mips32.s :
- MIPS32 checksum loader : see target/mips32.c:mips_crc_code
** target flash loaders **
flash/pic32mx.s :
- Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code
flash/stellaris.s :
- TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code
flash/stm32x.s :
- ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code
flash/str7x.s :
- ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code
flash/str9x.s :
- ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code
Spencer Oliver
spen@spen-soft.co.uk

View File

@@ -0,0 +1,58 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
r0 - address in - crc out
r1 - char count
*/
.text
.arm
_start:
main:
mov r2, r0
mov r0, #0xffffffff /* crc */
mov r3, r1
mov r4, #0
b ncomp
nbyte:
ldrb r1, [r2, r4]
ldr r7, CRC32XOR
eor r0, r0, r1, asl #24
mov r5, #0
loop:
cmp r0, #0
mov r6, r0, asl #1
add r5, r5, #1
mov r0, r6
eorlt r0, r6, r7
cmp r5, #8
bne loop
add r4, r4, #1
ncomp:
cmp r4, r3
bne nbyte
end:
bkpt #0
CRC32XOR: .word 0x04c11db7
.end

View File

@@ -0,0 +1,66 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
parameters:
r0 - address in - crc out
r1 - char count
*/
.text
.syntax unified
.arch armv7-m
.thumb
.thumb_func
.align 2
_start:
main:
mov r2, r0
mov r0, #0xffffffff /* crc */
mov r3, r1
mov r4, #0
b ncomp
nbyte:
ldrb r1, [r2, r4]
ldr r7, CRC32XOR
eor r0, r0, r1, asl #24
mov r5, #0
loop:
cmp r0, #0
mov r6, r0, asl #1
add r5, r5, #1
mov r0, r6
it lt
eorlt r0, r6, r7
cmp r5, #8
bne loop
add r4, r4, #1
ncomp:
cmp r4, r3
bne nbyte
bkpt #0
CRC32XOR: .word 0x04c11db7
.end

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@@ -0,0 +1,72 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.global main
.text
.set noreorder
/* params:
* $a0 address in
* $a1 byte count
* vars
* $a0 crc
* $a1 crc data byte
* temps:
* t3 v0 a3 a2 t0 v1
*/
.ent main
main:
addiu $t4, $a0, 0 /* address in */
addiu $t2, $a1, 0 /* count */
addiu $a0, $zero, 0xffffffff /* a0 crc - result */
beq $zero, $zero, ncomp
addiu $t3, $zero, 0 /* clear bytes read */
nbyte:
lb $a1, ($t4) /* load byte from source address */
addi $t4, $t4, 1 /* inc byte count */
crc:
sll $a1, $a1, 24
lui $v0, 0x04c1
xor $a0, $a0, $a1
ori $a3, $v0, 0x1db7
addu $a2, $zero, $zero /* clear bit count */
loop:
sll $t0, $a0, 1
addiu $a2, $a2, 1 /* inc bit count */
slti $a0, $a0, 0
xor $t1, $t0, $a3
movn $t0, $t1, $a0
slti $v1, $a2, 8 /* 8bits processed */
bne $v1, $zero, loop
addu $a0, $t0, $zero
ncomp:
bne $t2, $t3, nbyte /* all bytes processed */
addiu $t3, $t3, 1
wait:
sdbbp
.end main

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@@ -0,0 +1,57 @@
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv4
.section .init
/* algorithm register usage:
* r0: source address (in RAM)
* r1: target address (in Flash)
* r2: count
* r3: flash write command
* r4: status byte (returned to host)
* r5: busy test pattern
* r6: error test pattern
*/
loop:
ldrh r4, [r0], #2
strh r3, [r1]
strh r4, [r1]
busy:
ldrh r4, [r1]
and r7, r4, r5
cmp r7, r5
bne busy
tst r4, r6
bne done
subs r2, r2, #1
beq done
add r1, r1, #2
b loop
done:
b done
.end

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/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv4
.section .init
/* algorithm register usage:
* r0: source address (in RAM)
* r1: target address (in Flash)
* r2: count
* r3: flash write command
* r4: status byte (returned to host)
* r5: busy test pattern
* r6: error test pattern
*/
loop:
ldr r4, [r0], #4
str r3, [r1]
str r4, [r1]
busy:
ldr r4, [r1]
and r7, r4, r5
cmp r7, r5
bne busy
tst r4, r6
bne done
subs r2, r2, #1
beq done
add r1, r1, #4
b loop
done:
b done
.end

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@@ -0,0 +1,57 @@
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv4
.section .init
/* algorithm register usage:
* r0: source address (in RAM)
* r1: target address (in Flash)
* r2: count
* r3: flash write command
* r4: status byte (returned to host)
* r5: busy test pattern
* r6: error test pattern
*/
loop:
ldrb r4, [r0], #1
strb r3, [r1]
strb r4, [r1]
busy:
ldrb r4, [r1]
and r7, r4, r5
cmp r7, r5
bne busy
tst r4, r6
bne done
subs r2, r2, #1
beq done
add r1, r1, #1
b loop
done:
b done
.end

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@@ -1,9 +1,8 @@
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* LPC1700 support Copyright (C) 2009 by Audrius Urmanavicius *
* didele.deze@gmail.com *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -20,52 +19,57 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef LPC2000_H
#define LPC2000_H
typedef enum
{
lpc2000_v1,
lpc2000_v2,
lpc1700
} lpc2000_variant;
.text
.arm
.arch armv4
struct lpc2000_flash_bank
{
lpc2000_variant variant;
struct working_area *iap_working_area;
uint32_t cclk;
int cmd51_dst_boundary;
int cmd51_can_256b;
int cmd51_can_8192b;
int calc_checksum;
uint32_t cmd51_max_buffer;
int checksum_vector;
};
.section .init
enum lpc2000_status_codes
{
LPC2000_CMD_SUCCESS = 0,
LPC2000_INVALID_COMMAND = 1,
LPC2000_SRC_ADDR_ERROR = 2,
LPC2000_DST_ADDR_ERROR = 3,
LPC2000_SRC_ADDR_NOT_MAPPED = 4,
LPC2000_DST_ADDR_NOT_MAPPED = 5,
LPC2000_COUNT_ERROR = 6,
LPC2000_INVALID_SECTOR = 7,
LPC2000_SECTOR_NOT_BLANK = 8,
LPC2000_SECTOR_NOT_PREPARED = 9,
LPC2000_COMPARE_ERROR = 10,
LPC2000_BUSY = 11,
LPC2000_PARAM_ERROR = 12,
LPC2000_ADDR_ERROR = 13,
LPC2000_ADDR_NOT_MAPPED = 14,
LPC2000_CMD_NOT_LOCKED = 15,
LPC2000_INVALID_CODE = 16,
LPC2000_INVALID_BAUD_RATE = 17,
LPC2000_INVALID_STOP_BIT = 18,
LPC2000_CRP_ENABLED = 19
/* input parameters - */
/* R0 = source address */
/* R1 = destination address */
/* R2 = number of writes */
/* R3 = flash write command */
/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
/* output parameters - */
/* R5 = 0x80 ok 0x00 bad */
/* temp registers - */
/* R6 = value read from flash to test status */
/* R7 = holding register */
/* unlock registers - */
/* R8 = unlock1_addr */
/* R9 = unlock1_cmd */
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
};
code:
ldrh r5, [r0], #2
strh r9, [r8]
strh r11, [r10]
strh r3, [r8]
strh r5, [r1]
nop
busy:
ldrh r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
ands r6, r6, r4, lsr #2
beq busy /* b if DQ5 low */
ldrh r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
mov r5, #0 /* 0x0 - return 0x00, error */
bne done
cont:
subs r2, r2, #1 /* 0x1 */
moveq r5, #128 /* 0x80 */
beq done
add r1, r1, #2 /* 0x2 */
b code
done:
b done
#endif /* LPC2000_H */
.end

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/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv4
.section .init
/* input parameters - */
/* R0 = source address */
/* R1 = destination address */
/* R2 = number of writes */
/* R3 = flash write command */
/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
/* output parameters - */
/* R5 = 0x80 ok 0x00 bad */
/* temp registers - */
/* R6 = value read from flash to test status */
/* R7 = holding register */
/* unlock registers - */
/* R8 = unlock1_addr */
/* R9 = unlock1_cmd */
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
code:
ldrh r5, [r0], #2
strh r9, [r8]
strh r11, [r10]
strh r3, [r8]
strh r5, [r1]
nop
busy:
ldrh r6, [r1]
eor r7, r5, r6
ands r7, #0x80
bne busy
subs r2, r2, #1 /* 0x1 */
moveq r5, #128 /* 0x80 */
beq done
add r1, r1, #2 /* 0x2 */
b code
done:
b done
.end

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/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv4
.section .init
/* input parameters - */
/* R0 = source address */
/* R1 = destination address */
/* R2 = number of writes */
/* R3 = flash write command */
/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
/* output parameters - */
/* R5 = 0x80 ok 0x00 bad */
/* temp registers - */
/* R6 = value read from flash to test status */
/* R7 = holding register */
/* unlock registers - */
/* R8 = unlock1_addr */
/* R9 = unlock1_cmd */
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
code:
ldr r5, [r0], #4
str r9, [r8]
str r11, [r10]
str r3, [r8]
str r5, [r1]
nop
busy:
ldr r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
ands r6, r6, r4, lsr #2
beq busy /* b if DQ5 low */
ldr r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
mov r5, #0 /* 0x0 - return 0x00, error */
bne done
cont:
subs r2, r2, #1 /* 0x1 */
moveq r5, #128 /* 0x80 */
beq done
add r1, r1, #4 /* 0x4 */
b code
done:
b done
.end

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@@ -0,0 +1,75 @@
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv4
.section .init
/* input parameters - */
/* R0 = source address */
/* R1 = destination address */
/* R2 = number of writes */
/* R3 = flash write command */
/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
/* output parameters - */
/* R5 = 0x80 ok 0x00 bad */
/* temp registers - */
/* R6 = value read from flash to test status */
/* R7 = holding register */
/* unlock registers - */
/* R8 = unlock1_addr */
/* R9 = unlock1_cmd */
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
code:
ldrb r5, [r0], #1
strb r9, [r8]
strb r11, [r10]
strb r3, [r8]
strb r5, [r1]
nop
busy:
ldrb r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
ands r6, r6, r4, lsr #2
beq busy /* b if DQ5 low */
ldrb r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
mov r5, #0 /* 0x0 - return 0x00, error */
bne done
cont:
subs r2, r2, #1 /* 0x1 */
moveq r5, #128 /* 0x80 */
beq done
add r1, r1, #1 /* 0x1 */
b code
done:
b done
.end

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@@ -0,0 +1,81 @@
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.arch armv7-m
.thumb
.thumb_func
.align 2
/* input parameters - */
/* R0 = source address */
/* R1 = destination address */
/* R2 = number of writes */
/* R3 = flash write command */
/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
/* output parameters - */
/* R5 = 0x80 ok 0x00 bad */
/* temp registers - */
/* R6 = value read from flash to test status */
/* R7 = holding register */
/* unlock registers - */
/* R8 = unlock1_addr */
/* R9 = unlock1_cmd */
/* R10 = unlock2_addr */
/* R11 = unlock2_cmd */
code:
ldrh r5, [r0], #2
strh r9, [r8]
strh r11, [r10]
strh r3, [r8]
strh r5, [r1]
nop
busy:
ldrh r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
ands r6, r6, r4, lsr #2
beq busy /* b if DQ5 low */
ldrh r6, [r1]
eor r7, r5, r6
ands r7, r4, r7
beq cont /* b if DQ7 == Data7 */
mov r5, #0 /* 0x0 - return 0x00, error */
bne done
cont:
subs r2, r2, #1 /* 0x1 */
beq success
add r1, r1, #2 /* 0x2 */
b code
success:
mov r5, #128 /* 0x80 */
b done
done:
bkpt #0
.end

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@@ -0,0 +1,132 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arch m4k
.set noreorder
.set noat
/* params:
* $a0 src adr - ram + result
* $a1 dest adr - flash
* $a2 count (32bit words)
* vars
*
* temps:
* $t0, $t1, $t2, $t3, $t4, $t5
* $s0, $s1, $s3, $s4, $s5
*/
.type main, @function
.global main
.ent main
main:
/* setup constants */
lui $t0, 0xaa99
ori $t0, 0x6655 /* NVMKEY1 */
lui $t1, 0x5566
ori $t1, 0x99AA /* NVMKEY2 */
lui $t2, 0xBF80
ori $t2, 0xF400 /* NVMCON */
ori $t3, $zero, 0x4003 /* NVMCON row write cmd */
ori $t4, $zero, 0x8000 /* NVMCON start cmd */
write_row:
/* can we perform a row write: 128 32bit words */
sltiu $s3, $a2, 128
bne $s3, $zero, write_word
ori $t5, $zero, 0x4000 /* NVMCON clear cmd */
/* perform row write 512 bytes */
sw $a1, 32($t2) /* set NVMADDR with dest addr - real addr */
sw $a0, 64($t2) /* set NVMSRCADDR with src addr - real addr */
bal progflash
addiu $a0, $a0, 512
addiu $a1, $a1, 512
beq $zero, $zero, write_row
addiu $a2, $a2, -128
write_word:
/* write 32bit words */
lui $s5, 0xa000
ori $s5, 0x0000
or $a0, $a0, $s5 /* convert to virtual addr */
beq $zero, $zero, next_word
ori $t3, $zero, 0x4001 /* NVMCON word write cmd */
prog_word:
lw $s4, 0($a0) /* load data - from virtual addr */
sw $s4, 48($t2) /* set NVMDATA with data */
sw $a1, 32($t2) /* set NVMADDR with dest addr - real addr */
bal progflash
addiu $a0, $a0, 4
addiu $a1, $a1, 4
addiu $a2, $a2, -1
next_word:
bne $a2, $zero, prog_word
nop
done:
beq $zero, $zero, exit
addiu $a0, $zero, 0
error:
/* save result to $a0 */
addiu $a0, $s1, 0
exit:
sdbbp
.end main
.type progflash, @function
.global progflash
.ent progflash
progflash:
sw $t3, 0($t2) /* set NVMWREN */
sw $t0, 16($t2) /* write NVMKEY1 */
sw $t1, 16($t2) /* write NVMKEY2 */
sw $t4, 8($t2) /* start operation */
waitflash:
lw $s0, 0($t2)
and $s0, $s0, $t4
bne $s0, $zero, waitflash
nop
/* following is to comply with errata #34
* 500ns delay required */
nop
nop
nop
nop
/* check for errors */
lw $s1, 0($t2)
andi $s1, $zero, 0x3000
bne $s1, $zero, error
sw $t5, 4($t2) /* clear NVMWREN */
jr $ra
nop
.end progflash

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@@ -0,0 +1,66 @@
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
.align 2
/*
Call with :
r0 = buffer address
r1 = destination address
r2 = bytecount (in) - endaddr (work)
Used registers:
r3 = pFLASH_CTRL_BASE
r4 = FLASHWRITECMD
r5 = #1
r6 = bytes written
r7 = temp reg
*/
write:
ldr r3,pFLASH_CTRL_BASE
ldr r4,FLASHWRITECMD
movs r5, 1
movs r6, #0
mainloop:
str r1, [r3, #0]
ldr r7, [r0, r6]
str r7, [r3, #4]
str r4, [r3, #8]
waitloop:
ldr r7, [r3, #8]
tst r7, r5
bne waitloop
adds r1, r1, #4
adds r6, r6, #4
cmp r6, r2
bne mainloop
bkpt #0
pFLASH_CTRL_BASE: .word 0x400FD000
FLASHWRITECMD: .word 0xA4420001

View File

@@ -1,10 +1,10 @@
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2008 by Spencer Oliver *
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2011 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -20,58 +20,44 @@
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef STR9XPEC_H
#define STR9XPEC_H
struct str9xpec_flash_controller
{
struct jtag_tap *tap;
uint32_t *sector_bits;
int chain_pos;
int isc_enable;
uint8_t options[8];
};
// Build : arm-eabi-gcc -c stm32f2xxx.S
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
.global write
enum str9xpec_status_codes
{
STR9XPEC_INVALID_COMMAND = 1,
STR9XPEC_ISC_SUCCESS = 2,
STR9XPEC_ISC_DISABLED = 3,
STR9XPEC_ISC_INTFAIL = 32,
};
/*
r0 - source address
r1 - target address
r2 - count (halfword-16bit)
r3 - result out
r4 - flash base
*/
/* ISC commands */
#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of CR register in FLASH struct */
#define ISC_IDCODE 0xFE
#define ISC_MFG_READ 0x4C
#define ISC_CONFIGURATION 0x07
#define ISC_ENABLE 0x0C
#define ISC_DISABLE 0x0F
#define ISC_NOOP 0x10
#define ISC_ADDRESS_SHIFT 0x11
#define ISC_CLR_STATUS 0x13
#define ISC_PROGRAM 0x20
#define ISC_PROGRAM_SECURITY 0x22
#define ISC_PROGRAM_UC 0x23
#define ISC_ERASE 0x30
#define ISC_READ 0x50
#define ISC_BLANK_CHECK 0x60
write:
/* ISC_DEFAULT bit definitions */
write_half_word:
ldr r3, STM32_PROG16
str r3, [r4, #STM32_FLASH_CR_OFFSET]
ldrh r3, [r0], #0x02 /* read one half-word from src, increment ptr */
strh r3, [r1], #0x02 /* write one half-word from src, increment ptr */
busy:
ldr r3, [r4, #STM32_FLASH_SR_OFFSET]
tst r3, #0x10000 /* BSY (bit0) == 1 => operation in progress */
beq busy /* wait more... */
tst r3, #0xf0 /* PGSERR | PGPERR | PGAERR | WRPERR */
bne exit /* fail... */
subs r2, r2, #0x01 /* decrement counter */
bne write_half_word /* write next half-word if anything left */
exit:
bkpt #0x00
#define ISC_STATUS_SECURITY 0x40
#define ISC_STATUS_INT_ERROR 0x30
#define ISC_STATUS_MODE 0x08
#define ISC_STATUS_BUSY 0x04
#define ISC_STATUS_ERROR 0x03
/* Option bytes definitions */
#define STR9XPEC_OPT_CSMAPBIT 48
#define STR9XPEC_OPT_LVDTHRESBIT 49
#define STR9XPEC_OPT_LVDSELBIT 50
#define STR9XPEC_OPT_LVDWARNBIT 51
#define STR9XPEC_OPT_OTPBIT 63
#endif /* STR9XPEC_H */
STM32_PROG16: .word 0x101 /* PG | PSIZE_16*/

View File

@@ -0,0 +1,58 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.cpu cortex-m3
.thumb
.thumb_func
.global write
/*
r0 - source address
r1 - target address
r2 - count (halfword-16bit)
r3 - sector offet in : result out
r4 - flash base
*/
#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of CR register in FLASH struct */
write:
ldr r4, STM32_FLASH_BASE
add r4, r3 /* add offset 0x00 for sector 0 : 0x40 for sector 1 */
write_half_word:
movs r3, #0x01
str r3, [r4, #STM32_FLASH_CR_OFFSET] /* PG (bit0) == 1 => flash programming enabled */
ldrh r3, [r0], #0x02 /* read one half-word from src, increment ptr */
strh r3, [r1], #0x02 /* write one half-word from src, increment ptr */
busy:
ldr r3, [r4, #STM32_FLASH_SR_OFFSET]
tst r3, #0x01 /* BSY (bit0) == 1 => operation in progress */
beq busy /* wait more... */
tst r3, #0x14 /* PGERR (bit2) == 1 or WRPRTERR (bit4) == 1 => error */
bne exit /* fail... */
subs r2, r2, #0x01 /* decrement counter */
bne write_half_word /* write next half-word if anything left */
exit:
bkpt #0x00
STM32_FLASH_BASE: .word 0x40022000 /* base address of FLASH struct */

View File

@@ -0,0 +1,59 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv4t
.section .init
/*
r0 source address
r1 address
r2 FLASH_CR0
r3 dword count
r4 result
r5 busy mask
*/
write:
mov r4, #0x10000000 /* set DWPG bit */
str r4, [r2, #0x0] /* FLASH_CR0 */
str r1, [r2, #0x10] /* FLASH_AR */
ldr r4, [r0], #4 /* load data */
str r4, [r2, #0x8] /* FLASH_DR0 */
ldr r4, [r0], #4 /* load data */
str r4, [r2, #0xc] /* FLASH_DR1 */
mov r4, #0x90000000 /* set DWPG and WMS bits */
str r4, [r2, #0x0] /* FLASH_CR0 */
busy:
ldr r4, [r2, #0x0] /* FLASH_CR0 */
tst r4, r5
bne busy
ldr r4, [r2, #0x14] /* FLASH_ER */
tst r4, #0xff /* do we have errors */
tsteq r4, #0x100 /* write protection set */
bne exit
add r1, r1, #0x8 /* next 8 bytes */
subs r3, r3, #1 /* decremment dword count */
bne write
exit:
b exit
.end

View File

@@ -0,0 +1,56 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.arm
.arch armv5t
.section .init
/*
r0 source address (in)
r1 target address (in)
r2 word count (in)
r3 result (out)
*/
write:
bic r4, r1, #3 /* word address */
mov r3, #0x40 /* write command */
strh r3, [r4, #0]
ldrh r3, [r0], #2 /* read data */
strh r3, [r1], #2 /* write data */
mov r3, #0x70 /* status command */
strh r3, [r4, #0]
busy:
ldrb r3, [r4, #0] /* status */
tst r3, #0x80
beq busy
mov r5, #0x50 /* clear status command */
strh r5, [r4, #0]
mov r5, #0xFF /* read array */
strh r5, [r4, #0]
tst r3, #0x12
bne exit
subs r2, r2, #1 /* decremment word count */
bne write
exit:
bkpt #0
.end

View File

@@ -1,60 +1,71 @@
BUS!="usb", ACTION!="add", SUBSYSTEM!=="usb_device", GOTO="openocd_rules_end"
ACTION!="add|change", GOTO="openocd_rules_end"
SUBSYSTEM!="usb", GOTO="openocd_rules_end"
ENV{DEVTYPE}!="usb_device", GOTO="openocd_rules_end"
# Olimex ARM-USB-OCD
SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="0003", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="664", GROUP="plugdev"
# Olimex ARM-USB-OCD-TINY
SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="0004", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0004", MODE="664", GROUP="plugdev"
# Olimex ARM-JTAG-EW
SYSFS{idVendor}=="15ba", SYSFS{idProduct}=="001e", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="001e", MODE="664", GROUP="plugdev"
# Olimex ARM-USB-OCD-TINY-H
ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="664", GROUP="plugdev"
# USBprog with OpenOCD firmware
SYSFS{idVendor}=="1781", SYSFS{idProduct}=="0c63", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="1781", ATTRS{idProduct}=="0c63", MODE="664", GROUP="plugdev"
# Amontec JTAGkey and JTAGkey-tiny
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="cff8", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="664", GROUP="plugdev"
# Amontec JTAGkey-HiSpeed
SYSFS{idVendor}=="0fbb", SYSFS{idProduct}=="1000", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="664", GROUP="plugdev"
# Axiom AXM-0432 Link (Symphony SoundBite?)
# Calao Systems USB-A9260-C01
# TinCanTools Flyswatter
# OOCD-Link
# Marvell Sheevaplug (early development versions)
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="6010", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev"
# Calao Systems USB-A9260-C02
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="6001", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev"
# IAR J-Link USB
SYSFS{idVendor}=="1366", SYSFS{idProduct}=="0101", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0101", MODE="664", GROUP="plugdev"
# Raisonance RLink
SYSFS{idVendor}=="138e", SYSFS{idProduct}=="9000", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="664", GROUP="plugdev"
# Hitex STR9-comStick
SYSFS{idVendor}=="0640", SYSFS{idProduct}=="002c", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002c", MODE="664", GROUP="plugdev"
# Hitex STM32-PerformanceStick
SYSFS{idVendor}=="0640", SYSFS{idProduct}=="002d", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002d", MODE="664", GROUP="plugdev"
# Luminary Micro Stellaris/LM3S811
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="bcd9", MODE="664", GROUP="plugdev"
# TI/Luminary Stellaris Evaluation Board (several)
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcd9", MODE="664", GROUP="plugdev"
# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcda", MODE="664", GROUP="plugdev"
# Xverve Signalyzer Tool (DT-USB-ST)
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="bca0", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca0", MODE="664", GROUP="plugdev"
# egnite Turtelizer 2
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="bdc8", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bdc8", MODE="664", GROUP="plugdev"
# Marvell Sheevaplug
SYSFS{idVendor}=="9e88", SYSFS{idProduct}=="9e8f", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="664", GROUP="plugdev"
# Section5 ICEbear
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="c140", MODE="664", GROUP="plugdev"
SYSFS{idVendor}=="0403", SYSFS{idProduct}=="c141", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c140", MODE="664", GROUP="plugdev"
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="664", GROUP="plugdev"
# Hilscher NXHX Boards
ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="664", GROUP="plugdev"
LABEL="openocd_rules_end"

View File

@@ -1,7 +1,8 @@
info_TEXINFOS = openocd.texi
openocd_TEXINFOS = fdl.texi
man_MANS = openocd.1
EXTRA_DIST = openocd.1
EXTRA_DIST = openocd.1 \
INSTALL.txt
dist-hook:
mkdir $(distdir)/manual

View File

@@ -1,6 +1,6 @@
/** @mainpage OpenOCD Reference Manual
/** @mainpage OpenOCD Developer's Guide
Welcome to the OpenOCD Reference Manual -- the developer's resource for
Welcome to the OpenOCD Developer's Guide -- the developer's resource for
learning about the internal architecture of the OpenOCD project. @par
In addition, this document contains the tactical and strategic plans

View File

@@ -55,7 +55,7 @@ static COMMAND_HELPER(handle_hello_args, const char **sep, const char **name)
@endcode
Of course, you may also call other macros or functions, but that extends
beyond the scope of this tutorial on writing commands.
beyond the scope of this tutorial on writing commands.
@section primercmdreg Command Registration
@@ -68,9 +68,9 @@ static const struct command_registration hello_command_handlers[] = {
{
.name = "hello",
.mode = COMMAND_ANY,
.handler = &handle_hello_command,
.help = "print a warm greetings",
.usage = "[<name>]",
.handler = handle_hello_command,
.help = "print a warm greeting",
.usage = "[name]",
},
{
.chain = foo_command_handlers,
@@ -84,7 +84,12 @@ int hello_register_commands(struct command_context_s *cmd_ctx)
}
@endcode
That's it! The command should now be registered and avaiable to scripts.
Note that the "usage" text should use the same EBNF that's found
in the User's Guide: literals in 'single quotes', sequences of
optional parameters in [square brackets], and alternatives in
(parentheses|with|vertical bars), and so forth. No angle brackets.
That's it! The command should now be registered and available to scripts.
@section primercmdchain Command Chaining

View File

@@ -29,7 +29,7 @@ TMS which will select different shift registers.
The first thing you need to do is reset the state machine, because when
you connect to a chip you do not know what state the controller is in,you need
to clock TMS as 1, at least 7 times. This will put you into "Test Logic
to clock TMS as 1, at least 5 times. This will put you into "Test Logic
Reset" State. Knowing this, you can, once reset, then track what each
transition on TMS will do, and hence know what state the JTAG state
machine is in.
@@ -45,9 +45,9 @@ instruction register.
For example, one of the data registers will be known as "bypass" this is
(usually) a single bit which has no function and is used to bypass the
chip. Assume we have 3 identical chips, wired up like the picture
and each has a 3 bit instruction register, and there are 2 known
instructions (110 = bypass, 010 = some other function) if we want to use
chip. Assume we have 3 identical chips, wired up like the picture(wikipedia)
and each has a 3 bits instruction register, and there are 2 known
instructions (110 = bypass, 010 = "some other function") if we want to use
"some other function", on the second chip in the line, and not change
the other chips we would do the following transitions.
@@ -66,13 +66,13 @@ each chip [110] [010] [110]
The order is reversed, because we shift out the least significant bit
first. Then we transition TMS:
1 1 1 1 0 0
1 1 1 0 0
which puts us in the "Shift DR state".
Now when we clock data onto TDI (again while holding TMS to 0) , the
data shifts through the data registers, and because of the instruction
registers we selected (some other function has 8 bits in its data
registers we selected ("some other function" has 8 bits in its data
register), our total data register in the chain looks like this:
0 00000000 0
@@ -107,10 +107,6 @@ gets interesting. But in and of itself, JTAG is actually very simple.
@section primerjtag More Reading
The following link goes to an HTML (or PDF) introduction to JTAG,
written by one of the original members of the JTAG committee: @par
http://www.asset-intertech.com/products/boundscan.htm
A separate primer contains information about @subpage primerjtagbs for
developers that want to extend OpenOCD for such purposes.

View File

@@ -84,8 +84,8 @@ the minor version will @a also be zero (<code>y = 0, z = 0</code>).
After these required numeric components, release version strings
may contain tags such as as <em>-rc1</em> or <em>-rc2</em>.
These 'rc' tags indicate "release candidate" versions of the package.
Like the major/minor/micro numbers, these tags will be manipulated
by the automated release process.
Like major/minor/micro numbers, these are updated
as part of the release process.
The release process includes version number manipulations to the tree
being released, ensuring that all numbers are incremented (or rolled
@@ -277,22 +277,34 @@ support; the Release Manager isn't the only participant.
The following steps should be followed to produce each release:
-# Produce final patches to mainline (or a release branch). Nobody
except the RM should be committing anything.
-# Finalize @c NEWS file to describe the changes in the release
-# Produce final patches using a local clone of mainline. Nobody
except the RM should be committing anything. <em>Everyone with commit
privileges needs to know and agree to this in advance!</em> Even the RM
only commits a handful of updates as part of the release process
itself ... to files which are part of the version identification scheme
or release process; and to create the version tag; and then to open the
merge window for the next release cycle.
-# Finalize @c the NEWS file to describe the changes in the release
- This file is used to automatically post "blurbs" about the project.
- This material should be produced during the development cycle.
- Add a new item for each @c NEWS-worthy contribution, when committed.
- This material should have been produced during the development cycle,
by adding items for each @c NEWS-worthy contribution, when committed
during the merge window. (One part of closing the merge window, by
opening the RC phase of the release, is the commitment to hold all
further such contributions until the next merge window opens.)
- The RM should make sure nothing important was omitted, as part of
the RC1 cycle. From then on, no more updates to NEWS content should
be needed (except to seed the process for the next release, or maybe
if a significant and longstanding bug is fixed late in the RC phase).
-# Bump library version if our API changed (not yet required)
-# Update and commit the final package version in @c configure.in:
<code>tools/release/version.sh</code> may help ensure the versions
are named consistently:
(The <code>tools/release/version.sh</code> script might help ensure
the versions are named properly.):
-# Remove @c -dev tag.
-# Update the @c -rc tag:
-# Update any @c -rc tag:
- If producing the final release from an -rc series, remove it
- If producing the first RC in a series, add rc1
- If producing the next RC in a series, bump the rc number
-# Commit that version change.
-# Commit that version change, with a good descriptive comment.
-# Create a git tag for the final commit, with a tag name matching
the version string in <code>configure.in</code> (including <em>-rcN</em>
where relevant):
@@ -301,49 +313,92 @@ PACKAGE_VERSION="x.y.z"
PACKAGE_TAG="v${PACKAGE_VERSION}"
git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}"
@endverbatim
-# Prepare to resume normal development on mainline (major or minor release)
- Update the version label
-# Do not push those changes to mainline yet; only builds using the
source archives you will be creating should ever be labeled as
official releases (with no "-dev" suffix). Since mainline is a
development tree, these will be pushed later, as part of opening
the merge window for the next release cycle (restoring the "-dev"
suffix for that next release.) Those version and tag updates are
the last ones to be included in the release being made.
-# Produce the release files, using the local clone of the source
tree which holds the release's tag and updated version in
@c configure.in ... this is used only to produce the release, and
all files should already be properly checked out.
-# Run <code>tools/release.sh package</code> to produce the
source archives. This automatically bootstraps and
configures the process.
-# Run <code>tools/release.sh stage</code> to create an @c archives
directory with the release data, including MD5 and SHA1
checksum files (which are used with Berlios).
-# Sanity check at least one of those archives, by extracting and
configuring its contents, using them to build a copy of OpenOCD,
and verifying that the result prints the correct release version
in its startup banner. (For example,
"configure --enable-ft2232_libftdi --enable-parport"
then "make" and run "src/openocd -v" as a sanity check.)
-# Run <code>make docs</code> to create the
documentation which will be published.
-# Upload packages and post announcements of their availability:
-# Release packages into files section of project sites:
- SF.net:
-# Under "Project Admin", use the "File Manager"
-# Create a new folder under "openocd" named "${PACKAGE_VERSION}"
-# Upload the @c NEWS file and mark it as the release notes.
-# Upload the three source archive files, using the Web interface,
into that folder. Verify the upload worked OK by checking the
MD5 and SHA1 checksums computed by SourceForge against the
versions created as part of staging the release.
-# Also upload doc/openocd.pdf (the User's Guide) so the version
matching each release will be easily available.
-# Select each file in the release, and use the property panel
to set its type and select the right release notes.
- .tar.bz2: Linux, Mac
- .tar.gz: BSD, Solaris, Others
- .zip: Windows
- For openocd.pdf just associate it with the right release notes.
-# Create an SF.net project news update.
- Berlios:
-# Provide @c NEWS file, as requested.
-# Upload the release files via FTP to ftp://ftp.berlios.de/incoming/
-# Edit descriptions for each file (one at a time) Note that Berlios
does not automatically checksum files, and it uses a very old
version of the SourceForge code with user interface issues.
-# Click button to send E-mail Release Notice.
-# Depending on how paranoid you're feeling today, verify the images by
downloading them from the websites and making sure there are no
differences between the downloaded copies and your originals.
-# Publish User's and Developer's Guides to the project web sites:
-# Use SCP to update the SF.net web site with PDF and HTML for the
User's Guide, and HTML for the developer's guide ... you can
instantiate a shell.sourceforge.net instance and set up symlinks
from your home directory, to simplify this process.
-# (How to update the Berlios web site with the same data?)
-# Post announcement e-mail to the openocd-development list.
-# optionally:
-# Post an update on the Berlios blog (if it lets you)
-# Announce updates on freshmeat.net and other trackers.
-# Submit updates to news feeds (e.g. Digg, Reddit, etc.).
-# Resume normal development on mainline, by opening the merge window for
the next major or minor release cycle. (You might want to do this
before all the release bits are fully published.)
- Update the version label in the @c configure.in file:
- Restore @c -dev version tag.
- For a new minor release cycle, increment the release's minor number
- For a new major release cycle, increment the release's major number
and zero its minor number
- Archive @c NEWS file as "<code>doc/news/NEWS-${PACKAGE_VERSION}</code>".
- Create a new @c NEWS file for the next release
- Commit those changes, and push the commit and the release tag
to mainline.
-# Produce the package source archives:
-# <em>Start with a new clone of the source tree</em>, with the
release's tag. This is used only for producing these packages.
-# Checkout the appropriate tag:
<code>git checkout "${PACKAGE_VERSION}"</code>
-# @c bootstrap, @c configure, and @c make the package.
-# Run <code>make distcheck</code> to produce the distribution archives.
-# Run <code>make maintainer-clean</code> verify the repository is empty.
-# Create signature files using @c md5sum, @c sha1sum, etc.
-# Publish documentation for the release:
- Allow users to access the documentation for each of our releases.
- Place static copies of the following files on the project website:
- @c NEWS: to provide a blurb for each release
- User's Guide, Developer Manual: to allow easy on-line viewing
-# Upload packages and post announcements of their availability:
-# Release packages into files section of project sites:
- SF.net:
-# Create a new folder named "${PACKAGE_VERSION}"
-# Select new folder as the target for uploads.
-# Upload files via Web interface into new
-# Set platform types for each archive:
- .tar.bz2: Linux, Mac
- .tar.gz: BSD, Solaris, Others
- .zip: Windows
- Berlios:
-# Create the new release for the new version.
-# Provide @c NEWS file, as requested.
-# Upload files via FTP to ftp://ftp.berlios.de/incoming/
-# Edit descriptions for each file.
-# Click button to send E-mail Release Notice.
-# Post announcement e-mail to the openocd-development list.
-# Announce updates on freshmeat.net and other trackers.
-# Submit big updates to news feeds (e.g. Digg, Reddit, etc.).
- Commit those changes.
- Push all the updates to mainline.
- Last updates for the release, including the release tag (you
will need to "git push --tags").
- Updates opening the merge window
- At this point, it's OK for commiters to start pushing changes
which have been held off until the next release. (Any bugfixes to
this release will be against a bug-fix release branch starting from
the commit you tagged as this release, not mainline.)
- Announce to the openocd-development list. Ideally, you will also
be able to say who is managing the next release cycle.
To start a bug-fix release branch:
-# Create a new branch, starting from a major or
@@ -399,7 +454,7 @@ affect its behavior:
@section releasetutorial Release Tutorials
This section should contain a brief tutorial for using the Release
This section should contain a brief tutorial for using the Release
Script to perform release tasks, but the new script needs to be
used for 0.3.0.

View File

@@ -207,7 +207,7 @@ upon it, sometimes that is the only scheme available.
As a small group of developers, supporting all the platforms and
targets in the debugger will be difficult, as there are enough problem
with the plethora of Dongles, Chips, and different target boards.
with the plethora of Adapters, Chips, and different target boards.
Yes, the TCL interface might be suitable, but it has not received much
love or attention. Perhaps it will after you read and understand this.
@@ -235,7 +235,7 @@ different host-side GDB..
Sure - a <em>man on a mission</em> can make that work. The GUI might be
libopenocd + Perl/TK, or maybe an Eclipse Plug-in.
That is a development support nightmare for reasons described
above. We have enough support problems as it is with targets, dongles,
above. We have enough support problems as it is with targets, adapters,
etc.
@section serverdocshttpbg HTTP Server Background
@@ -270,8 +270,8 @@ every peripheral register on the target platform.
That also is transportable, regardless of the OpenOCD host
platform: Linux/X86, Linux/ARM, FreeBSD, Cygwin, MingW, or MacOSX.
You could even port OpenOCD to an Google Android and use it as a
bit-bang dongle JTAG serving web pages.
You could even port OpenOCD to an Android system and use it as a
bit-banging JTAG Adapter serving web pages.
@subsection serverdocshtmladv Advanced HTML Pages
@@ -309,17 +309,3 @@ This section needs to be expanded.
*/
/** @page serverhttp OpenOCD HTTP Server API
Smoketest:
configure --enable-httpd --enable-dummy --enable-ioutil
openocd -s /usr/local/share/openocd -f httpd/httpd.tcl -f interface/dummy.cfg -f target/lpc2148.cfg
Navigate to: http://localhost:8888/
*/

View File

@@ -308,7 +308,7 @@ For technical reference material:
- Else it's a "Config Command" if it must be used before the
configuration stage completes.
- For a "Driver", list its name.
- Use BNF style regular expressions to define parameters:
- Use EBNF style regular expressions to define parameters:
brackets around zero-or-one choices, parentheses around
exactly-one choices.
- Use \@option, \@file, \@var and other mechanisms where appropriate.

View File

@@ -22,19 +22,23 @@ please check the \fIopenocd\fR info page for the complete list.
.SH "OPTIONS"
.TP
.B "\-f, \-\-file <filename>"
Use configuration file
.BR <filename> .
This is a shortcut for a \fB\-c "[script \fI<filename>\fB]"\fR
command, using a search path to load the configuration file
.IR <filename> .
In order to specify multiple config files, you can use multiple
.B \-\-file
arguments. If this option is omitted, the config file
arguments. If no such \fB\-c\fR
options are included, the first config file
.B openocd.cfg
in the current working directory will be used.
in the search path will be used.
.TP
.B "\-s, \-\-search <dirname>"
Search for config files and scripts in the directory
.BR <dirname> .
If this option is omitted, OpenOCD searches for config files and scripts
in the current directory.
Add
.I <dirname>
to the search path used for config files and scripts.
The search path begins with the current directory,
then includes these additional directories before other
components such as the standard OpenOCD script libraries.
.TP
.B "\-d, \-\-debug <debuglevel>"
Set debug level. Possible values are:
@@ -52,13 +56,17 @@ The default level is
.TP
.B "\-l, \-\-log_output <filename>"
Redirect log output to the file
.BR <filename> .
.IR <filename> .
Per default the log output is printed on
.BR stderr .
.TP
.B "\-c, \-\-command <cmd>"
Run the command
.BR <cmd> .
Add the command
.I <cmd>
to a list of commands executed on server startup.
Note that you will need to explicitly invoke
.I init
if the command requires access to a target or flash.
.TP
.B "\-p, \-\-pipe"
Use pipes when talking to gdb.
@@ -88,9 +96,6 @@ and
programs are properly installed at your site, the command
.B info openocd
should give you access to the complete manual.
.PP
Also, the OpenOCD wiki contains some more information and examples:
.B http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger
.SH "AUTHORS"
Please see the file AUTHORS.
.PP

File diff suppressed because it is too large Load Diff

View File

@@ -1,4 +1,4 @@
Some of these binaries are build & linked using eCos.
Some of these binaries are build & linked using eCos.
For source for the flash drivers, see:

1
jimtcl Submodule

Submodule jimtcl added at 411e92fea9

View File

@@ -1,12 +1,16 @@
include $(top_srcdir)/common.mk
SUBDIRS = \
helper \
jtag \
helper \
target \
transport \
flash \
svf \
xsvf \
pld \
server
server \
rtos
lib_LTLIBRARIES = libopenocd.la
bin_PROGRAMS = openocd
@@ -20,6 +24,12 @@ endif
openocd_SOURCES = $(MAINFILE)
openocd_LDADD = libopenocd.la
if INTERNAL_JIMTCL
openocd_LDADD += $(top_builddir)/jimtcl/libjim.a
else
openocd_LDADD += -ljim
endif
libopenocd_la_SOURCES = \
hello.c \
openocd.c \
@@ -29,12 +39,6 @@ noinst_HEADERS = \
hello.h \
openocd.h
# set the include path found by configure
AM_CPPFLAGS = \
-I$(top_srcdir)/src \
-I$(top_builddir)/src
libopenocd_la_CPPFLAGS = -DPKGBLDDATE=\"`date +%F-%R`\"
# banner output includes RELSTR appended to $VERSION from the configure script
@@ -44,6 +48,7 @@ libopenocd_la_CPPFLAGS += -DRELSTR=\"\"
else
libopenocd_la_CPPFLAGS += -DRELSTR=\"`$(top_srcdir)/guess-rev.sh $(top_srcdir)`\"
endif
libopenocd_la_CPPFLAGS += -DGITVERSION=\"`cd $(top_srcdir) && git describe`\"
# add default CPPFLAGS
libopenocd_la_CPPFLAGS += $(AM_CPPFLAGS) $(CPPFLAGS)
@@ -60,12 +65,16 @@ endif
if FT2232_LIBFTDI
FTDI2232LIB = -lftdi -lusb
else
if USB_BLASTER_LIBFTDI
FTDI2232LIB = -lftdi -lusb
else
if PRESTO_LIBFTDI
FTDI2232LIB = -lftdi -lusb
else
FTDI2232LIB =
endif
endif
endif
if USBPROG
LIBUSB = -lusb
@@ -76,6 +85,9 @@ else
if RLINK
LIBUSB = -lusb
else
if ULINK
LIBUSB = -lusb
else
if VSLLINK
LIBUSB = -lusb
else
@@ -84,22 +96,21 @@ endif
endif
endif
endif
endif
libopenocd_la_LIBADD = \
$(top_builddir)/src/xsvf/libxsvf.la \
$(top_builddir)/src/svf/libsvf.la \
$(top_builddir)/src/pld/libpld.la \
$(top_builddir)/src/jtag/libjtag.la \
$(top_builddir)/src/transport/libtransport.la \
$(top_builddir)/src/flash/libflash.la \
$(top_builddir)/src/target/libtarget.la \
$(top_builddir)/src/server/libserver.la \
$(top_builddir)/src/rtos/librtos.la \
$(top_builddir)/src/helper/libhelper.la \
$(FTDI2232LIB) $(MINGWLDADD) $(LIBUSB)
if HTTPD
libopenocd_la_LIBADD += -lmicrohttpd
endif
STARTUP_TCL_SRCS = \
$(srcdir)/helper/startup.tcl \
$(srcdir)/jtag/startup.tcl \
@@ -123,7 +134,10 @@ startup_tcl.c: startup.tcl $(BIN2C)
# add startup_tcl.c to make clean list
CLEANFILES = startup.tcl startup_tcl.c
# we do not want generated file in the dist
dist-hook:
rm -f $(distdir)/startup_tcl.c
MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
# The "quick" target builds executables & reinstalls the executables

View File

@@ -1,5 +1,5 @@
/***************************************************************************
* Copyright (C) 2007-2009 by Øyvind Harboe *
* Copyright (C) 2007-2010 by Øyvind Harboe *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -24,6 +24,7 @@
#include <helper/types.h>
#include <jtag/jtag.h>
#include <helper/ioutil.h>
#include <helper/util.h>
#include <helper/configuration.h>
#include <server/server.h>
@@ -62,6 +63,7 @@
#include "rom.h"
#ifdef CYGPKG_HAL_NIOS2
#include <cyg/hal/io.h>
#define ZY1000_SER_DEV "/dev/uart_0"
#else
#define ZY1000_SER_DEV "/dev/ser0"
@@ -98,10 +100,6 @@ static bool writeLog = true;
char hwaddr[512];
extern struct flash_driver *flash_drivers[];
extern struct target_type *target_types[];
#ifdef CYGPKG_PROFILE_GPROF
#include <cyg/profile/profile.h>
@@ -145,7 +143,14 @@ static void zylinjtag_reboot(cyg_addrword_t data)
diag_printf("Unmounting /config..\n");
umount("/config");
diag_printf("Rebooting..\n");
#ifdef CYGPKG_HAL_NIOS2
/* This will reboot & reconfigure the FPGA from the bootloader
* and on.
*/
IOWR(REMOTE_UPDATE_BASE, 0x20, 0x1);
#else
HAL_PLATFORM_RESET();
#endif
}
static cyg_thread zylinjtag_thread_object;
static cyg_handle_t zylinjtag_thread_handle;
@@ -495,6 +500,10 @@ static void zylinjtag_startNetwork(void)
cyg_httpd_init_tcl_interpreter();
// Kludge! Why can't I do this from httpd.c??? I get linker errors...
// some of that --start/end-group stuff?
Jim_InitStaticExtensions(httpstate.jim_interp);
Jim_CreateCommand(httpstate.jim_interp, "log", zylinjtag_Jim_Command_log,
NULL, NULL);
Jim_CreateCommand(httpstate.jim_interp, "zy1000_reboot",
@@ -839,7 +848,7 @@ static int zylinjtag_Jim_Command_uart(Jim_Interp *interp, int argc,
static int current_baud = 38400;
if (argc == 1)
{
command_print(cmd_ctx, "%d", current_baud);
Jim_SetResult(interp, Jim_NewIntObj(interp, current_baud));
return JIM_OK;
}
else if (argc != 2)
@@ -875,8 +884,8 @@ static int zylinjtag_Jim_Command_uart(Jim_Interp *interp, int argc,
baud = CYGNUM_SERIAL_BAUD_230400;
break;
default:
command_print(cmd_ctx, "unsupported baudrate");
return ERROR_INVALID_ARGUMENTS;
Jim_SetResult(interp, Jim_NewStringObj(interp, "unsupported baudrate", -1));
return JIM_ERR;
}
cyg_serial_info_t buf;
@@ -889,7 +898,7 @@ static int zylinjtag_Jim_Command_uart(Jim_Interp *interp, int argc,
err = cyg_io_lookup(ZY1000_SER_DEV, &serial_handle);
if (err != ENOERR)
{
LOG_ERROR("Could not open serial port\n");
Jim_SetResult(interp, Jim_NewStringObj(interp, "Could not open serial port", -1));
return JIM_ERR;
}
@@ -899,7 +908,7 @@ static int zylinjtag_Jim_Command_uart(Jim_Interp *interp, int argc,
&len);
if (err != ENOERR)
{
LOG_ERROR("Failed to get serial port settings %d", err);
Jim_SetResult(interp, Jim_NewStringObj(interp, "Failed to get serial port settings", -1));
return JIM_ERR;
}
buf.baud = baud;
@@ -908,7 +917,7 @@ static int zylinjtag_Jim_Command_uart(Jim_Interp *interp, int argc,
&len);
if (err != ENOERR)
{
LOG_ERROR("Failed to set serial port settings %d", err);
Jim_SetResult(interp, Jim_NewStringObj(interp, "Failed to set serial port settings", -1));
return JIM_ERR;
}
@@ -948,7 +957,11 @@ int main(int argc, char *argv[])
diag_init_putc(_zylinjtag_diag_write_char);
// We want this in the log.
diag_printf("Zylin ZY1000.\n");
#ifdef CYGPKG_HAL_NIOS2
diag_printf("Zylin ZY1000 PCB revc.\n");
#else
diag_printf("Zylin ZY1000 PCB revb.\n");
#endif
err = mount("", "/ram", "ramfs");
if (err < 0)
@@ -987,6 +1000,20 @@ int main(int argc, char *argv[])
copydir("/rom", "/ram/cgi");
#ifdef CYGPKG_HAL_NIOS2
cyg_flashaddr_t err_address;
#define UNCACHED_EXT_FLASH_BASE (0x80000000 + EXT_FLASH_BASE)
/* The revc flash is locked upon reset, unlock it */
#ifdef CYGHWR_IO_FLASH_BLOCK_LOCKING
if ((err = flash_unlock((void *) UNCACHED_EXT_FLASH_BASE, EXT_FLASH_SPAN,
(void **) &err_address)) != 0)
{
diag_printf("Error: could not unlock flash\n");
}
#endif
#endif
err = mount("/dev/flash1", "/config", "jffs2");
if (err < 0)
{
@@ -1067,6 +1094,9 @@ int main(int argc, char *argv[])
command_set_output_handler(cmd_ctx, configuration_output_handler, NULL);
command_context_mode(cmd_ctx, COMMAND_CONFIG);
if (util_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
if (ioutil_init(cmd_ctx) != ERROR_OK)
return EXIT_FAILURE;
@@ -1075,7 +1105,7 @@ int main(int argc, char *argv[])
NULL, NULL);
#endif
Jim_CreateCommand(httpstate.jim_interp, "uart", zylinjtag_Jim_Command_uart, NULL, NULL);
Jim_CreateCommand(httpstate.jim_interp, "zy1000_uart", zylinjtag_Jim_Command_uart, NULL, NULL);
log_init();
@@ -1251,6 +1281,7 @@ struct Tftp
cyg_uint8 *mem;
int actual;
char *server;
int port;
char *file;
};
@@ -1307,6 +1338,15 @@ static int tftpfs_open(cyg_mtab_entry *mte, cyg_dir dir, const char *name,
strncpy(tftp->server, name, server - name);
tftp->server[server - name] = 0;
tftp->port = 0; /* default port 69 */
char *port;
port = strchr(tftp->server, ':');
if (port != NULL)
{
tftp->port = atoi(port + 1);
*port = 0;
}
tftp->file = strdup(server + 1);
if (tftp->file == NULL)
{
@@ -1324,7 +1364,7 @@ static int fetchTftp(struct Tftp *tftp)
if (!tftp->readFile)
{
int err;
tftp->actual = tftp_client_get(tftp->file, tftp->server, 0, tftp->mem,
tftp->actual = tftp_client_get(tftp->file, tftp->server, tftp->port, tftp->mem,
tftpMaxSize, TFTP_OCTET, &err);
if (tftp->actual < 0)

View File

@@ -1,11 +1,9 @@
include $(top_srcdir)/common.mk
SUBDIRS = \
nor \
nand
AM_CPPFLAGS = \
-I$(top_srcdir)/src \
-I$(top_builddir)/src
METASOURCES = AUTO
noinst_LTLIBRARIES = libflash.la
libflash_la_SOURCES = \

View File

@@ -25,13 +25,13 @@
unsigned get_flash_name_index(const char *name)
{
const char *index = strrchr(name, '.');
if (NULL == index)
const char *name_index = strrchr(name, '.');
if (NULL == name_index)
return 0;
if (index[1] < '0' || index[1] > '9')
if (name_index[1] < '0' || name_index[1] > '9')
return ~0U;
unsigned requested;
int retval = parse_uint(index + 1, &requested);
int retval = parse_uint(name_index + 1, &requested);
// detect parsing error by forcing past end of bank list
return (ERROR_OK == retval) ? requested : ~0U;
}

View File

@@ -25,9 +25,9 @@
* Parses the optional '.index' portion of a flash bank identifier.
* @param name The desired driver name, passed by the user.
* @returns The parsed index request, or 0 if not present. If the
* name provides a suffix but it does not parse as an unsigned integer,
* name provides a suffix but it does not parse as an unsigned integer,
* the routine returns ~0U. This will prevent further matching.
*/
*/
unsigned get_flash_name_index(const char *name);
/**
* Attempt to match the @c expected name with the @c name of a driver.
@@ -36,13 +36,14 @@ unsigned get_flash_name_index(const char *name);
*/
bool flash_driver_name_matches(const char *name, const char *expected);
#define ERROR_FLASH_BANK_INVALID -900
#define ERROR_FLASH_SECTOR_INVALID -901
#define ERROR_FLASH_OPERATION_FAILED -902
#define ERROR_FLASH_DST_OUT_OF_BANK -903
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT -904
#define ERROR_FLASH_BUSY -905
#define ERROR_FLASH_SECTOR_NOT_ERASED -906
#define ERROR_FLASH_BANK_NOT_PROBED -907
#define ERROR_FLASH_BANK_INVALID (-900)
#define ERROR_FLASH_SECTOR_INVALID (-901)
#define ERROR_FLASH_OPERATION_FAILED (-902)
#define ERROR_FLASH_DST_OUT_OF_BANK (-903)
#define ERROR_FLASH_DST_BREAKS_ALIGNMENT (-904)
#define ERROR_FLASH_BUSY (-905)
#define ERROR_FLASH_SECTOR_NOT_ERASED (-906)
#define ERROR_FLASH_BANK_NOT_PROBED (-907)
#define ERROR_FLASH_OPER_UNSUPPORTED (-908)
#endif // FLASH_COMMON_H

View File

@@ -209,7 +209,7 @@ static int mg_init_gpio (void)
return ret;
}
static int mg_dsk_wait(mg_io_type_wait wait, uint32_t time)
static int mg_dsk_wait(mg_io_type_wait wait_local, uint32_t time_var)
{
uint8_t status, error;
struct target *target = mflash_bank->target;
@@ -220,7 +220,7 @@ static int mg_dsk_wait(mg_io_type_wait wait, uint32_t time)
struct duration bench;
duration_start(&bench);
while (time) {
while (time_var) {
ret = target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status);
if (ret != ERROR_OK)
@@ -228,10 +228,10 @@ static int mg_dsk_wait(mg_io_type_wait wait, uint32_t time)
if (status & mg_io_rbit_status_busy)
{
if (wait == mg_io_wait_bsy)
if (wait_local == mg_io_wait_bsy)
return ERROR_OK;
} else {
switch (wait)
switch (wait_local)
{
case mg_io_wait_not_bsy:
return ERROR_OK;
@@ -259,7 +259,7 @@ static int mg_dsk_wait(mg_io_type_wait wait, uint32_t time)
return ERROR_MG_IO;
}
switch (wait)
switch (wait_local)
{
case mg_io_wait_rdy:
if (status & mg_io_rbit_status_ready)
@@ -280,7 +280,7 @@ static int mg_dsk_wait(mg_io_type_wait wait, uint32_t time)
else
LOG_ERROR("mflash: duration measurement failed: %d", ret);
if (t > time)
if (t > time_var)
break;
}
@@ -720,14 +720,20 @@ COMMAND_HANDLER(mg_write_cmd)
if (ret != ERROR_OK)
return ret;
int filesize;
buffer = malloc(MG_FILEIO_CHUNK);
if (!buffer) {
fileio_close(&fileio);
return ERROR_FAIL;
}
int retval = fileio_size(&fileio, &filesize);
if (retval != ERROR_OK) {
fileio_close(&fileio);
return retval;
}
cnt = fileio.size / MG_FILEIO_CHUNK;
res = fileio.size % MG_FILEIO_CHUNK;
cnt = filesize / MG_FILEIO_CHUNK;
res = filesize % MG_FILEIO_CHUNK;
struct duration bench;
duration_start(&bench);
@@ -751,9 +757,9 @@ COMMAND_HANDLER(mg_write_cmd)
if (duration_measure(&bench) == ERROR_OK)
{
command_print(CMD_CTX, "wrote %zu byte from file %s "
"in %fs (%0.3f kB/s)", fileio.size, CMD_ARGV[1],
duration_elapsed(&bench), duration_kbps(&bench, fileio.size));
command_print(CMD_CTX, "wrote %ld bytes from file %s "
"in %fs (%0.3f kB/s)", (long)filesize, CMD_ARGV[1],
duration_elapsed(&bench), duration_kbps(&bench, filesize));
}
free(buffer);
@@ -762,7 +768,7 @@ COMMAND_HANDLER(mg_write_cmd)
return ERROR_OK;
mg_write_cmd_err:
free(buffer);
free(buffer);
fileio_close(&fileio);
return ret;
@@ -829,7 +835,7 @@ COMMAND_HANDLER(mg_dump_cmd)
return ERROR_OK;
mg_dump_cmd_err:
free(buffer);
free(buffer);
fileio_close(&fileio);
return ret;
@@ -1121,7 +1127,7 @@ static int mg_storage_config(void)
!= ERROR_OK)
return ret;
mg_gen_ataid((mg_io_type_drv_info *)buff);
mg_gen_ataid((mg_io_type_drv_info *)(void *)buff);
if ((ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_stgdrvinfo))
!= ERROR_OK)
@@ -1149,7 +1155,7 @@ static int mg_boot_config(void)
buff[0] = mg_op_mode_snd; /* operation mode */
buff[1] = MG_UNLOCK_OTP_AREA;
buff[2] = 4; /* boot size */
*((uint32_t *)(buff + 4)) = 0; /* XIP size */
*((uint32_t *)(void *)(buff + 4)) = 0; /* XIP size */
if ((ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_xipinfo))
!= ERROR_OK)
@@ -1271,35 +1277,38 @@ COMMAND_HANDLER(mg_config_cmd)
static const struct command_registration mflash_exec_command_handlers[] = {
{
.name = "probe",
.handler = &mg_probe_cmd,
.handler = mg_probe_cmd,
.mode = COMMAND_EXEC,
.help = "Detect bank configuration information",
},
{
.name = "write",
.handler = &mg_write_cmd,
.handler = mg_write_cmd,
.mode = COMMAND_EXEC,
.usage = "<num> <file> <address>",
.help = "Write a file at the specified address",
/* FIXME bank_num is unused */
.usage = "bank_num filename address",
.help = "Write binary file at the specified address.",
},
{
.name = "dump",
.handler = &mg_dump_cmd,
.handler = mg_dump_cmd,
.mode = COMMAND_EXEC,
.usage = "<num> <file> <address> <size>",
.help = "Dump to a file from the specified address",
/* FIXME bank_num is unused */
.usage = "bank_num filename address size",
.help = "Write specified number of bytes from a binary file "
"to the specified, address.",
},
{
.name = "config",
.handler = &mg_config_cmd,
.handler = mg_config_cmd,
.mode = COMMAND_EXEC,
.usage = "<num> <stage>",
.help = "Dump to a file from the specified address",
.help = "Configure MFLASH options.",
.usage = "('boot'|'storage'|'pll' frequency)",
},
COMMAND_REGISTRATION_DONE
};
int mflash_init_drivers(struct command_context *cmd_ctx)
static int mflash_init_drivers(struct command_context *cmd_ctx)
{
if (!mflash_bank)
return ERROR_OK;
@@ -1345,7 +1354,8 @@ COMMAND_HANDLER(mg_bank_cmd)
char *str;
mflash_bank->rst_pin.num = strtoul(CMD_ARGV[2], &str, 0);
if (*str)
mflash_bank->rst_pin.port[0] = (uint16_t)tolower(str[0]);
mflash_bank->rst_pin.port[0] = (uint16_t)
tolower((unsigned)str[0]);
mflash_bank->target = target;
@@ -1366,15 +1376,15 @@ COMMAND_HANDLER(mg_bank_cmd)
static const struct command_registration mflash_config_command_handlers[] = {
{
.name = "bank",
.handler = &mg_bank_cmd,
.handler = mg_bank_cmd,
.mode = COMMAND_CONFIG,
.help = "configure a mflash device bank",
.usage = "<soc> <base> <RST pin> <target #>",
.usage = "soc_type base_addr pin_id target",
},
{
.name = "init",
.mode = COMMAND_CONFIG,
.handler = &handle_mflash_init_command,
.handler = handle_mflash_init_command,
.help = "initialize mflash devices",
},
COMMAND_REGISTRATION_DONE

View File

@@ -34,7 +34,7 @@ struct mflash_gpio_num
struct mflash_gpio_drv
{
char *name;
const char *name;
int (*set_gpio_to_output) (struct mflash_gpio_num gpio);
int (*set_gpio_output_val) (struct mflash_gpio_num gpio, uint8_t val);
};
@@ -142,7 +142,6 @@ struct mflash_bank
};
int mflash_register_commands(struct command_context *cmd_ctx);
int mflash_init_drivers(struct command_context *cmd_ctx);
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)

View File

@@ -1,6 +1,4 @@
AM_CPPFLAGS = \
-I$(top_srcdir)/src \
-I$(top_builddir)/src
include $(top_srcdir)/common.mk
noinst_LTLIBRARIES = libocdflashnand.la
@@ -18,6 +16,8 @@ NAND_DRIVERS = \
nonce.c \
davinci.c \
lpc3180.c \
lpc32xx.c \
mx2.c \
mx3.c \
orion.c \
s3c24xx.c \
@@ -25,7 +25,9 @@ NAND_DRIVERS = \
s3c2412.c \
s3c2440.c \
s3c2443.c \
at91sam9.c
s3c6400.c \
at91sam9.c \
nuc910.c
noinst_HEADERS = \
arm_io.h \
@@ -34,8 +36,11 @@ noinst_HEADERS = \
fileio.h \
imp.h \
lpc3180.h \
lpc32xx.h \
mx2.h \
mx3.h \
s3c24xx.h \
s3c24xx_regs.h
s3c24xx_regs.h \
nuc910.h
MAINTAINERCLEANFILES = $(srcdir)/Makefile.in

View File

@@ -43,7 +43,7 @@
* @param area Pointer to a pointer to a working area to copy code to
* @return Success or failure of the operation
*/
int arm_code_to_working_area(struct target *target,
static int arm_code_to_working_area(struct target *target,
const uint32_t *code, unsigned code_size,
unsigned additional, struct working_area **area)
{
@@ -100,7 +100,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
struct arm *armv4_5 = target->arch_info;
struct reg_param reg_params[3];
uint32_t target_buf;
uint32_t exit = 0;
uint32_t exit_var = 0;
int retval;
/* Inputs:
@@ -153,11 +153,11 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
/* armv4 must exit using a hardware breakpoint */
if (armv4_5->is_armv4)
exit = nand->copy_area->address + sizeof(code) - 4;
exit_var = nand->copy_area->address + sizeof(code) - 4;
/* use alg to write data from work area to NAND chip */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
nand->copy_area->address, exit, 1000, &algo);
nand->copy_area->address, exit_var, 1000, &algo);
if (retval != ERROR_OK)
LOG_ERROR("error executing hosted NAND write");
@@ -184,7 +184,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
struct arm *armv4_5 = target->arch_info;
struct reg_param reg_params[3];
uint32_t target_buf;
uint32_t exit = 0;
uint32_t exit_var = 0;
int retval;
/* Inputs:
@@ -229,11 +229,11 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
/* armv4 must exit using a hardware breakpoint */
if (armv4_5->is_armv4)
exit = nand->copy_area->address + sizeof(code) - 4;
exit_var = nand->copy_area->address + sizeof(code) - 4;
/* use alg to write data from NAND chip to work area */
retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
nand->copy_area->address, exit, 1000, &algo);
nand->copy_area->address, exit_var, 1000, &algo);
if (retval != ERROR_OK)
LOG_ERROR("error executing hosted NAND read");

View File

@@ -38,9 +38,6 @@
* Representation of a pin on an AT91SAM9 chip.
*/
struct at91sam9_pin {
/** Target this pin is on. */
struct target *target;
/** Address of the PIO controller. */
uint32_t pioc;
@@ -52,9 +49,6 @@ struct at91sam9_pin {
* Private data for the controller that is stored in the NAND device structure.
*/
struct at91sam9_nand {
/** Target the NAND is attached to. */
struct target *target;
/** Address of the ECC controller for NAND. */
uint32_t ecc;
@@ -101,8 +95,7 @@ static int at91sam9_halted(struct target *target, const char *label)
*/
static int at91sam9_init(struct nand_device *nand)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!at91sam9_halted(target, "init")) {
return ERROR_NAND_OPERATION_FAILED;
@@ -117,9 +110,10 @@ static int at91sam9_init(struct nand_device *nand)
* @param info NAND controller information for controlling NAND device.
* @return Success or failure of the enabling.
*/
static int at91sam9_enable(struct at91sam9_nand *info)
static int at91sam9_enable(struct nand_device *nand)
{
struct target *target = info->target;
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
return target_write_u32(target, info->ce.pioc + AT91C_PIOx_CODR, 1 << info->ce.num);
}
@@ -130,9 +124,10 @@ static int at91sam9_enable(struct at91sam9_nand *info)
* @param info NAND controller information for controlling NAND device.
* @return Success or failure of the disabling.
*/
static int at91sam9_disable(struct at91sam9_nand *info)
static int at91sam9_disable(struct nand_device *nand)
{
struct target *target = info->target;
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = nand->target;
return target_write_u32(target, info->ce.pioc + AT91C_PIOx_SODR, 1 << info->ce.num);
}
@@ -147,13 +142,13 @@ static int at91sam9_disable(struct at91sam9_nand *info)
static int at91sam9_command(struct nand_device *nand, uint8_t command)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!at91sam9_halted(target, "command")) {
return ERROR_NAND_OPERATION_FAILED;
}
at91sam9_enable(info);
at91sam9_enable(nand);
return target_write_u8(target, info->cmd, command);
}
@@ -166,13 +161,11 @@ static int at91sam9_command(struct nand_device *nand, uint8_t command)
*/
static int at91sam9_reset(struct nand_device *nand)
{
struct at91sam9_nand *info = nand->controller_priv;
if (!at91sam9_halted(info->target, "reset")) {
if (!at91sam9_halted(nand->target, "reset")) {
return ERROR_NAND_OPERATION_FAILED;
}
return at91sam9_disable(info);
return at91sam9_disable(nand);
}
/**
@@ -185,9 +178,9 @@ static int at91sam9_reset(struct nand_device *nand)
static int at91sam9_address(struct nand_device *nand, uint8_t address)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!at91sam9_halted(info->target, "address")) {
if (!at91sam9_halted(nand->target, "address")) {
return ERROR_NAND_OPERATION_FAILED;
}
@@ -205,9 +198,9 @@ static int at91sam9_address(struct nand_device *nand, uint8_t address)
static int at91sam9_read_data(struct nand_device *nand, void *data)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!at91sam9_halted(info->target, "read data")) {
if (!at91sam9_halted(nand->target, "read data")) {
return ERROR_NAND_OPERATION_FAILED;
}
@@ -225,7 +218,7 @@ static int at91sam9_read_data(struct nand_device *nand, void *data)
static int at91sam9_write_data(struct nand_device *nand, uint16_t data)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!at91sam9_halted(target, "write data")) {
return ERROR_NAND_OPERATION_FAILED;
@@ -244,7 +237,7 @@ static int at91sam9_write_data(struct nand_device *nand, uint16_t data)
static int at91sam9_nand_ready(struct nand_device *nand, int timeout)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
uint32_t status;
if (!at91sam9_halted(target, "nand ready")) {
@@ -279,7 +272,7 @@ static int at91sam9_read_block_data(struct nand_device *nand, uint8_t *data, int
struct arm_nand_data *io = &info->io;
int status;
if (!at91sam9_halted(info->target, "read block")) {
if (!at91sam9_halted(nand->target, "read block")) {
return ERROR_NAND_OPERATION_FAILED;
}
@@ -304,7 +297,7 @@ static int at91sam9_write_block_data(struct nand_device *nand, uint8_t *data, in
struct arm_nand_data *io = &info->io;
int status;
if (!at91sam9_halted(info->target, "write block")) {
if (!at91sam9_halted(nand->target, "write block")) {
return ERROR_NAND_OPERATION_FAILED;
}
@@ -381,7 +374,7 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
{
int retval;
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
uint8_t *oob_data;
uint32_t status;
@@ -458,7 +451,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct at91sam9_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
int retval;
uint8_t *oob_data = oob;
uint32_t parity, nparity;
@@ -517,23 +510,16 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
*/
NAND_DEVICE_COMMAND_HANDLER(at91sam9_nand_device_command)
{
struct target *target = NULL;
unsigned long chip = 0, ecc = 0;
struct at91sam9_nand *info = NULL;
LOG_DEBUG("AT91SAM9 NAND Device Command\n");
LOG_DEBUG("AT91SAM9 NAND Device Command");
if (CMD_ARGC < 3 || CMD_ARGC > 4) {
LOG_ERROR("parameters: %s target chip_addr", CMD_ARGV[0]);
return ERROR_NAND_OPERATION_FAILED;
}
target = get_target(CMD_ARGV[1]);
if (!target) {
LOG_ERROR("invalid target: %s", CMD_ARGV[1]);
return ERROR_NAND_OPERATION_FAILED;
}
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], chip);
if (chip == 0) {
LOG_ERROR("invalid NAND chip address: %s", CMD_ARGV[2]);
@@ -554,14 +540,13 @@ NAND_DEVICE_COMMAND_HANDLER(at91sam9_nand_device_command)
return ERROR_NAND_OPERATION_FAILED;
}
info->target = target;
info->data = chip;
info->cmd = chip | (1 << 22);
info->addr = chip | (1 << 21);
info->ecc = ecc;
nand->controller_priv = info;
info->io.target = target;
info->io.target = nand->target;
info->io.data = info->data;
info->io.op = ARM_NAND_NONE;
@@ -697,28 +682,30 @@ static const struct command_registration at91sam9_sub_command_handlers[] = {
.handler = handle_at91sam9_cle_command,
.mode = COMMAND_CONFIG,
.help = "set command latch enable address line (default is 22)",
.usage = "<device_id> <address_line>",
.usage = "bank_id address_line",
},
{
.name = "ale",
.handler = handle_at91sam9_ale_command,
.mode = COMMAND_CONFIG,
.help = "set address latch enable address line (default is 21)",
.usage = "<device_id> <address_line>",
.usage = "bank_id address_line",
},
{
.name = "rdy_busy",
.handler = handle_at91sam9_rdy_busy_command,
.mode = COMMAND_CONFIG,
.help = "set the input pin connected to RDY/~BUSY signal (no default)",
.usage = "<device_id> <base_pioc> <pin_num>",
.help = "set the GPIO input pin connected to "
"the RDY/~BUSY signal (no default)",
.usage = "bank_id pio_base_addr pin_num",
},
{
.name = "ce",
.handler = handle_at91sam9_ce_command,
.mode = COMMAND_CONFIG,
.help = "set the output pin connected to chip enable signal (no default)",
.usage = "<device_id> <base_pioc> <pin_num>",
.help = "set the GPIO output pin connected to "
"the chip enable signal (no default)",
.usage = "bank_id pio_base_addr pin_num",
},
COMMAND_REGISTRATION_DONE
};

View File

@@ -42,8 +42,8 @@ void nand_device_add(struct nand_device *c)
/* Chip ID list
*
* Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
* options
* Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
* options, name
*
* Pagesize; 0, 256, 512
* 0 get this information from the extended chip ID
@@ -52,80 +52,86 @@ void nand_device_add(struct nand_device *c)
*/
static struct nand_info nand_flash_ids[] =
{
/* start "museum" IDs */
{"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
{"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
{"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
{"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
{"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
{"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
{"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
{"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
{"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
{"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
/* Vendor Specific Entries */
{ NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS, "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
{ NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS, "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
{"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
{"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
{"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
{"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
/* start "museum" IDs */
{ 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
{ 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
{ 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
{ 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
{ 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
{ 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
{ 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
{ 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
{ 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
{ 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
{ 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
{ 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
/* end "museum" IDs */
{"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
{"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
{"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
{"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
{ 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
{ 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
{ 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 1.8V 16-bit"},
{ 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 3.3V 16-bit"},
{"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
{"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
{"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
{"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
{ 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
{ 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
{ 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 1.8V 16-bit"},
{ 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 3.3V 16-bit"},
{"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
{"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
{"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
{"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
{ 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
{ 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
{ 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 1.8V 16-bit"},
{ 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 3.3V 16-bit"},
{"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
{"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
{"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
{"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
{"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
{"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
{"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},
{ 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
{ 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
{ 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
{"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
{ 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
{"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS},
{"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS},
{"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16},
{"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16},
{ 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
{ 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
{ 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
{ 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
{"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS},
{"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS},
{"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16},
{"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16},
{ 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
{ 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
{ 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
{ 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
{"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS},
{"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS},
{"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16},
{"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16},
{ 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
{ 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
{ 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
{ 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
{"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS},
{"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS},
{"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16},
{"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
{ 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
{ 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
{ 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
{ 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
{"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS},
{"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
{"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16},
{ 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
{ 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
{ 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
{ 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
{"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS},
{"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS},
{"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
{"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
{ 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
{ 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
{ 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
{ 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
{NULL, 0, 0, 0, 0, 0 }
{ 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
{0, 0, 0, 0, 0, 0, NULL}
};
/* Manufacturer ID list
@@ -160,7 +166,14 @@ static struct nand_ecclayout nand_oob_8 = {
};
#endif
struct nand_device *get_nand_device_by_name(const char *name)
/**
* Returns the flash bank specified by @a name, which matches the
* driver name and a suffix (option) specify the driver-specific
* bank number. The suffix consists of the '.' and the driver-specific
* bank number: when two davinci banks are defined, then 'davinci.1' refers
* to the second (e.g. DM355EVM).
*/
static struct nand_device *get_nand_device_by_name(const char *name)
{
unsigned requested = get_flash_name_index(name);
unsigned found = 0;
@@ -215,9 +228,11 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index,
int nand_build_bbt(struct nand_device *nand, int first, int last)
{
uint32_t page = 0x0;
uint32_t page;
int i;
int pages_per_block = (nand->erase_size / nand->page_size);
uint8_t oob[6];
int ret;
if ((first < 0) || (first >= nand->num_blocks))
first = 0;
@@ -225,9 +240,12 @@ int nand_build_bbt(struct nand_device *nand, int first, int last)
if ((last >= nand->num_blocks) || (last == -1))
last = nand->num_blocks - 1;
for (i = first; i < last; i++)
page = first * pages_per_block;
for (i = first; i <= last; i++)
{
nand_read_page(nand, page, NULL, 0, oob, 6);
ret = nand_read_page(nand, page, NULL, 0, oob, 6);
if (ret != ERROR_OK)
return ret;
if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
|| (((nand->page_size == 512) && (oob[5] != 0xff)) ||
@@ -241,7 +259,7 @@ int nand_build_bbt(struct nand_device *nand, int first, int last)
nand->blocks[i].is_bad = 0;
}
page += (nand->erase_size / nand->page_size);
page += pages_per_block;
}
return ERROR_OK;
@@ -349,7 +367,9 @@ int nand_probe(struct nand_device *nand)
for (i = 0; nand_flash_ids[i].name; i++)
{
if (nand_flash_ids[i].id == device_id)
if (nand_flash_ids[i].id == device_id &&
(nand_flash_ids[i].mfr_id == manufacturer_id ||
nand_flash_ids[i].mfr_id == 0 ))
{
nand->device = &nand_flash_ids[i];
break;
@@ -521,7 +541,7 @@ int nand_erase(struct nand_device *nand, int first_block, int last_block)
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
if ((first_block < 0) || (last_block > nand->num_blocks))
if ((first_block < 0) || (last_block >= nand->num_blocks))
return ERROR_INVALID_ARGUMENTS;
/* make sure we know if a block is bad before erasing it */
@@ -764,6 +784,7 @@ int nand_page_command(struct nand_device *nand, uint32_t page,
if (!nand->controller->nand_ready(nand, 100))
return ERROR_NAND_OPERATION_TIMEOUT;
} else {
/* nand_poll_read() cannot be used during nand read */
alive_sleep(1);
}

View File

@@ -59,7 +59,8 @@ struct nand_ecclayout {
struct nand_device
{
char *name;
const char *name;
struct target *target;
struct nand_flash_controller *controller;
void *controller_priv;
struct nand_manufacturer *manufacturer;
@@ -91,17 +92,18 @@ enum
struct nand_manufacturer
{
int id;
char *name;
const char *name;
};
struct nand_info
{
char *name;
int mfr_id;
int id;
int page_size;
int chip_size;
int erase_size;
int options;
const char *name;
};
/* Option constants for bizarre disfunctionality and real features
@@ -197,15 +199,6 @@ enum oob_formats
};
/**
* Returns the flash bank specified by @a name, which matches the
* driver name and a suffix (option) specify the driver-specific
* bank number. The suffix consists of the '.' and the driver-specific
* bank number: when two davinci banks are defined, then 'davinci.1' refers
* to the second (e.g. DM355EVM).
*/
struct nand_device *get_nand_device_by_name(const char *name);
struct nand_device *get_nand_device_by_num(int num);
int nand_page_command(struct nand_device *nand, uint32_t page,
@@ -230,7 +223,6 @@ int nand_calculate_ecc_kw(struct nand_device *nand,
const uint8_t *dat, uint8_t *ecc_code);
int nand_register_commands(struct command_context *cmd_ctx);
int nand_init(struct command_context *cmd_ctx);
/// helper for parsing a nand device command argument string
COMMAND_HELPER(nand_command_get_device, unsigned name_index,

View File

@@ -39,8 +39,6 @@ enum ecc {
};
struct davinci_nand {
struct target *target;
uint8_t chipsel; /* chipselect 0..3 == CS2..CS5 */
uint8_t eccmode;
@@ -82,7 +80,7 @@ static int halted(struct target *target, const char *label)
static int davinci_init(struct nand_device *nand)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
uint32_t nandfcr;
if (!halted(target, "init"))
@@ -112,7 +110,7 @@ static int davinci_reset(struct nand_device *nand)
static int davinci_nand_ready(struct nand_device *nand, int timeout)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
uint32_t nandfsr;
/* NOTE: return code is zero/error, else success; not ERROR_* */
@@ -135,7 +133,7 @@ static int davinci_nand_ready(struct nand_device *nand, int timeout)
static int davinci_command(struct nand_device *nand, uint8_t command)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!halted(target, "command"))
return ERROR_NAND_OPERATION_FAILED;
@@ -147,7 +145,7 @@ static int davinci_command(struct nand_device *nand, uint8_t command)
static int davinci_address(struct nand_device *nand, uint8_t address)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!halted(target, "address"))
return ERROR_NAND_OPERATION_FAILED;
@@ -159,7 +157,7 @@ static int davinci_address(struct nand_device *nand, uint8_t address)
static int davinci_write_data(struct nand_device *nand, uint16_t data)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!halted(target, "write_data"))
return ERROR_NAND_OPERATION_FAILED;
@@ -171,7 +169,7 @@ static int davinci_write_data(struct nand_device *nand, uint16_t data)
static int davinci_read_data(struct nand_device *nand, void *data)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
if (!halted(target, "read_data"))
return ERROR_NAND_OPERATION_FAILED;
@@ -186,7 +184,7 @@ static int davinci_read_block_data(struct nand_device *nand,
uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
uint32_t nfdata = info->data;
uint32_t tmp;
@@ -219,7 +217,7 @@ static int davinci_write_block_data(struct nand_device *nand,
uint8_t *data, int data_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
uint32_t nfdata = info->data;
uint32_t tmp;
int status;
@@ -260,12 +258,12 @@ static int davinci_write_page(struct nand_device *nand, uint32_t page,
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
if (!halted(info->target, "write_page"))
if (!halted(nand->target, "write_page"))
return ERROR_NAND_OPERATION_FAILED;
/* Always write both data and OOB ... we are not "raw" I/O! */
if (!data) {
LOG_ERROR("Missing NAND data; try 'nand raw_access enable'\n");
LOG_ERROR("Missing NAND data; try 'nand raw_access enable'");
return ERROR_NAND_OPERATION_FAILED;
}
@@ -309,7 +307,7 @@ static int davinci_read_page(struct nand_device *nand, uint32_t page,
if (!nand->device)
return ERROR_NAND_DEVICE_NOT_PROBED;
if (!halted(info->target, "read_page"))
if (!halted(nand->target, "read_page"))
return ERROR_NAND_OPERATION_FAILED;
return info->read_page(nand, page, data, data_size, oob, oob_size);
@@ -318,7 +316,7 @@ static int davinci_read_page(struct nand_device *nand, uint32_t page,
static void davinci_write_pagecmd(struct nand_device *nand, uint8_t cmd, uint32_t page)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
int page3 = nand->address_cycles - (nand->page_size == 512);
/* write command ({page,otp}x{read,program} */
@@ -338,11 +336,32 @@ static void davinci_write_pagecmd(struct nand_device *nand, uint8_t cmd, uint32_
target_write_u8(target, info->addr, page >> 24);
}
static int davinci_seek_column(struct nand_device *nand, uint16_t column)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = nand->target;
/* Random read, we must have issued a page read already */
target_write_u8(target, info->cmd, NAND_CMD_RNDOUT);
target_write_u8(target, info->addr, column);
if (nand->page_size > 512) {
target_write_u8(target, info->addr, column >> 8);
target_write_u8(target, info->cmd, NAND_CMD_RNDOUTSTART);
}
if (!davinci_nand_ready(nand, 100))
return ERROR_NAND_OPERATION_TIMEOUT;
return ERROR_OK;
}
static int davinci_writepage_tail(struct nand_device *nand,
uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
uint8_t status;
if (oob_size)
@@ -375,7 +394,7 @@ static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
{
unsigned oob_offset;
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
const uint32_t fcr_addr = info->aemif + NANDFCR;
const uint32_t ecc1_addr = info->aemif + NANDFECC + (4 * info->chipsel);
uint32_t fcr, ecc1;
@@ -463,7 +482,7 @@ static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
struct davinci_nand *info = nand->controller_priv;
const uint8_t *l;
struct target *target = info->target;
struct target *target = nand->target;
const uint32_t fcr_addr = info->aemif + NANDFCR;
const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
uint32_t fcr, ecc4;
@@ -543,7 +562,7 @@ static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct davinci_nand *info = nand->controller_priv;
struct target *target = info->target;
struct target *target = nand->target;
const uint32_t fcr_addr = info->aemif + NANDFCR;
const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
uint32_t fcr, ecc4;
@@ -599,6 +618,10 @@ static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
static int davinci_read_page_ecc4infix(struct nand_device *nand, uint32_t page,
uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
int read_size;
int want_col, at_col;
int ret;
davinci_write_pagecmd(nand, NAND_CMD_READ0, page);
/* large page devices need a start command */
@@ -610,25 +633,49 @@ static int davinci_read_page_ecc4infix(struct nand_device *nand, uint32_t page,
/* NOTE: not bothering to compute and use ECC data for now */
do {
/* write 512 bytes */
davinci_read_block_data(nand, data, 512);
data += 512;
data_size -= 512;
want_col = 0;
at_col = 0;
while ((data && data_size) || (oob && oob_size)) {
/* read this "out-of-band" data -- infix */
davinci_read_block_data(nand, oob, 16);
oob += 16;
oob_size -= 16;
} while (data_size);
if (data && data_size) {
if (want_col != at_col) {
/* Reads are slow, so seek past them when we can */
ret = davinci_seek_column(nand, want_col);
if (ret != ERROR_OK)
return ret;
at_col = want_col;
}
/* read 512 bytes or data_size, whichever is smaller*/
read_size = data_size > 512 ? 512 : data_size;
davinci_read_block_data(nand, data, read_size);
data += read_size;
data_size -= read_size;
at_col += read_size;
}
want_col += 512;
if (oob && oob_size) {
if (want_col != at_col) {
ret = davinci_seek_column(nand, want_col);
if (ret != ERROR_OK)
return ret;
at_col = want_col;
}
/* read this "out-of-band" data -- infix */
read_size = oob_size > 16 ? 16 : oob_size;
davinci_read_block_data(nand, oob, read_size);
oob += read_size;
oob_size -= read_size;
at_col += read_size;
}
want_col += 16;
}
return ERROR_OK;
}
NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
{
struct davinci_nand *info;
struct target *target;
unsigned long chip, aemif;
enum ecc eccmode;
int chipsel;
@@ -648,12 +695,6 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
goto fail;
}
target = get_target(CMD_ARGV[1]);
if (!target) {
LOG_ERROR("invalid target %s", CMD_ARGV[1]);
goto fail;
}
COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], chip);
if (chip == 0) {
LOG_ERROR("Invalid NAND chip address %s", CMD_ARGV[2]);
@@ -699,7 +740,6 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
if (info == NULL)
goto fail;
info->target = target;
info->eccmode = eccmode;
info->chipsel = chipsel;
info->aemif = aemif;
@@ -709,7 +749,7 @@ NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
nand->controller_priv = info;
info->io.target = target;
info->io.target = nand->target;
info->io.data = info->data;
info->io.op = ARM_NAND_NONE;

View File

@@ -31,13 +31,17 @@
extern struct nand_flash_controller nonce_nand_controller;
extern struct nand_flash_controller davinci_nand_controller;
extern struct nand_flash_controller lpc3180_nand_controller;
extern struct nand_flash_controller lpc32xx_nand_controller;
extern struct nand_flash_controller orion_nand_controller;
extern struct nand_flash_controller s3c2410_nand_controller;
extern struct nand_flash_controller s3c2412_nand_controller;
extern struct nand_flash_controller s3c2440_nand_controller;
extern struct nand_flash_controller s3c2443_nand_controller;
extern struct nand_flash_controller s3c6400_nand_controller;
extern struct nand_flash_controller imx27_nand_flash_controller;
extern struct nand_flash_controller imx31_nand_flash_controller;
extern struct nand_flash_controller at91sam9_nand_controller;
extern struct nand_flash_controller nuc910_nand_controller;
/* extern struct nand_flash_controller boundary_scan_nand_controller; */
@@ -46,13 +50,17 @@ static struct nand_flash_controller *nand_flash_controllers[] =
&nonce_nand_controller,
&davinci_nand_controller,
&lpc3180_nand_controller,
&lpc32xx_nand_controller,
&orion_nand_controller,
&s3c2410_nand_controller,
&s3c2412_nand_controller,
&s3c2440_nand_controller,
&s3c2443_nand_controller,
&s3c6400_nand_controller,
&imx27_nand_flash_controller,
&imx31_nand_flash_controller,
&at91sam9_nand_controller,
&nuc910_nand_controller,
/* &boundary_scan_nand_controller, */
NULL
};

View File

@@ -35,16 +35,13 @@ struct nand_device;
struct nand_flash_controller
{
/** Driver name that is used to select it from configuration files. */
char *name;
const char *name;
const struct command_registration *commands;
/** NAND device command called when driver is instantiated during configuration. */
__NAND_DEVICE_COMMAND((*nand_device_command));
/** Register controller specific commands as a TCL interface to the driver. */
int (*register_commands)(struct command_context *cmd_ctx);
/** Initialize the NAND device. */
int (*init)(struct nand_device *nand);
@@ -75,9 +72,6 @@ struct nand_flash_controller
/** Read a page from the NAND device. */
int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
/** Check if the controller is ready for more instructions with timeout. */
int (*controller_ready)(struct nand_device *nand, int timeout);
/** Check if the NAND device is ready for more instructions with timeout. */
int (*nand_ready)(struct nand_device *nand, int timeout);
};

View File

@@ -120,3 +120,64 @@ int nand_calculate_ecc(struct nand_device *nand, const uint8_t *dat, uint8_t *ec
return 0;
}
static inline int countbits(uint32_t b)
{
int res = 0;
for (;b; b >>= 1)
res += b & 0x01;
return res;
}
/**
* nand_correct_data - Detect and correct a 1 bit error for 256 byte block
*/
int nand_correct_data(struct nand_device *nand, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
uint8_t s0, s1, s2;
#ifdef NAND_ECC_SMC
s0 = calc_ecc[0] ^ read_ecc[0];
s1 = calc_ecc[1] ^ read_ecc[1];
s2 = calc_ecc[2] ^ read_ecc[2];
#else
s1 = calc_ecc[0] ^ read_ecc[0];
s0 = calc_ecc[1] ^ read_ecc[1];
s2 = calc_ecc[2] ^ read_ecc[2];
#endif
if ((s0 | s1 | s2) == 0)
return 0;
/* Check for a single bit error */
if( ((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
uint32_t byteoffs, bitnum;
byteoffs = (s1 << 0) & 0x80;
byteoffs |= (s1 << 1) & 0x40;
byteoffs |= (s1 << 2) & 0x20;
byteoffs |= (s1 << 3) & 0x10;
byteoffs |= (s0 >> 4) & 0x08;
byteoffs |= (s0 >> 3) & 0x04;
byteoffs |= (s0 >> 2) & 0x02;
byteoffs |= (s0 >> 1) & 0x01;
bitnum = (s2 >> 5) & 0x04;
bitnum |= (s2 >> 4) & 0x02;
bitnum |= (s2 >> 3) & 0x01;
dat[byteoffs] ^= (1 << bitnum);
return 1;
}
if(countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 <<16)) == 1)
return 1;
return -1;
}

View File

@@ -180,7 +180,13 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
return retval;
if (!need_size)
state->size = state->fileio.size;
{
int filesize;
retval = fileio_size(&state->fileio, &filesize);
if (retval != ERROR_OK)
return retval;
state->size = filesize;
}
*dev = nand;

View File

@@ -1,6 +1,9 @@
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
*
* Copyright (C) 2010 richard vegh <vegh.ricsi@gmail.com> *
* Copyright (C) 2010 Oyvind Harboe <oyvind.harboe@zylin.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -28,6 +31,13 @@
static int lpc3180_reset(struct nand_device *nand);
static int lpc3180_controller_ready(struct nand_device *nand, int timeout);
static int lpc3180_tc_ready(struct nand_device *nand, int timeout);
#define ECC_OFFS 0x120
#define SPARE_OFFS 0x140
#define DATA_OFFS 0x200
/* nand device lpc3180 <target#> <oscillator_frequency>
*/
@@ -39,13 +49,6 @@ NAND_DEVICE_COMMAND_HANDLER(lpc3180_nand_device_command)
return ERROR_FLASH_BANK_INVALID;
}
struct target *target = get_target(CMD_ARGV[1]);
if (NULL == target)
{
LOG_ERROR("target '%s' not defined", CMD_ARGV[1]);
return ERROR_NAND_DEVICE_INVALID;
}
uint32_t osc_freq;
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], osc_freq);
@@ -53,7 +56,6 @@ NAND_DEVICE_COMMAND_HANDLER(lpc3180_nand_device_command)
lpc3180_info = malloc(sizeof(struct lpc3180_nand_controller));
nand->controller_priv = lpc3180_info;
lpc3180_info->target = target;
lpc3180_info->osc_freq = osc_freq;
if ((lpc3180_info->osc_freq < 1000) || (lpc3180_info->osc_freq > 20000))
@@ -96,9 +98,10 @@ static int lpc3180_pll(int fclkin, uint32_t pll_ctrl)
return (m / (2 * p)) * (fclkin / n);
}
static float lpc3180_cycle_time(struct lpc3180_nand_controller *lpc3180_info)
static float lpc3180_cycle_time(struct nand_device *nand)
{
struct target *target = lpc3180_info->target;
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = nand->target;
uint32_t sysclk_ctrl, pwr_ctrl, hclkdiv_ctrl, hclkpll_ctrl;
int sysclk;
int hclk;
@@ -149,7 +152,7 @@ static float lpc3180_cycle_time(struct lpc3180_nand_controller *lpc3180_info)
static int lpc3180_init(struct nand_device *nand)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
int bus_width = nand->bus_width ? : 8;
int address_cycles = nand->address_cycles ? : 3;
int page_size = nand->page_size ? : 512;
@@ -224,7 +227,7 @@ static int lpc3180_init(struct nand_device *nand)
target_write_u32(target, 0x200b8030, mlc_icr_value);
/* calculate NAND controller timings */
cycle = lpc3180_cycle_time(lpc3180_info);
cycle = lpc3180_cycle_time(nand);
twp = ((40 / cycle) + 1);
twh = ((20 / cycle) + 1);
@@ -253,11 +256,24 @@ static int lpc3180_init(struct nand_device *nand)
/* FLASHCLK_CTRL = 0x05 (enable clock for SLC flash controller) */
target_write_u32(target, 0x400040c8, 0x05);
/* SLC_CFG = 0x (Force nCE assert, ECC enabled, WIDTH = bus_width) */
target_write_u32(target, 0x20020014, 0x28 | (bus_width == 16) ? 1 : 0);
/* after reset set other registers of SLC so reset calling is here at the begining*/
lpc3180_reset(nand);
/* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, DMA read from SLC, WIDTH = bus_width) */
target_write_u32(target, 0x20020014, 0x3e | (bus_width == 16) ? 1 : 0);
/* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
target_write_u32(target, 0x20020020, 0x03);
/* DMA configuration */
/* DMACLK_CTRL = 0x01 (enable clock for DMA controller) */
target_write_u32(target, 0x400040e8, 0x01);
/* DMACConfig = DMA enabled*/
target_write_u32(target, 0x31000030, 0x01);
/* calculate NAND controller timings */
cycle = lpc3180_cycle_time(lpc3180_info);
cycle = lpc3180_cycle_time(nand);
r_setup = w_setup = 0;
r_hold = w_hold = 10 / cycle;
@@ -270,7 +286,6 @@ static int lpc3180_init(struct nand_device *nand)
((r_width & 0xf) << 8) | ((r_rdy & 0xf) << 12) | ((w_setup & 0xf) << 16) |
((w_hold & 0xf) << 20) | ((w_width & 0xf) << 24) | ((w_rdy & 0xf) << 28));
lpc3180_reset(nand);
}
return ERROR_OK;
@@ -279,7 +294,7 @@ static int lpc3180_init(struct nand_device *nand)
static int lpc3180_reset(struct nand_device *nand)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -321,7 +336,7 @@ static int lpc3180_reset(struct nand_device *nand)
static int lpc3180_command(struct nand_device *nand, uint8_t command)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -351,7 +366,7 @@ static int lpc3180_command(struct nand_device *nand, uint8_t command)
static int lpc3180_address(struct nand_device *nand, uint8_t address)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -381,7 +396,7 @@ static int lpc3180_address(struct nand_device *nand, uint8_t address)
static int lpc3180_write_data(struct nand_device *nand, uint16_t data)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -411,7 +426,7 @@ static int lpc3180_write_data(struct nand_device *nand, uint16_t data)
static int lpc3180_read_data(struct nand_device *nand, void *data)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -473,9 +488,10 @@ static int lpc3180_read_data(struct nand_device *nand, void *data)
static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
int retval;
uint8_t status;
uint8_t *page_buffer;
if (target->state != TARGET_HALTED)
{
@@ -490,7 +506,6 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
uint8_t *page_buffer;
uint8_t *oob_buffer;
int quarter, num_quarters;
@@ -500,9 +515,10 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
if (oob && (oob_size > 6))
if (oob && (oob_size > 24))
{
LOG_ERROR("LPC3180 MLC controller can't write more than 6 bytes of OOB data");
LOG_ERROR("LPC3180 MLC controller can't write more "
"than 6 bytes for each quarter's OOB data");
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
@@ -559,10 +575,10 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
data += thisrun_data_size;
}
memset(oob_buffer, 0xff, (nand->page_size == 512) ? 6 : 24);
memset(oob_buffer, 0xff, 6);
if (oob)
{
memcpy(page_buffer, oob, thisrun_oob_size);
memcpy(oob_buffer, oob, thisrun_oob_size);
oob_size -= thisrun_oob_size;
oob += thisrun_oob_size;
}
@@ -570,8 +586,10 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
/* write MLC_ECC_ENC_REG to start encode cycle */
target_write_u32(target, 0x200b8008, 0x0);
target_write_memory(target, 0x200a8000, 4, 128, page_buffer + (quarter * 512));
target_write_memory(target, 0x200a8000, 1, 6, oob_buffer + (quarter * 6));
target_write_memory(target, 0x200a8000,
4, 128, page_buffer);
target_write_memory(target, 0x200a8000,
1, 6, oob_buffer);
/* write MLC_ECC_AUTO_ENC_REG to start auto encode */
target_write_u32(target, 0x200b8010, 0x0);
@@ -603,8 +621,202 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
/**********************************************************************
* Write both SLC NAND flash page main area and spare area.
* Small page -
* ------------------------------------------
* | 512 bytes main | 16 bytes spare |
* ------------------------------------------
* Large page -
* ------------------------------------------
* | 2048 bytes main | 64 bytes spare |
* ------------------------------------------
* If DMA & ECC enabled, then the ECC generated for the 1st 256-byte
* data is written to the 3rd word of the spare area. The ECC
* generated for the 2nd 256-byte data is written to the 4th word
* of the spare area. The ECC generated for the 3rd 256-byte data is
* written to the 7th word of the spare area. The ECC generated
* for the 4th 256-byte data is written to the 8th word of the
* spare area and so on.
*
**********************************************************************/
int i=0,target_mem_base;
uint8_t *ecc_flash_buffer;
struct working_area *pworking_area;
if(lpc3180_info->is_bulk){
if (!data && oob){
/*if oob only mode is active original method is used as SLC controller hangs during DMA interworking. Anyway the code supports the oob only mode below. */
return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
}
retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
if (ERROR_OK != retval)
return retval;
/* allocate a working area */
if (target->working_area_size < (uint32_t) nand->page_size + 0x200){
LOG_ERROR("Reserve at least 0x%x physical target working area",nand->page_size + 0x200);
return ERROR_FLASH_OPERATION_FAILED;
}
if (target->working_area_phys%4){
LOG_ERROR("Reserve the physical target working area at word boundary");
return ERROR_FLASH_OPERATION_FAILED;
}
if (target_alloc_working_area(target, target->working_area_size, &pworking_area) != ERROR_OK)
{
LOG_ERROR("no working area specified, can't read LPC internal flash");
return ERROR_FLASH_OPERATION_FAILED;
}
target_mem_base = target->working_area_phys;
if (nand->page_size == 2048)
{
page_buffer = malloc(2048);
}
else
{
page_buffer = malloc(512);
}
ecc_flash_buffer = malloc(64);
/* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, DMA write to SLC, WIDTH = bus_width) */
target_write_u32(target, 0x20020014, 0x3c);
if( data && !oob){
/* set DMA LLI-s in target memory and in DMA*/
for(i=0;i<nand->page_size/0x100;i++){
int tmp;
/* -------LLI for 256 byte block---------*/
/* DMACC0SrcAddr = SRAM */
target_write_u32(target,target_mem_base+0+i*32,target_mem_base+DATA_OFFS+i*256 );
if(i==0) target_write_u32(target,0x31000100,target_mem_base+DATA_OFFS );
/* DMACCxDestAddr = SLC_DMA_DATA */
target_write_u32(target,target_mem_base+4+i*32,0x20020038 );
if(i==0) target_write_u32(target,0x31000104,0x20020038 );
/* DMACCxLLI = next element */
tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc;
target_write_u32(target,target_mem_base+8+i*32, tmp );
if(i==0) target_write_u32(target,0x31000108, tmp );
/* DMACCxControl = TransferSize =64, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 1,
Destination increment = 0, Terminal count interrupt enable bit = 0*/
target_write_u32(target,target_mem_base+12+i*32,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
if(i==0) target_write_u32(target,0x3100010c,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
/* -------LLI for 3 byte ECC---------*/
/* DMACC0SrcAddr = SLC_ECC*/
target_write_u32(target,target_mem_base+16+i*32,0x20020034 );
/* DMACCxDestAddr = SRAM */
target_write_u32(target,target_mem_base+20+i*32,target_mem_base+SPARE_OFFS+8+16*(i>>1)+(i%2)*4 );
/* DMACCxLLI = next element */
tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc;
target_write_u32(target,target_mem_base+24+i*32, tmp );
/* DMACCxControl = TransferSize =1, Source burst size =4, Destination burst size = 4, Source transfer width = 32 bit,
Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
Destination increment = 1, Terminal count interrupt enable bit = 0*/
target_write_u32(target,target_mem_base+28+i*32,0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
}
}
else if (data && oob){
/* -------LLI for 512 or 2048 bytes page---------*/
/* DMACC0SrcAddr = SRAM */
target_write_u32(target,target_mem_base,target_mem_base+DATA_OFFS );
target_write_u32(target,0x31000100,target_mem_base+DATA_OFFS );
/* DMACCxDestAddr = SLC_DMA_DATA */
target_write_u32(target,target_mem_base+4,0x20020038 );
target_write_u32(target,0x31000104,0x20020038 );
/* DMACCxLLI = next element */
target_write_u32(target,target_mem_base+8, (target_mem_base+32)&0xfffffffc );
target_write_u32(target,0x31000108, (target_mem_base+32)&0xfffffffc );
/* DMACCxControl = TransferSize =512 or 128, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 1,
Destination increment = 0, Terminal count interrupt enable bit = 0*/
target_write_u32(target,target_mem_base+12,(nand->page_size==2048?512:128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
target_write_u32(target,0x3100010c,(nand->page_size==2048?512:128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
i = 1;
}
else if (!data && oob){
i = 0;
}
/* -------LLI for spare area---------*/
/* DMACC0SrcAddr = SRAM*/
target_write_u32(target,target_mem_base+0+i*32,target_mem_base+SPARE_OFFS );
if(i==0) target_write_u32(target,0x31000100,target_mem_base+SPARE_OFFS );
/* DMACCxDestAddr = SLC_DMA_DATA */
target_write_u32(target,target_mem_base+4+i*32,0x20020038 );
if(i==0) target_write_u32(target,0x31000104,0x20020038 );
/* DMACCxLLI = next element = NULL */
target_write_u32(target,target_mem_base+8+i*32, 0 );
if(i==0) target_write_u32(target,0x31000108,0 );
/* DMACCxControl = TransferSize =16 for large page or 4 for small page, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 1,
Destination increment = 0, Terminal count interrupt enable bit = 0*/
target_write_u32(target,target_mem_base+12+i*32, (nand->page_size==2048?0x10:0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31);
if(i==0) target_write_u32(target,0x3100010c,(nand->page_size==2048?0x10:0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 | 0<<27| 0<<31 );
memset(ecc_flash_buffer, 0xff, 64);
if( oob ){
memcpy(ecc_flash_buffer,oob, oob_size);
}
target_write_memory(target, target_mem_base+SPARE_OFFS, 4, 16, ecc_flash_buffer);
if (data){
memset(page_buffer, 0xff, nand->page_size == 2048?2048:512);
memcpy(page_buffer,data, data_size);
target_write_memory(target, target_mem_base+DATA_OFFS, 4, nand->page_size == 2048?512:128, page_buffer);
}
free(page_buffer);
free(ecc_flash_buffer);
/* Enable DMA after channel set up !
LLI only works when DMA is the flow controller!
*/
/* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC), FlowCntrl = 2 (Pher -> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/
target_write_u32(target,0x31000110, 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18);
/* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
target_write_u32(target, 0x20020010, 0x3);
/* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
target_write_u32(target, 0x20020028, 2);
/* SLC_TC */
if (!data && oob)
target_write_u32(target, 0x20020030, (nand->page_size==2048?0x10:0x04));
else
target_write_u32(target, 0x20020030, (nand->page_size==2048?0x840:0x210));
nand_write_finish(nand);
if (!lpc3180_tc_ready(nand, 1000))
{
LOG_ERROR("timeout while waiting for completion of DMA");
return ERROR_NAND_OPERATION_FAILED;
}
target_free_working_area(target,pworking_area);
LOG_INFO("Page = 0x%" PRIx32 " was written.",page);
}
else
return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
}
return ERROR_OK;
}
@@ -612,7 +824,8 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
uint8_t *page_buffer;
if (target->state != TARGET_HALTED)
{
@@ -627,7 +840,6 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
}
else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
uint8_t *page_buffer;
uint8_t *oob_buffer;
uint32_t page_bytes_done = 0;
uint32_t oob_bytes_done = 0;
@@ -750,6 +962,174 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
/**********************************************************************
* Read both SLC NAND flash page main area and spare area.
* Small page -
* ------------------------------------------
* | 512 bytes main | 16 bytes spare |
* ------------------------------------------
* Large page -
* ------------------------------------------
* | 2048 bytes main | 64 bytes spare |
* ------------------------------------------
* If DMA & ECC enabled, then the ECC generated for the 1st 256-byte
* data is compared with the 3rd word of the spare area. The ECC
* generated for the 2nd 256-byte data is compared with the 4th word
* of the spare area. The ECC generated for the 3rd 256-byte data is
* compared with the 7th word of the spare area. The ECC generated
* for the 4th 256-byte data is compared with the 8th word of the
* spare area and so on.
*
**********************************************************************/
int retval,i,target_mem_base;
uint8_t *ecc_hw_buffer;
uint8_t *ecc_flash_buffer;
struct working_area *pworking_area;
if(lpc3180_info->is_bulk){
/* read always the data and also oob areas*/
retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
if (ERROR_OK != retval)
return retval;
/* allocate a working area */
if (target->working_area_size < (uint32_t) nand->page_size + 0x200){
LOG_ERROR("Reserve at least 0x%x physical target working area",nand->page_size + 0x200);
return ERROR_FLASH_OPERATION_FAILED;
}
if (target->working_area_phys%4){
LOG_ERROR("Reserve the physical target working area at word boundary");
return ERROR_FLASH_OPERATION_FAILED;
}
if (target_alloc_working_area(target, target->working_area_size, &pworking_area) != ERROR_OK)
{
LOG_ERROR("no working area specified, can't read LPC internal flash");
return ERROR_FLASH_OPERATION_FAILED;
}
target_mem_base = target->working_area_phys;
if (nand->page_size == 2048)
{
page_buffer = malloc(2048);
}
else
{
page_buffer = malloc(512);
}
ecc_hw_buffer = malloc(32);
ecc_flash_buffer = malloc(64);
/* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled, DMA read from SLC, WIDTH = bus_width) */
target_write_u32(target, 0x20020014, 0x3e);
/* set DMA LLI-s in target memory and in DMA*/
for(i=0;i<nand->page_size/0x100;i++){
int tmp;
/* -------LLI for 256 byte block---------*/
/* DMACC0SrcAddr = SLC_DMA_DATA*/
target_write_u32(target,target_mem_base+0+i*32,0x20020038 );
if(i==0) target_write_u32(target,0x31000100,0x20020038 );
/* DMACCxDestAddr = SRAM */
target_write_u32(target,target_mem_base+4+i*32,target_mem_base+DATA_OFFS+i*256 );
if(i==0) target_write_u32(target,0x31000104,target_mem_base+DATA_OFFS );
/* DMACCxLLI = next element */
tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc;
target_write_u32(target,target_mem_base+8+i*32, tmp );
if(i==0) target_write_u32(target,0x31000108, tmp );
/* DMACCxControl = TransferSize =64, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
Destination increment = 1, Terminal count interrupt enable bit = 0*/
target_write_u32(target,target_mem_base+12+i*32,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
if(i==0) target_write_u32(target,0x3100010c,0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
/* -------LLI for 3 byte ECC---------*/
/* DMACC0SrcAddr = SLC_ECC*/
target_write_u32(target,target_mem_base+16+i*32,0x20020034 );
/* DMACCxDestAddr = SRAM */
target_write_u32(target,target_mem_base+20+i*32,target_mem_base+ECC_OFFS+i*4 );
/* DMACCxLLI = next element */
tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc;
target_write_u32(target,target_mem_base+24+i*32, tmp );
/* DMACCxControl = TransferSize =1, Source burst size =4, Destination burst size = 4, Source transfer width = 32 bit,
Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
Destination increment = 1, Terminal count interrupt enable bit = 0*/
target_write_u32(target,target_mem_base+28+i*32,0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
}
/* -------LLI for spare area---------*/
/* DMACC0SrcAddr = SLC_DMA_DATA*/
target_write_u32(target,target_mem_base+0+i*32,0x20020038 );
/* DMACCxDestAddr = SRAM */
target_write_u32(target,target_mem_base+4+i*32,target_mem_base+SPARE_OFFS );
/* DMACCxLLI = next element = NULL */
target_write_u32(target,target_mem_base+8+i*32, 0 );
/* DMACCxControl = TransferSize =16 for large page or 4 for small page, Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
Destination transfer width = 32 bit, Source AHB master select = M0, Destination AHB master select = M0, Source increment = 0,
Destination increment = 1, Terminal count interrupt enable bit = 0*/
target_write_u32(target,target_mem_base+12+i*32, (nand->page_size==2048?0x10:0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27| 0<<31);
/* Enable DMA after channel set up !
LLI only works when DMA is the flow controller!
*/
/* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC), FlowCntrl = 2 (Pher-> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/
target_write_u32(target,0x31000110, 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18);
/* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
target_write_u32(target, 0x20020010, 0x3);
/* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
target_write_u32(target, 0x20020028, 2);
/* SLC_TC */
target_write_u32(target, 0x20020030, (nand->page_size==2048?0x840:0x210));
if (!lpc3180_tc_ready(nand, 1000))
{
LOG_ERROR("timeout while waiting for completion of DMA");
free(page_buffer);
free(ecc_hw_buffer);
free(ecc_flash_buffer);
target_free_working_area(target,pworking_area);
return ERROR_NAND_OPERATION_FAILED;
}
if (data){
target_read_memory(target, target_mem_base+DATA_OFFS, 4, nand->page_size == 2048?512:128, page_buffer);
memcpy(data, page_buffer, data_size);
LOG_INFO("Page = 0x%" PRIx32 " was read.",page);
/* check hw generated ECC for each 256 bytes block with the saved ECC in flash spare area*/
int idx = nand->page_size/0x200 ;
target_read_memory(target, target_mem_base+SPARE_OFFS, 4, 16, ecc_flash_buffer);
target_read_memory(target, target_mem_base+ECC_OFFS, 4, 8, ecc_hw_buffer);
for(i=0;i<idx;i++){
if( (0x00ffffff&*(uint32_t *)(void *)(ecc_hw_buffer+i*8)) != (0x00ffffff&*(uint32_t *)(void *)(ecc_flash_buffer+8+i*16)) )
LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+1,page);
if( (0x00ffffff&*(uint32_t *)(void *)(ecc_hw_buffer+4+i*8)) != (0x00ffffff&*(uint32_t *)(void *)(ecc_flash_buffer+12+i*16)) )
LOG_WARNING("ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,i*2+2,page);
}
}
if (oob)
memcpy(oob, ecc_flash_buffer, oob_size);
free(page_buffer);
free(ecc_hw_buffer);
free(ecc_flash_buffer);
target_free_working_area(target,pworking_area);
}
else
return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
}
@@ -759,8 +1139,7 @@ static int lpc3180_read_page(struct nand_device *nand, uint32_t page, uint8_t *d
static int lpc3180_controller_ready(struct nand_device *nand, int timeout)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
uint8_t status = 0x0;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -768,20 +1147,35 @@ static int lpc3180_controller_ready(struct nand_device *nand, int timeout)
return ERROR_NAND_OPERATION_FAILED;
}
LOG_DEBUG("lpc3180_controller_ready count start=%d", timeout);
do
{
if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
{
uint8_t status;
/* Read MLC_ISR, wait for controller to become ready */
target_read_u8(target, 0x200b8048, &status);
if (status & 2)
if (status & 2) {
LOG_DEBUG("lpc3180_controller_ready count=%d",
timeout);
return 1;
}
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
/* we pretend that the SLC controller is always ready */
return 1;
uint32_t status;
/* Read SLC_STAT and check READY bit */
target_read_u32(target, 0x20020018, &status);
if (status & 1) {
LOG_DEBUG("lpc3180_controller_ready count=%d",
timeout);
return 1;
}
}
alive_sleep(1);
@@ -793,7 +1187,7 @@ static int lpc3180_controller_ready(struct nand_device *nand, int timeout)
static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = lpc3180_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -801,6 +1195,8 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
return ERROR_NAND_OPERATION_FAILED;
}
LOG_DEBUG("lpc3180_nand_ready count start=%d", timeout);
do
{
if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
@@ -810,8 +1206,11 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
/* Read MLC_ISR, wait for NAND flash device to become ready */
target_read_u8(target, 0x200b8048, &status);
if (status & 1)
if (status & 1) {
LOG_DEBUG("lpc3180_nand_ready count end=%d",
timeout);
return 1;
}
}
else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
@@ -820,8 +1219,11 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
/* Read SLC_STAT and check READY bit */
target_read_u32(target, 0x20020018, &status);
if (status & 1)
if (status & 1) {
LOG_DEBUG("lpc3180_nand_ready count end=%d",
timeout);
return 1;
}
}
alive_sleep(1);
@@ -830,6 +1232,42 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
return 0;
}
static int lpc3180_tc_ready(struct nand_device *nand, int timeout)
{
struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
return ERROR_NAND_OPERATION_FAILED;
}
LOG_DEBUG("lpc3180_tc_ready count start=%d",
timeout);
do
{
if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
{
uint32_t status = 0x0;
/* Read SLC_INT_STAT and check INT_TC_STAT bit */
target_read_u32(target, 0x2002001c, &status);
if (status & 2){
LOG_DEBUG("lpc3180_tc_ready count=%d",
timeout);
return 1;
}
}
alive_sleep(1);
} while (timeout-- > 0);
return 0;
}
COMMAND_HANDLER(handle_lpc3180_select_command)
{
struct lpc3180_nand_controller *lpc3180_info = NULL;
@@ -838,13 +1276,13 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
"no", "mlc", "slc"
};
if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
unsigned num;
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], num);
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
struct nand_device *nand = get_nand_device_by_num(num);
if (!nand)
{
@@ -854,7 +1292,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
lpc3180_info = nand->controller_priv;
if (CMD_ARGC == 2)
if (CMD_ARGC >= 2)
{
if (strcmp(CMD_ARGV[1], "mlc") == 0)
{
@@ -863,6 +1301,12 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
else if (strcmp(CMD_ARGV[1], "slc") == 0)
{
lpc3180_info->selected_controller = LPC3180_SLC_CONTROLLER;
if (CMD_ARGC == 3 && strcmp(CMD_ARGV[2], "bulk") == 0){
lpc3180_info->is_bulk = 1;
}
else{
lpc3180_info->is_bulk = 0;
}
}
else
{
@@ -870,7 +1314,12 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
}
}
if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
command_print(CMD_CTX, "%s controller selected", selected[lpc3180_info->selected_controller]);
else{
command_print(CMD_CTX, lpc3180_info->is_bulk?"%s controller selected bulk mode is avaliable":"%s controller selected bulk mode is not avaliable", selected[lpc3180_info->selected_controller]);
}
return ERROR_OK;
}
@@ -878,10 +1327,10 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
static const struct command_registration lpc3180_exec_command_handlers[] = {
{
.name = "select",
.handler = &handle_lpc3180_select_command,
.handler = handle_lpc3180_select_command,
.mode = COMMAND_EXEC,
.help = "select <'mlc'|'slc'> controller (default is mlc)",
.usage = "<device_id> (mlc|slc)",
.help = "select MLC or SLC controller (default is MLC), SLC can be set to bulk mode",
.usage = "bank_id ['mlc'|'slc' ['bulk'] ]",
},
COMMAND_REGISTRATION_DONE
};
@@ -896,17 +1345,16 @@ static const struct command_registration lpc3180_command_handler[] = {
};
struct nand_flash_controller lpc3180_nand_controller = {
.name = "lpc3180",
.commands = lpc3180_command_handler,
.nand_device_command = lpc3180_nand_device_command,
.init = lpc3180_init,
.reset = lpc3180_reset,
.command = lpc3180_command,
.address = lpc3180_address,
.write_data = lpc3180_write_data,
.read_data = lpc3180_read_data,
.write_page = lpc3180_write_page,
.read_page = lpc3180_read_page,
.controller_ready = lpc3180_controller_ready,
.nand_ready = lpc3180_nand_ready,
};
.name = "lpc3180",
.commands = lpc3180_command_handler,
.nand_device_command = lpc3180_nand_device_command,
.init = lpc3180_init,
.reset = lpc3180_reset,
.command = lpc3180_command,
.address = lpc3180_address,
.write_data = lpc3180_write_data,
.read_data = lpc3180_read_data,
.write_page = lpc3180_write_page,
.read_page = lpc3180_read_page,
.nand_ready = lpc3180_nand_ready,
};

View File

@@ -29,9 +29,9 @@ enum lpc3180_selected_controller
struct lpc3180_nand_controller
{
struct target *target;
int osc_freq;
enum lpc3180_selected_controller selected_controller;
int is_bulk;
int sw_write_protection;
uint32_t sw_wp_lower_bound;
uint32_t sw_wp_upper_bound;

1828
src/flash/nand/lpc32xx.c Normal file

File diff suppressed because it is too large Load Diff

39
src/flash/nand/lpc32xx.h Normal file
View File

@@ -0,0 +1,39 @@
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef LPC32xx_NAND_CONTROLLER_H
#define LPC32xx_NAND_CONTROLLER_H
enum lpc32xx_selected_controller
{
LPC32xx_NO_CONTROLLER,
LPC32xx_MLC_CONTROLLER,
LPC32xx_SLC_CONTROLLER,
};
struct lpc32xx_nand_controller
{
int osc_freq;
enum lpc32xx_selected_controller selected_controller;
int sw_write_protection;
uint32_t sw_wp_lower_bound;
uint32_t sw_wp_upper_bound;
};
#endif /*LPC32xx_NAND_CONTROLLER_H */

761
src/flash/nand/mx2.c Normal file
View File

@@ -0,0 +1,761 @@
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
* *
* Copyright (C) 2010 by Gaetan CARLIER *
* Trump s.a., Belgium *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* Freescale iMX2* OpenOCD NAND Flash controller support.
* based on Freescale iMX3* OpenOCD NAND Flash controller support.
*/
/*
* driver tested with Samsung K9F2G08UXA and Numonyx/ST NAND02G-B2D @imx27
* tested "nand probe #", "nand erase # 0 #", "nand dump # file 0 #",
* "nand write # file 0", "nand verify"
*
* get_next_halfword_from_sram_buffer() not tested
* !! all function only tested with 2k page nand device; imx27_write_page
* writes the 4 MAIN_BUFFER's and is not compatible with < 2k page
* !! oob must be be used due to NFS bug
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "imp.h"
#include "mx2.h"
#include <target/target.h>
/* This permits to print (in LOG_INFO) how much bytes
* has been written after a page read or write.
* This is useful when OpenOCD is used with a graphical
* front-end to estimate progression of the global read/write
*/
#undef _MX2_PRINT_STAT
//#define _MX2_PRINT_STAT
static const char target_not_halted_err_msg[] =
"target must be halted to use mx2 NAND flash controller";
static const char data_block_size_err_msg[] =
"minimal granularity is one half-word, %" PRId32 " is incorrect";
static const char sram_buffer_bounds_err_msg[] =
"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
static const char get_status_register_err_msg[] = "can't get NAND status";
static uint32_t in_sram_address;
static unsigned char sign_of_sequental_byte_read;
static int initialize_nf_controller(struct nand_device *nand);
static int get_next_byte_from_sram_buffer(struct target * target, uint8_t * value);
static int get_next_halfword_from_sram_buffer(struct target * target,
uint16_t * value);
static int poll_for_complete_op(struct target * target, const char *text);
static int validate_target_state(struct nand_device *nand);
static int do_data_output(struct nand_device *nand);
static int imx27_command(struct nand_device *nand, uint8_t command);
static int imx27_address(struct nand_device *nand, uint8_t address);
NAND_DEVICE_COMMAND_HANDLER(imx27_nand_device_command)
{
struct mx2_nf_controller *mx2_nf_info;
int hwecc_needed;
int x;
mx2_nf_info = malloc(sizeof(struct mx2_nf_controller));
if (mx2_nf_info == NULL) {
LOG_ERROR("no memory for nand controller");
return ERROR_FAIL;
}
nand->controller_priv = mx2_nf_info;
if (CMD_ARGC < 3) {
LOG_ERROR("use \"nand device imx27 target noecc|hwecc\"");
return ERROR_FAIL;
}
/*
* check hwecc requirements
*/
hwecc_needed = strcmp(CMD_ARGV[2], "hwecc");
if (hwecc_needed == 0)
mx2_nf_info->flags.hw_ecc_enabled = 1;
else
mx2_nf_info->flags.hw_ecc_enabled = 0;
mx2_nf_info->optype = MX2_NF_DATAOUT_PAGE;
mx2_nf_info->fin = MX2_NF_FIN_NONE;
mx2_nf_info->flags.target_little_endian =
(nand->target->endianness == TARGET_LITTLE_ENDIAN);
/*
* testing host endianness
*/
x = 1;
if (*(char *) &x == 1)
mx2_nf_info->flags.host_little_endian = 1;
else
mx2_nf_info->flags.host_little_endian = 0;
return ERROR_OK;
}
static int imx27_init(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int validate_target_result;
uint16_t buffsize_register_content;
uint32_t pcsr_register_content;
int retval;
uint16_t nand_status_content;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
target_read_u16(target, MX2_NF_BUFSIZ, &buffsize_register_content);
mx2_nf_info->flags.one_kb_sram = !(buffsize_register_content & 0x000f);
target_read_u32(target, MX2_FMCR, &pcsr_register_content);
if (!nand->bus_width) {
/* bus_width not yet defined. Read it from MX2_FMCR */
nand->bus_width =
(pcsr_register_content & MX2_FMCR_NF_16BIT_SEL) ? 16 : 8;
} else {
/* bus_width forced in soft. Sync it to MX2_FMCR */
pcsr_register_content |=
((nand->bus_width == 16) ? MX2_FMCR_NF_16BIT_SEL : 0x00000000);
target_write_u32(target, MX2_FMCR, pcsr_register_content);
}
if (nand->bus_width == 16)
LOG_DEBUG("MX2_NF : bus is 16-bit width");
else
LOG_DEBUG("MX2_NF : bus is 8-bit width");
if (!nand->page_size) {
nand->page_size =
(pcsr_register_content & MX2_FMCR_NF_FMS) ? 2048 : 512;
} else {
pcsr_register_content |=
((nand->page_size == 2048) ? MX2_FMCR_NF_FMS : 0x00000000);
target_write_u32(target, MX2_FMCR, pcsr_register_content);
}
if (mx2_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) {
LOG_ERROR("NAND controller have only 1 kb SRAM, so "
"pagesize 2048 is incompatible with it");
} else {
LOG_DEBUG("MX2_NF : NAND controller can handle pagesize of 2048");
}
initialize_nf_controller(nand);
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_STATUS);
retval |= imx27_address(nand, 0x00);
retval |= do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR(get_status_register_err_msg);
return ERROR_FAIL;
}
target_read_u16(target, MX2_NF_MAIN_BUFFER0, &nand_status_content);
if (!(nand_status_content & 0x0080)) {
LOG_INFO("NAND read-only");
mx2_nf_info->flags.nand_readonly = 1;
} else {
mx2_nf_info->flags.nand_readonly = 0;
}
return ERROR_OK;
}
static int imx27_read_data(struct nand_device *nand, void *data)
{
struct target *target = nand->target;
int validate_target_result;
int try_data_output_from_nand_chip;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
/*
* get data from nand chip
*/
try_data_output_from_nand_chip = do_data_output(nand);
if (try_data_output_from_nand_chip != ERROR_OK) {
LOG_ERROR("imx27_read_data : read data failed : '%x'",
try_data_output_from_nand_chip);
return try_data_output_from_nand_chip;
}
if (nand->bus_width == 16)
get_next_halfword_from_sram_buffer(target, data);
else
get_next_byte_from_sram_buffer(target, data);
return ERROR_OK;
}
static int imx27_write_data(struct nand_device *nand, uint16_t data)
{
LOG_ERROR("write_data() not implemented");
return ERROR_NAND_OPERATION_FAILED;
}
static int imx27_reset(struct nand_device *nand)
{
/*
* validate target state
*/
int validate_target_result;
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
initialize_nf_controller(nand);
return ERROR_OK;
}
static int imx27_command(struct nand_device *nand, uint8_t command)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int validate_target_result;
int poll_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
switch(command) {
case NAND_CMD_READOOB:
command = NAND_CMD_READ0;
/* set read point for data_read() and read_block_data() to
* spare area in SRAM buffer
*/
in_sram_address = MX2_NF_SPARE_BUFFER0;
break;
case NAND_CMD_READ1:
command = NAND_CMD_READ0;
/*
* offset == one half of page size
*/
in_sram_address =
MX2_NF_MAIN_BUFFER0 + (nand->page_size >> 1);
break;
default:
in_sram_address = MX2_NF_MAIN_BUFFER0;
break;
}
target_write_u16(target, MX2_NF_FCMD, command);
/*
* start command input operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FCI);
poll_result = poll_for_complete_op(target, "command");
if (poll_result != ERROR_OK)
return poll_result;
/*
* reset cursor to begin of the buffer
*/
sign_of_sequental_byte_read = 0;
/* Handle special read command and adjust NF_CFG2(FDO) */
switch(command) {
case NAND_CMD_READID:
mx2_nf_info->optype = MX2_NF_DATAOUT_NANDID;
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
break;
case NAND_CMD_STATUS:
mx2_nf_info->optype = MX2_NF_DATAOUT_NANDSTATUS;
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
target_write_u16 (target, MX2_NF_BUFADDR, 0);
in_sram_address = 0;
break;
case NAND_CMD_READ0:
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
mx2_nf_info->optype = MX2_NF_DATAOUT_PAGE;
break;
default:
/* Ohter command use the default 'One page data out' FDO */
mx2_nf_info->optype = MX2_NF_DATAOUT_PAGE;
break;
}
return ERROR_OK;
}
static int imx27_address(struct nand_device *nand, uint8_t address)
{
struct target *target = nand->target;
int validate_target_result;
int poll_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
target_write_u16(target, MX2_NF_FADDR, address);
/*
* start address input operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FAI);
poll_result = poll_for_complete_op(target, "address");
if (poll_result != ERROR_OK)
return poll_result;
return ERROR_OK;
}
static int imx27_nand_ready(struct nand_device *nand, int tout)
{
uint16_t poll_complete_status;
struct target *target = nand->target;
int validate_target_result;
/*
* validate target state
*/
validate_target_result = validate_target_state(nand);
if (validate_target_result != ERROR_OK)
return validate_target_result;
do {
target_read_u16(target, MX2_NF_CFG2, &poll_complete_status);
if (poll_complete_status & MX2_NF_BIT_OP_DONE)
return tout;
alive_sleep(1);
}
while (tout-- > 0);
return tout;
}
static int imx27_write_page(struct nand_device *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int retval;
uint16_t nand_status_content;
uint16_t swap1, swap2, new_swap1;
int poll_result;
if (data_size % 2) {
LOG_ERROR(data_block_size_err_msg, data_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (oob_size % 2) {
LOG_ERROR(data_block_size_err_msg, oob_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (!data) {
LOG_ERROR("nothing to program");
return ERROR_NAND_OPERATION_FAILED;
}
/*
* validate target state
*/
retval = validate_target_state(nand);
if (retval != ERROR_OK)
return retval;
in_sram_address = MX2_NF_MAIN_BUFFER0;
sign_of_sequental_byte_read = 0;
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_SEQIN);
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, page & 0xff); //page address
retval |= imx27_address(nand, (page >> 8) & 0xff); //page address
retval |= imx27_address(nand, (page >> 16) & 0xff); //page address
target_write_buffer(target, MX2_NF_MAIN_BUFFER0, data_size, data);
if (oob) {
if (mx2_nf_info->flags.hw_ecc_enabled) {
/*
* part of spare block will be overrided by hardware
* ECC generator
*/
LOG_DEBUG("part of spare block will be overrided "
"by hardware ECC generator");
}
target_write_buffer(target, MX2_NF_SPARE_BUFFER0, oob_size,
oob);
}
//BI-swap - work-around of imx27 NFC for NAND device with page == 2kb
target_read_u16(target, MX2_NF_MAIN_BUFFER3 + 464, &swap1);
if (oob) {
LOG_ERROR("Due to NFC Bug, oob is not correctly implemented "
"in mx2 driver");
return ERROR_NAND_OPERATION_FAILED;
}
//target_read_u16 (target, MX2_NF_SPARE_BUFFER3 + 4, &swap2);
swap2 = 0xffff; //Spare buffer unused forced to 0xffff
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MX2_NF_MAIN_BUFFER3 + 464, new_swap1);
target_write_u16(target, MX2_NF_SPARE_BUFFER3 + 4, swap2);
/*
* start data input operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_BUFADDR, 0);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
target_write_u16(target, MX2_NF_BUFADDR, 1);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
target_write_u16(target, MX2_NF_BUFADDR, 2);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
target_write_u16(target, MX2_NF_BUFADDR, 3);
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_OP_FDI);
poll_result = poll_for_complete_op(target, "data input");
if (poll_result != ERROR_OK)
return poll_result;
retval |= imx27_command(nand, NAND_CMD_PAGEPROG);
if (retval != ERROR_OK)
return retval;
/*
* check status register
*/
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_STATUS);
target_write_u16 (target, MX2_NF_BUFADDR, 0);
mx2_nf_info->optype = MX2_NF_DATAOUT_NANDSTATUS;
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval |= do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR (get_status_register_err_msg);
return retval;
}
target_read_u16 (target, MX2_NF_MAIN_BUFFER0, &nand_status_content);
if (nand_status_content & 0x0001) {
/*
* page not correctly written
*/
return ERROR_NAND_OPERATION_FAILED;
}
#ifdef _MX2_PRINT_STAT
LOG_INFO("%d bytes newly written", data_size);
#endif
return ERROR_OK;
}
static int imx27_read_page(struct nand_device *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int retval;
uint16_t swap1, swap2, new_swap1;
if (data_size % 2) {
LOG_ERROR(data_block_size_err_msg, data_size);
return ERROR_NAND_OPERATION_FAILED;
}
if (oob_size % 2) {
LOG_ERROR(data_block_size_err_msg, oob_size);
return ERROR_NAND_OPERATION_FAILED;
}
/*
* validate target state
*/
retval = validate_target_state(nand);
if (retval != ERROR_OK) {
return retval;
}
/* Reset address_cycles before imx27_command ?? */
retval = ERROR_OK;
retval |= imx27_command(nand, NAND_CMD_READ0);
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, 0); //col
retval |= imx27_address(nand, page & 0xff); //page address
retval |= imx27_address(nand, (page >> 8) & 0xff); //page address
retval |= imx27_address(nand, (page >> 16) & 0xff); //page address
retval |= imx27_command(nand, NAND_CMD_READSTART);
target_write_u16(target, MX2_NF_BUFADDR, 0);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 0");
return retval;
}
//Test nand page size to know how much MAIN_BUFFER must be written
target_write_u16(target, MX2_NF_BUFADDR, 1);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 1");
return retval;
}
target_write_u16(target, MX2_NF_BUFADDR, 2);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 2");
return retval;
}
target_write_u16(target, MX2_NF_BUFADDR, 3);
mx2_nf_info->fin = MX2_NF_FIN_DATAOUT;
retval = do_data_output(nand);
if (retval != ERROR_OK) {
LOG_ERROR("MX2_NF : Error reading page 3");
return retval;
}
//BI-swap - work-around of imx27 NFC for NAND device with page == 2k
target_read_u16(target, MX2_NF_MAIN_BUFFER3 + 464, &swap1);
target_read_u16(target, MX2_NF_SPARE_BUFFER3 + 4, &swap2);
new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
swap2 = (swap1 << 8) | (swap2 & 0xFF);
target_write_u16(target, MX2_NF_MAIN_BUFFER3 + 464, new_swap1);
target_write_u16(target, MX2_NF_SPARE_BUFFER3 + 4, swap2);
if (data)
target_read_buffer(target, MX2_NF_MAIN_BUFFER0, data_size, data);
if (oob)
target_read_buffer(target, MX2_NF_SPARE_BUFFER0, oob_size,
oob);
#ifdef _MX2_PRINT_STAT
if (data_size > 0) {
/* When Operation Status is read (when page is erased),
* this function is used but data_size is null.
*/
LOG_INFO("%d bytes newly read", data_size);
}
#endif
return ERROR_OK;
}
static int initialize_nf_controller(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
uint16_t work_mode;
uint16_t temp;
/*
* resets NAND flash controller in zero time ? I dont know.
*/
target_write_u16(target, MX2_NF_CFG1, MX2_NF_BIT_RESET_EN);
work_mode = MX2_NF_BIT_INT_DIS; /* disable interrupt */
if (target->endianness == TARGET_BIG_ENDIAN) {
LOG_DEBUG("MX2_NF : work in Big Endian mode");
work_mode |= MX2_NF_BIT_BE_EN;
} else {
LOG_DEBUG("MX2_NF : work in Little Endian mode");
}
if (mx2_nf_info->flags.hw_ecc_enabled) {
LOG_DEBUG("MX2_NF : work with ECC mode");
work_mode |= MX2_NF_BIT_ECC_EN;
} else {
LOG_DEBUG("MX2_NF : work without ECC mode");
}
target_write_u16(target, MX2_NF_CFG1, work_mode);
/*
* unlock SRAM buffer for write; 2 mean "Unlock", other values means "Lock"
*/
target_write_u16(target, MX2_NF_BUFCFG, 2);
target_read_u16(target, MX2_NF_FWP, &temp);
if ((temp & 0x0007) == 1) {
LOG_ERROR("NAND flash is tight-locked, reset needed");
return ERROR_FAIL;
}
/*
* unlock NAND flash for write
*/
target_write_u16(target, MX2_NF_FWP, 4);
target_write_u16(target, MX2_NF_LOCKSTART, 0x0000);
target_write_u16(target, MX2_NF_LOCKEND, 0xFFFF);
/*
* 0x0000 means that first SRAM buffer @0xD800_0000 will be used
*/
target_write_u16(target, MX2_NF_BUFADDR, 0x0000);
/*
* address of SRAM buffer
*/
in_sram_address = MX2_NF_MAIN_BUFFER0;
sign_of_sequental_byte_read = 0;
return ERROR_OK;
}
static int get_next_byte_from_sram_buffer(struct target * target, uint8_t * value)
{
static uint8_t even_byte = 0;
uint16_t temp;
/*
* host-big_endian ??
*/
if (sign_of_sequental_byte_read == 0)
even_byte = 0;
if (in_sram_address > MX2_NF_LAST_BUFFER_ADDR) {
LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
*value = 0;
sign_of_sequental_byte_read = 0;
even_byte = 0;
return ERROR_NAND_OPERATION_FAILED;
} else {
target_read_u16(target, in_sram_address, &temp);
if (even_byte) {
*value = temp >> 8;
even_byte = 0;
in_sram_address += 2;
} else {
*value = temp & 0xff;
even_byte = 1;
}
}
sign_of_sequental_byte_read = 1;
return ERROR_OK;
}
static int get_next_halfword_from_sram_buffer(struct target * target,
uint16_t * value)
{
if (in_sram_address > MX2_NF_LAST_BUFFER_ADDR) {
LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
*value = 0;
return ERROR_NAND_OPERATION_FAILED;
} else {
target_read_u16(target, in_sram_address, value);
in_sram_address += 2;
}
return ERROR_OK;
}
static int poll_for_complete_op(struct target * target, const char *text)
{
uint16_t poll_complete_status;
for (int poll_cycle_count = 0; poll_cycle_count < 100; poll_cycle_count++) {
target_read_u16(target, MX2_NF_CFG2, &poll_complete_status);
if (poll_complete_status & MX2_NF_BIT_OP_DONE)
break;
usleep(10);
}
if (!(poll_complete_status & MX2_NF_BIT_OP_DONE)) {
LOG_ERROR("%s sending timeout", text);
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
static int validate_target_state(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR(target_not_halted_err_msg);
return ERROR_NAND_OPERATION_FAILED;
}
if (mx2_nf_info->flags.target_little_endian !=
(target->endianness == TARGET_LITTLE_ENDIAN)) {
/*
* endianness changed after NAND controller probed
*/
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
static int do_data_output(struct nand_device *nand)
{
struct mx2_nf_controller *mx2_nf_info = nand->controller_priv;
struct target *target = nand->target;
int poll_result;
uint16_t ecc_status;
switch(mx2_nf_info->fin) {
case MX2_NF_FIN_DATAOUT:
/*
* start data output operation (set MX2_NF_BIT_OP_DONE==0)
*/
target_write_u16(target, MX2_NF_CFG2, MX2_NF_BIT_DATAOUT_TYPE(mx2_nf_info->optype));
poll_result = poll_for_complete_op(target, "data output");
if (poll_result != ERROR_OK)
return poll_result;
mx2_nf_info->fin = MX2_NF_FIN_NONE;
/*
* ECC stuff
*/
if ((mx2_nf_info->optype == MX2_NF_DATAOUT_PAGE) && mx2_nf_info->flags.hw_ecc_enabled) {
target_read_u16(target, MX2_NF_ECCSTATUS, &ecc_status);
switch(ecc_status & 0x000c) {
case 1 << 2:
LOG_INFO("main area readed with 1 (correctable) error");
break;
case 2 << 2:
LOG_INFO("main area readed with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
break;
}
switch(ecc_status & 0x0003) {
case 1:
LOG_INFO("spare area readed with 1 (correctable) error");
break;
case 2:
LOG_INFO("main area readed with more than 1 (incorrectable) error");
return ERROR_NAND_OPERATION_FAILED;
break;
}
}
break;
case MX2_NF_FIN_NONE:
break;
}
return ERROR_OK;
}
struct nand_flash_controller imx27_nand_flash_controller = {
.name = "imx27",
.nand_device_command = &imx27_nand_device_command,
.init = &imx27_init,
.reset = &imx27_reset,
.command = &imx27_command,
.address = &imx27_address,
.write_data = &imx27_write_data,
.read_data = &imx27_read_data,
.write_page = &imx27_write_page,
.read_page = &imx27_read_page,
.nand_ready = &imx27_nand_ready,
};

119
src/flash/nand/mx2.h Normal file
View File

@@ -0,0 +1,119 @@
/***************************************************************************
* Copyright (C) 2009 by Alexei Babich *
* Rezonans plc., Chelyabinsk, Russia *
* impatt@mail.ru *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* Freescale iMX2* OpenOCD NAND Flash controller support.
* based on Freescale iMX3* OpenOCD NAND Flash controller support.
*
* Many thanks to Ben Dooks for writing s3c24xx driver.
*/
#define MX2_NF_BASE_ADDR 0xd8000000
#define MX2_NF_BUFSIZ (MX2_NF_BASE_ADDR + 0xe00)
#define MX2_NF_BUFADDR (MX2_NF_BASE_ADDR + 0xe04)
#define MX2_NF_FADDR (MX2_NF_BASE_ADDR + 0xe06)
#define MX2_NF_FCMD (MX2_NF_BASE_ADDR + 0xe08)
#define MX2_NF_BUFCFG (MX2_NF_BASE_ADDR + 0xe0a)
#define MX2_NF_ECCSTATUS (MX2_NF_BASE_ADDR + 0xe0c)
#define MX2_NF_ECCMAINPOS (MX2_NF_BASE_ADDR + 0xe0e)
#define MX2_NF_ECCSPAREPOS (MX2_NF_BASE_ADDR + 0xe10)
#define MX2_NF_FWP (MX2_NF_BASE_ADDR + 0xe12)
#define MX2_NF_LOCKSTART (MX2_NF_BASE_ADDR + 0xe14)
#define MX2_NF_LOCKEND (MX2_NF_BASE_ADDR + 0xe16)
#define MX2_NF_FWPSTATUS (MX2_NF_BASE_ADDR + 0xe18)
/*
* all bits not marked as self-clearing bit
*/
#define MX2_NF_CFG1 (MX2_NF_BASE_ADDR + 0xe1a)
#define MX2_NF_CFG2 (MX2_NF_BASE_ADDR + 0xe1c)
#define MX2_NF_MAIN_BUFFER0 (MX2_NF_BASE_ADDR + 0x0000)
#define MX2_NF_MAIN_BUFFER1 (MX2_NF_BASE_ADDR + 0x0200)
#define MX2_NF_MAIN_BUFFER2 (MX2_NF_BASE_ADDR + 0x0400)
#define MX2_NF_MAIN_BUFFER3 (MX2_NF_BASE_ADDR + 0x0600)
#define MX2_NF_SPARE_BUFFER0 (MX2_NF_BASE_ADDR + 0x0800)
#define MX2_NF_SPARE_BUFFER1 (MX2_NF_BASE_ADDR + 0x0810)
#define MX2_NF_SPARE_BUFFER2 (MX2_NF_BASE_ADDR + 0x0820)
#define MX2_NF_SPARE_BUFFER3 (MX2_NF_BASE_ADDR + 0x0830)
#define MX2_NF_MAIN_BUFFER_LEN 512
#define MX2_NF_SPARE_BUFFER_LEN 16
#define MX2_NF_LAST_BUFFER_ADDR ((MX2_NF_SPARE_BUFFER3) + MX2_NF_SPARE_BUFFER_LEN - 2)
/* bits in MX2_NF_CFG1 register */
#define MX2_NF_BIT_SPARE_ONLY_EN (1<<2)
#define MX2_NF_BIT_ECC_EN (1<<3)
#define MX2_NF_BIT_INT_DIS (1<<4)
#define MX2_NF_BIT_BE_EN (1<<5)
#define MX2_NF_BIT_RESET_EN (1<<6)
#define MX2_NF_BIT_FORCE_CE (1<<7)
/* bits in MX2_NF_CFG2 register */
/*Flash Command Input*/
#define MX2_NF_BIT_OP_FCI (1<<0)
/*
* Flash Address Input
*/
#define MX2_NF_BIT_OP_FAI (1<<1)
/*
* Flash Data Input
*/
#define MX2_NF_BIT_OP_FDI (1<<2)
/* see "enum mx_dataout_type" below */
#define MX2_NF_BIT_DATAOUT_TYPE(x) ((x)<<3)
#define MX2_NF_BIT_OP_DONE (1<<15)
#define MX2_CCM_CGR2 0x53f80028
#define MX2_GPR 0x43fac008
//#define MX2_PCSR 0x53f8000c
#define MX2_FMCR 0x10027814
#define MX2_FMCR_NF_16BIT_SEL (1<<4)
#define MX2_FMCR_NF_FMS (1<<5)
enum mx_dataout_type
{
MX2_NF_DATAOUT_PAGE = 1,
MX2_NF_DATAOUT_NANDID = 2,
MX2_NF_DATAOUT_NANDSTATUS = 4,
};
enum mx_nf_finalize_action
{
MX2_NF_FIN_NONE,
MX2_NF_FIN_DATAOUT,
};
struct mx2_nf_flags
{
unsigned host_little_endian:1;
unsigned target_little_endian:1;
unsigned nand_readonly:1;
unsigned one_kb_sram:1;
unsigned hw_ecc_enabled:1;
};
struct mx2_nf_controller
{
enum mx_dataout_type optype;
enum mx_nf_finalize_action fin;
struct mx2_nf_flags flags;
};

View File

@@ -47,7 +47,7 @@ static const char sram_buffer_bounds_err_msg[] =
"trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
static const char get_status_register_err_msg[] = "can't get NAND status";
static uint32_t in_sram_address;
unsigned char sign_of_sequental_byte_read;
static unsigned char sign_of_sequental_byte_read;
static int test_iomux_settings (struct target * target, uint32_t value,
uint32_t mask, const char *text);
@@ -61,7 +61,6 @@ static int do_data_output (struct nand_device *nand);
static int imx31_command (struct nand_device *nand, uint8_t command);
static int imx31_address (struct nand_device *nand, uint8_t address);
static int imx31_controller_ready (struct nand_device *nand, int tout);
NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
{
@@ -75,12 +74,6 @@ NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
nand->controller_priv = mx3_nf_info;
mx3_nf_info->target = get_target (CMD_ARGV[1]);
if (mx3_nf_info->target == NULL)
{
LOG_ERROR ("target '%s' not defined", CMD_ARGV[1]);
return ERROR_FAIL;
}
if (CMD_ARGC < 3)
{
LOG_ERROR ("use \"nand device imx31 target noecc|hwecc\"");
@@ -105,9 +98,9 @@ NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
mx3_nf_info->optype = MX3_NF_DATAOUT_PAGE;
mx3_nf_info->fin = MX3_NF_FIN_NONE;
mx3_nf_info->flags.target_little_endian =
(mx3_nf_info->target->endianness == TARGET_LITTLE_ENDIAN);
(nand->target->endianness == TARGET_LITTLE_ENDIAN);
/*
* testing host endianess
* testing host endianness
*/
{
int x = 1;
@@ -126,7 +119,7 @@ NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
static int imx31_init (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
{
/*
@@ -268,8 +261,7 @@ static int imx31_init (struct nand_device *nand)
static int imx31_read_data (struct nand_device *nand, void *data)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
{
/*
* validate target state
@@ -312,11 +304,6 @@ static int imx31_write_data (struct nand_device *nand, uint16_t data)
return ERROR_NAND_OPERATION_FAILED;
}
static int imx31_nand_ready (struct nand_device *nand, int timeout)
{
return imx31_controller_ready (nand, timeout);
}
static int imx31_reset (struct nand_device *nand)
{
/*
@@ -335,7 +322,7 @@ static int imx31_reset (struct nand_device *nand)
static int imx31_command (struct nand_device *nand, uint8_t command)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
{
/*
* validate target state
@@ -408,8 +395,7 @@ static int imx31_command (struct nand_device *nand, uint8_t command)
static int imx31_address (struct nand_device *nand, uint8_t address)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
{
/*
* validate target state
@@ -438,11 +424,10 @@ static int imx31_address (struct nand_device *nand, uint8_t address)
return ERROR_OK;
}
static int imx31_controller_ready (struct nand_device *nand, int tout)
static int imx31_nand_ready (struct nand_device *nand, int tout)
{
uint16_t poll_complete_status;
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
{
/*
@@ -474,7 +459,7 @@ static int imx31_write_page (struct nand_device *nand, uint32_t page,
uint32_t oob_size)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
if (data_size % 2)
{
@@ -580,8 +565,7 @@ static int imx31_read_page (struct nand_device *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
if (data_size % 2)
{
@@ -656,7 +640,7 @@ static int test_iomux_settings (struct target * target, uint32_t address,
static int initialize_nf_controller (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
/*
* resets NAND flash controller in zero time ? I dont know.
*/
@@ -784,7 +768,7 @@ static int poll_for_complete_op (struct target * target, const char *text)
static int validate_target_state (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED)
{
@@ -806,7 +790,7 @@ static int validate_target_state (struct nand_device *nand)
static int do_data_output (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
struct target *target = mx3_nf_info->target;
struct target *target = nand->target;
switch (mx3_nf_info->fin)
{
case MX3_NF_FIN_DATAOUT:
@@ -876,6 +860,5 @@ struct nand_flash_controller imx31_nand_flash_controller = {
.read_data = &imx31_read_data,
.write_page = &imx31_write_page,
.read_page = &imx31_read_page,
.controller_ready = &imx31_controller_ready,
.nand_ready = &imx31_nand_ready,
};

View File

@@ -109,7 +109,6 @@ struct mx3_nf_flags
struct mx3_nf_controller
{
struct target *target;
enum mx_dataout_type optype;
enum mx_nf_finalize_action fin;
struct mx3_nf_flags flags;

View File

@@ -52,11 +52,6 @@ static int nonce_nand_reset(struct nand_device *nand)
return nonce_nand_command(nand, NAND_CMD_RESET);
}
static int nonce_nand_controller_ready(struct nand_device *nand, int timeout)
{
return true;
}
NAND_DEVICE_COMMAND_HANDLER(nonce_nand_device_command)
{
return ERROR_OK;
@@ -79,5 +74,4 @@ struct nand_flash_controller nonce_nand_controller =
.read_data = &nonce_nand_read,
.write_data = &nonce_nand_write,
.write_block_data = &nonce_nand_fast_block_write,
.controller_ready = &nonce_nand_controller_ready,
};

226
src/flash/nand/nuc910.c Normal file
View File

@@ -0,0 +1,226 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* NAND controller interface for Nuvoton NUC910
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "imp.h"
#include "nuc910.h"
#include "arm_io.h"
#include <target/arm.h>
struct nuc910_nand_controller
{
struct arm_nand_data io;
};
static int validate_target_state(struct nand_device *nand)
{
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_NAND_OPERATION_FAILED;
}
return ERROR_OK;
}
static int nuc910_nand_command(struct nand_device *nand, uint8_t command)
{
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
return result;
target_write_u8(target, NUC910_SMCMD, command);
return ERROR_OK;
}
static int nuc910_nand_address(struct nand_device *nand, uint8_t address)
{
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
return result;
target_write_u32(target, NUC910_SMADDR, ((address & 0xff) | NUC910_SMADDR_EOA));
return ERROR_OK;
}
static int nuc910_nand_read(struct nand_device *nand, void *data)
{
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
return result;
target_read_u8(target, NUC910_SMDATA, data);
return ERROR_OK;
}
static int nuc910_nand_write(struct nand_device *nand, uint16_t data)
{
struct target *target = nand->target;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
return result;
target_write_u8(target, NUC910_SMDATA, data);
return ERROR_OK;
}
static int nuc910_nand_read_block_data(struct nand_device *nand,
uint8_t *data, int data_size)
{
struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
return result;
nuc910_nand->io.chunk_size = nand->page_size;
/* try the fast way first */
result = arm_nandread(&nuc910_nand->io, data, data_size);
if (result != ERROR_NAND_NO_BUFFER)
return result;
/* else do it slowly */
while (data_size--)
nuc910_nand_read(nand, data++);
return ERROR_OK;
}
static int nuc910_nand_write_block_data(struct nand_device *nand,
uint8_t *data, int data_size)
{
struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
return result;
nuc910_nand->io.chunk_size = nand->page_size;
/* try the fast way first */
result = arm_nandwrite(&nuc910_nand->io, data, data_size);
if (result != ERROR_NAND_NO_BUFFER)
return result;
/* else do it slowly */
while (data_size--)
nuc910_nand_write(nand, *data++);
return ERROR_OK;
}
static int nuc910_nand_reset(struct nand_device *nand)
{
return nuc910_nand_command(nand, NAND_CMD_RESET);
}
static int nuc910_nand_ready(struct nand_device *nand, int timeout)
{
struct target *target = nand->target;
uint32_t status;
do {
target_read_u32(target, NUC910_SMISR, &status);
if (status & NUC910_SMISR_RB_) {
return 1;
}
alive_sleep(1);
} while (timeout-- > 0);
return 0;
}
NAND_DEVICE_COMMAND_HANDLER(nuc910_nand_device_command)
{
struct nuc910_nand_controller *nuc910_nand;
nuc910_nand = calloc(1, sizeof(struct nuc910_nand_controller));
if (!nuc910_nand) {
LOG_ERROR("no memory for nand controller");
return ERROR_NAND_DEVICE_INVALID;
}
nand->controller_priv = nuc910_nand;
return ERROR_OK;
}
static int nuc910_nand_init(struct nand_device *nand)
{
struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
struct target *target = nand->target;
int bus_width = nand->bus_width ? : 8;
int result;
if ((result = validate_target_state(nand)) != ERROR_OK)
return result;
/* nuc910 only supports 8bit */
if (bus_width != 8)
{
LOG_ERROR("nuc910 only supports 8 bit bus width, not %i", bus_width);
return ERROR_NAND_OPERATION_NOT_SUPPORTED;
}
/* inform calling code about selected bus width */
nand->bus_width = bus_width;
nuc910_nand->io.target = target;
nuc910_nand->io.data = NUC910_SMDATA;
nuc910_nand->io.op = ARM_NAND_NONE;
/* configure nand controller */
target_write_u32(target, NUC910_FMICSR, NUC910_FMICSR_SM_EN);
target_write_u32(target, NUC910_SMCSR, 0x010000a8); /* 2048 page size */
target_write_u32(target, NUC910_SMTCR, 0x00010204);
target_write_u32(target, NUC910_SMIER, 0x00000000);
return ERROR_OK;
}
struct nand_flash_controller nuc910_nand_controller =
{
.name = "nuc910",
.command = nuc910_nand_command,
.address = nuc910_nand_address,
.read_data = nuc910_nand_read,
.write_data = nuc910_nand_write,
.write_block_data = nuc910_nand_write_block_data,
.read_block_data = nuc910_nand_read_block_data,
.nand_ready = nuc910_nand_ready,
.reset = nuc910_nand_reset,
.nand_device_command = nuc910_nand_device_command,
.init = nuc910_nand_init,
};

60
src/flash/nand/nuc910.h Normal file
View File

@@ -0,0 +1,60 @@
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
/*
* NAND controller interface for Nuvoton NUC910
*/
#ifndef NUC910_H
#define NUC910_H
#define NUC910_FMICSR 0xB000D000
#define NUC910_SMCSR 0xB000D0A0
#define NUC910_SMTCR 0xB000D0A4
#define NUC910_SMIER 0xB000D0A8
#define NUC910_SMISR 0xB000D0AC
#define NUC910_SMCMD 0xB000D0B0
#define NUC910_SMADDR 0xB000D0B4
#define NUC910_SMDATA 0xB000D0B8
#define NUC910_SMECC0 0xB000D0BC
#define NUC910_SMECC1 0xB000D0C0
#define NUC910_SMECC2 0xB000D0C4
#define NUC910_SMECC3 0xB000D0C8
#define NUC910_ECC4ST 0xB000D114
/* Global Control and Status Register (FMICSR) */
#define NUC910_FMICSR_SM_EN (1<<3)
/* NAND Flash Address Port Register (SMADDR) */
#define NUC910_SMADDR_EOA (1<<31)
/* NAND Flash Control and Status Register (SMCSR) */
#define NUC910_SMCSR_PSIZE (1<<3)
#define NUC910_SMCSR_DBW (1<<4)
/* NAND Flash Interrupt Status Register (SMISR) */
#define NUC910_SMISR_ECC_IF (1<<2)
#define NUC910_SMISR_RB_ (1<<18)
/* ECC4 Correction Status (ECC4ST) */
#endif /* NUC910_H */

View File

@@ -33,8 +33,6 @@
struct orion_nand_controller
{
struct target *target;
struct arm_nand_data io;
uint32_t cmd;
@@ -53,7 +51,7 @@ struct orion_nand_controller
static int orion_nand_command(struct nand_device *nand, uint8_t command)
{
struct orion_nand_controller *hw = nand->controller_priv;
struct target *target = hw->target;
struct target *target = nand->target;
CHECK_HALTED;
target_write_u8(target, hw->cmd, command);
@@ -63,7 +61,7 @@ static int orion_nand_command(struct nand_device *nand, uint8_t command)
static int orion_nand_address(struct nand_device *nand, uint8_t address)
{
struct orion_nand_controller *hw = nand->controller_priv;
struct target *target = hw->target;
struct target *target = nand->target;
CHECK_HALTED;
target_write_u8(target, hw->addr, address);
@@ -73,7 +71,7 @@ static int orion_nand_address(struct nand_device *nand, uint8_t address)
static int orion_nand_read(struct nand_device *nand, void *data)
{
struct orion_nand_controller *hw = nand->controller_priv;
struct target *target = hw->target;
struct target *target = nand->target;
CHECK_HALTED;
target_read_u8(target, hw->data, data);
@@ -83,7 +81,7 @@ static int orion_nand_read(struct nand_device *nand, void *data)
static int orion_nand_write(struct nand_device *nand, uint16_t data)
{
struct orion_nand_controller *hw = nand->controller_priv;
struct target *target = hw->target;
struct target *target = nand->target;
CHECK_HALTED;
target_write_u8(target, hw->data, data);
@@ -116,11 +114,6 @@ static int orion_nand_reset(struct nand_device *nand)
return orion_nand_command(nand, NAND_CMD_RESET);
}
static int orion_nand_controller_ready(struct nand_device *nand, int timeout)
{
return 1;
}
NAND_DEVICE_COMMAND_HANDLER(orion_nand_device_command)
{
struct orion_nand_controller *hw;
@@ -128,23 +121,17 @@ NAND_DEVICE_COMMAND_HANDLER(orion_nand_device_command)
uint8_t ale, cle;
if (CMD_ARGC != 3) {
LOG_ERROR("arguments must be: <target_id> <NAND_address>\n");
LOG_ERROR("arguments must be: <target_id> <NAND_address>");
return ERROR_NAND_DEVICE_INVALID;
}
hw = calloc(1, sizeof(*hw));
if (!hw) {
LOG_ERROR("no memory for nand controller\n");
LOG_ERROR("no memory for nand controller");
return ERROR_NAND_DEVICE_INVALID;
}
nand->controller_priv = hw;
hw->target = get_target(CMD_ARGV[1]);
if (!hw->target) {
LOG_ERROR("target '%s' not defined", CMD_ARGV[1]);
free(hw);
return ERROR_NAND_DEVICE_INVALID;
}
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], base);
cle = 0;
@@ -154,7 +141,7 @@ NAND_DEVICE_COMMAND_HANDLER(orion_nand_device_command)
hw->cmd = base + (1 << cle);
hw->addr = base + (1 << ale);
hw->io.target = hw->target;
hw->io.target = nand->target;
hw->io.data = hw->data;
hw->io.op = ARM_NAND_NONE;
@@ -175,7 +162,6 @@ struct nand_flash_controller orion_nand_controller =
.write_data = orion_nand_write,
.write_block_data = orion_nand_fast_block_write,
.reset = orion_nand_reset,
.controller_ready = orion_nand_controller_ready,
.nand_device_command = orion_nand_device_command,
.init = orion_nand_init,
};

View File

@@ -46,8 +46,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
static int s3c2410_init(struct nand_device *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
@@ -58,8 +57,7 @@ static int s3c2410_init(struct nand_device *nand)
static int s3c2410_write_data(struct nand_device *nand, uint16_t data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -72,8 +70,7 @@ static int s3c2410_write_data(struct nand_device *nand, uint16_t data)
static int s3c2410_read_data(struct nand_device *nand, void *data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -86,8 +83,7 @@ static int s3c2410_read_data(struct nand_device *nand, void *data)
static int s3c2410_nand_ready(struct nand_device *nand, int timeout)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
uint8_t status;
if (target->state != TARGET_HALTED) {
@@ -118,6 +114,5 @@ struct nand_flash_controller s3c2410_nand_controller = {
.read_data = &s3c2410_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.controller_ready = &s3c24xx_controller_ready,
.nand_ready = &s3c2410_nand_ready,
};

View File

@@ -46,8 +46,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
static int s3c2412_init(struct nand_device *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
@@ -74,6 +73,5 @@ struct nand_flash_controller s3c2412_nand_controller = {
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.controller_ready = &s3c24xx_controller_ready,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -47,8 +47,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
static int s3c2440_init(struct nand_device *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
@@ -64,7 +63,7 @@ static int s3c2440_init(struct nand_device *nand)
int s3c2440_nand_ready(struct nand_device *nand, int timeout)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
uint8_t status;
if (target->state != TARGET_HALTED) {
@@ -90,11 +89,11 @@ int s3c2440_nand_ready(struct nand_device *nand, int timeout)
int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_size)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, nand, data, data_size);
LOG_INFO("%s: reading data: %p, %p, %d", __func__, nand, data, data_size);
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -126,7 +125,7 @@ int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_si
int s3c2440_write_block_data(struct nand_device *nand, uint8_t *data, int data_size)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
uint32_t nfdata = s3c24xx_info->data;
uint32_t tmp;
@@ -166,6 +165,5 @@ struct nand_flash_controller s3c2440_nand_controller = {
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.controller_ready = &s3c24xx_controller_ready,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -47,8 +47,7 @@ NAND_DEVICE_COMMAND_HANDLER(s3c2443_nand_device_command)
static int s3c2443_init(struct nand_device *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
@@ -75,6 +74,5 @@ struct nand_flash_controller s3c2443_nand_controller = {
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.controller_ready = &s3c24xx_controller_ready,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -38,18 +38,11 @@ S3C24XX_DEVICE_COMMAND()
struct s3c24xx_nand_controller *s3c24xx_info;
s3c24xx_info = malloc(sizeof(struct s3c24xx_nand_controller));
if (s3c24xx_info == NULL) {
LOG_ERROR("no memory for nand controller\n");
LOG_ERROR("no memory for nand controller");
return -ENOMEM;
}
nand->controller_priv = s3c24xx_info;
s3c24xx_info->target = get_target(CMD_ARGV[1]);
if (s3c24xx_info->target == NULL) {
LOG_ERROR("target '%s' not defined", CMD_ARGV[1]);
return ERROR_COMMAND_SYNTAX_ERROR;
}
*info = s3c24xx_info;
return ERROR_OK;
@@ -58,7 +51,7 @@ S3C24XX_DEVICE_COMMAND()
int s3c24xx_reset(struct nand_device *nand)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -73,7 +66,7 @@ int s3c24xx_reset(struct nand_device *nand)
int s3c24xx_command(struct nand_device *nand, uint8_t command)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -88,7 +81,7 @@ int s3c24xx_command(struct nand_device *nand, uint8_t command)
int s3c24xx_address(struct nand_device *nand, uint8_t address)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -102,7 +95,7 @@ int s3c24xx_address(struct nand_device *nand, uint8_t address)
int s3c24xx_write_data(struct nand_device *nand, uint16_t data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -116,7 +109,7 @@ int s3c24xx_write_data(struct nand_device *nand, uint16_t data)
int s3c24xx_read_data(struct nand_device *nand, void *data)
{
struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
struct target *target = s3c24xx_info->target;
struct target *target = nand->target;
if (target->state != TARGET_HALTED) {
LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
@@ -126,8 +119,3 @@ int s3c24xx_read_data(struct nand_device *nand, void *data)
target_read_u8(target, s3c24xx_info->data, data);
return ERROR_OK;
}
int s3c24xx_controller_ready(struct nand_device *nand, int timeout)
{
return 1;
}

View File

@@ -33,8 +33,6 @@
struct s3c24xx_nand_controller
{
struct target *target;
/* register addresses */
uint32_t cmd;
uint32_t addr;
@@ -68,8 +66,6 @@ int s3c24xx_address(struct nand_device *nand, uint8_t address);
int s3c24xx_write_data(struct nand_device *nand, uint16_t data);
int s3c24xx_read_data(struct nand_device *nand, void *data);
int s3c24xx_controller_ready(struct nand_device *nand, int tout);
#define s3c24xx_write_page NULL
#define s3c24xx_read_page NULL

74
src/flash/nand/s3c6400.c Normal file
View File

@@ -0,0 +1,74 @@
/***************************************************************************
* Copyright (C) 2010 by Peter Korsgaard <jacmet@sunsite.dk> *
* Heavily based on s3c2412.c by Ben Dooks <ben@fluff.org> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "s3c24xx.h"
/* s3c64xx uses another base address for the nand controller than 24xx */
#undef S3C2410_NFREG
#define S3C2410_NFREG(x) ((x) + 0x70200000)
NAND_DEVICE_COMMAND_HANDLER(s3c6400_nand_device_command)
{
struct s3c24xx_nand_controller *info;
CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
/* fill in the address fields for the core device */
info->cmd = S3C2440_NFCMD;
info->addr = S3C2440_NFADDR;
info->data = S3C2440_NFDATA;
info->nfstat = S3C2412_NFSTAT;
return ERROR_OK;
}
static int s3c6400_init(struct nand_device *nand)
{
struct target *target = nand->target;
target_write_u32(target, S3C2410_NFCONF,
S3C2440_NFCONF_TACLS(3) |
S3C2440_NFCONF_TWRPH0(7) |
S3C2440_NFCONF_TWRPH1(7) | 4);
target_write_u32(target, S3C2440_NFCONT,
S3C2412_NFCONT_INIT_MAIN_ECC |
S3C2440_NFCONT_ENABLE);
return ERROR_OK;
}
struct nand_flash_controller s3c6400_nand_controller = {
.name = "s3c6400",
.nand_device_command = &s3c6400_nand_device_command,
.init = &s3c6400_init,
.reset = &s3c24xx_reset,
.command = &s3c24xx_command,
.address = &s3c24xx_address,
.write_data = &s3c24xx_write_data,
.read_data = &s3c24xx_read_data,
.write_page = s3c24xx_write_page,
.read_page = s3c24xx_read_page,
.write_block_data = &s3c2440_write_block_data,
.read_block_data = &s3c2440_read_block_data,
.nand_ready = &s3c2440_nand_ready,
};

View File

@@ -27,6 +27,7 @@
#include "core.h"
#include "imp.h"
#include "fileio.h"
#include <target/target.h>
// to be removed
extern struct nand_device *nand_devices;
@@ -147,18 +148,11 @@ COMMAND_HANDLER(handle_nand_probe_command)
if ((retval = nand_probe(p)) == ERROR_OK)
{
command_print(CMD_CTX, "NAND flash device '%s' found", p->device->name);
}
else if (retval == ERROR_NAND_OPERATION_FAILED)
{
command_print(CMD_CTX, "probing failed for NAND flash device");
}
else
{
command_print(CMD_CTX, "unknown error when probing NAND flash device");
command_print(CMD_CTX, "NAND flash device '%s (%s)' found",
p->device->name, p->manufacturer->name);
}
return ERROR_OK;
return retval;
}
COMMAND_HANDLER(handle_nand_erase_command)
@@ -205,16 +199,8 @@ COMMAND_HANDLER(handle_nand_erase_command)
offset, offset + length,
CMD_ARGV[0], p->device->name);
}
else if (retval == ERROR_NAND_OPERATION_FAILED)
{
command_print(CMD_CTX, "erase failed");
}
else
{
command_print(CMD_CTX, "unknown error when erasing NAND flash device");
}
return ERROR_OK;
return retval;
}
COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
@@ -260,18 +246,8 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
"use \"nand info\" command to list blocks");
}
else if (retval == ERROR_NAND_OPERATION_FAILED)
{
command_print(CMD_CTX, "error when checking for bad blocks on "
"NAND flash device");
}
else
{
command_print(CMD_CTX, "unknown error when checking for bad "
"blocks on NAND flash device");
}
return ERROR_OK;
return retval;
}
COMMAND_HANDLER(handle_nand_write_command)
@@ -309,7 +285,7 @@ COMMAND_HANDLER(handle_nand_write_command)
if (nand_fileio_finish(&s))
{
command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
"offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
"offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
duration_kbps(&s.bench, total_bytes));
}
@@ -336,13 +312,14 @@ COMMAND_HANDLER(handle_nand_verify_command)
while (file.size > 0)
{
int retval = nand_read_page(nand, dev.address / dev.page_size,
retval = nand_read_page(nand, dev.address / dev.page_size,
dev.page, dev.page_size, dev.oob, dev.oob_size);
if (ERROR_OK != retval)
{
command_print(CMD_CTX, "reading NAND flash page failed");
nand_fileio_cleanup(&dev);
return nand_fileio_cleanup(&file);
nand_fileio_cleanup(&file);
return retval;
}
int bytes_read = nand_fileio_read(nand, &file);
@@ -350,7 +327,8 @@ COMMAND_HANDLER(handle_nand_verify_command)
{
command_print(CMD_CTX, "error while reading file");
nand_fileio_cleanup(&dev);
return nand_fileio_cleanup(&file);
nand_fileio_cleanup(&file);
return ERROR_FAIL;
}
if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
@@ -359,7 +337,8 @@ COMMAND_HANDLER(handle_nand_verify_command)
command_print(CMD_CTX, "NAND flash contents differ "
"at 0x%8.8" PRIx32, dev.address);
nand_fileio_cleanup(&dev);
return nand_fileio_cleanup(&file);
nand_fileio_cleanup(&file);
return ERROR_FAIL;
}
file.size -= bytes_read;
@@ -369,7 +348,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
if (nand_fileio_finish(&file) == ERROR_OK)
{
command_print(CMD_CTX, "verified file %s in NAND flash %s "
"up to offset 0x%8.8" PRIx32 " in %fs (%0.3f kb/s)",
"up to offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
duration_kbps(&file.bench, dev.size));
}
@@ -379,6 +358,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
COMMAND_HANDLER(handle_nand_dump_command)
{
int filesize;
struct nand_device *nand = NULL;
struct nand_fileio_state s;
int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
@@ -389,12 +369,13 @@ COMMAND_HANDLER(handle_nand_dump_command)
while (s.size > 0)
{
size_t size_written;
int retval = nand_read_page(nand, s.address / nand->page_size,
retval = nand_read_page(nand, s.address / nand->page_size,
s.page, s.page_size, s.oob, s.oob_size);
if (ERROR_OK != retval)
{
command_print(CMD_CTX, "reading NAND flash page failed");
return nand_fileio_cleanup(&s);
nand_fileio_cleanup(&s);
return retval;
}
if (NULL != s.page)
@@ -407,11 +388,15 @@ COMMAND_HANDLER(handle_nand_dump_command)
s.address += nand->page_size;
}
retval = fileio_size(&s.fileio, &filesize);
if (retval != ERROR_OK)
return retval;
if (nand_fileio_finish(&s) == ERROR_OK)
{
command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f kb/s)",
s.fileio.size, duration_elapsed(&s.bench),
duration_kbps(&s.bench, s.fileio.size));
command_print(CMD_CTX, "dumped %ld bytes in %fs (%0.3f KiB/s)",
(long)filesize, duration_elapsed(&s.bench),
duration_kbps(&s.bench, filesize));
}
return ERROR_OK;
}
@@ -446,74 +431,73 @@ COMMAND_HANDLER(handle_nand_raw_access_command)
static const struct command_registration nand_exec_command_handlers[] = {
{
.name = "list",
.handler = &handle_nand_list_command,
.handler = handle_nand_list_command,
.mode = COMMAND_EXEC,
.help = "list configured NAND flash devices",
},
{
.name = "info",
.handler = &handle_nand_info_command,
.handler = handle_nand_info_command,
.mode = COMMAND_EXEC,
.usage = "<bank>",
.help = "print info about a NAND flash device",
.usage = "[banknum | first_bank_num last_bank_num]",
.help = "print info about one or more NAND flash devices",
},
{
.name = "probe",
.handler = &handle_nand_probe_command,
.handler = handle_nand_probe_command,
.mode = COMMAND_EXEC,
.usage = "<bank>",
.help = "identify NAND flash device <num>",
.usage = "bank_id",
.help = "identify NAND flash device",
},
{
.name = "check_bad_blocks",
.handler = &handle_nand_check_bad_blocks_command,
.handler = handle_nand_check_bad_blocks_command,
.mode = COMMAND_EXEC,
.usage = "<bank> [<offset> <length>]",
.help = "check NAND flash device <num> for bad blocks",
.usage = "bank_id [offset length]",
.help = "check all or part of NAND flash device for bad blocks",
},
{
.name = "erase",
.handler = &handle_nand_erase_command,
.handler = handle_nand_erase_command,
.mode = COMMAND_EXEC,
.usage = "<bank> [<offset> <length>]",
.help = "erase blocks on NAND flash device",
.usage = "bank_id [offset length]",
.help = "erase all or subset of blocks on NAND flash device",
},
{
.name = "dump",
.handler = &handle_nand_dump_command,
.handler = handle_nand_dump_command,
.mode = COMMAND_EXEC,
.usage = "<bank> <filename> <offset> <length> "
"[oob_raw | oob_only]",
.usage = "bank_id filename offset length "
"['oob_raw'|'oob_only']",
.help = "dump from NAND flash device",
},
{
.name = "verify",
.handler = &handle_nand_verify_command,
.handler = handle_nand_verify_command,
.mode = COMMAND_EXEC,
.usage = "<bank> <filename> <offset> "
"[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
.usage = "bank_id filename offset "
"['oob_raw'|'oob_only'|'oob_softecc'|'oob_softecc_kw']",
.help = "verify NAND flash device",
},
{
.name = "write",
.handler = &handle_nand_write_command,
.handler = handle_nand_write_command,
.mode = COMMAND_EXEC,
.usage = "<bank> <filename> <offset> "
"[oob_raw | oob_only | oob_softecc | oob_softecc_kw]",
.usage = "bank_id filename offset "
"['oob_raw'|'oob_only'|'oob_softecc'|'oob_softecc_kw']",
.help = "write to NAND flash device",
},
{
.name = "raw_access",
.handler = &handle_nand_raw_access_command,
.handler = handle_nand_raw_access_command,
.mode = COMMAND_EXEC,
.usage = "<num> ['enable'|'disable']",
.usage = "bank_id ['enable'|'disable']",
.help = "raw access to NAND flash device",
},
COMMAND_REGISTRATION_DONE
};
int nand_init(struct command_context *cmd_ctx)
static int nand_init(struct command_context *cmd_ctx)
{
if (!nand_devices)
return ERROR_OK;
@@ -537,12 +521,14 @@ COMMAND_HANDLER(handle_nand_init_command)
LOG_DEBUG("Initializing NAND devices...");
return nand_init(CMD_CTX);
}
int nand_list_walker(struct nand_flash_controller *c, void *x)
static int nand_list_walker(struct nand_flash_controller *c, void *x)
{
struct command_context *cmd_ctx = (struct command_context *)x;
command_print(cmd_ctx, " %s", c->name);
return ERROR_OK;
}
COMMAND_HANDLER(handle_nand_list_drivers)
{
command_print(CMD_CTX, "Available NAND flash controller drivers:");
@@ -552,16 +538,37 @@ COMMAND_HANDLER(handle_nand_list_drivers)
static COMMAND_HELPER(create_nand_device, const char *bank_name,
struct nand_flash_controller *controller)
{
struct nand_device *c;
struct target *target;
int retval;
if (CMD_ARGC < 2)
{
LOG_ERROR("missing target");
return ERROR_COMMAND_ARGUMENT_INVALID;
}
target = get_target(CMD_ARGV[1]);
if (!target) {
LOG_ERROR("invalid target %s", CMD_ARGV[1]);
return ERROR_COMMAND_ARGUMENT_INVALID;
}
if (NULL != controller->commands)
{
int retval = register_commands(CMD_CTX, NULL,
retval = register_commands(CMD_CTX, NULL,
controller->commands);
if (ERROR_OK != retval)
return retval;
}
struct nand_device *c = malloc(sizeof(struct nand_device));
c = malloc(sizeof(struct nand_device));
if (c == NULL)
{
LOG_ERROR("End of memory");
return ERROR_FAIL;
}
c->name = strdup(bank_name);
c->target = target;
c->controller = controller;
c->controller_priv = NULL;
c->manufacturer = NULL;
@@ -572,7 +579,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
c->use_raw = 0;
c->next = NULL;
int retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
if (ERROR_OK != retval)
{
LOG_ERROR("'%s' driver rejected nand flash", controller->name);
@@ -587,7 +594,7 @@ static COMMAND_HELPER(create_nand_device, const char *bank_name,
COMMAND_HANDLER(handle_nand_device_command)
{
if (CMD_ARGC < 1)
if (CMD_ARGC < 2)
{
LOG_ERROR("incomplete nand device configuration");
return ERROR_FLASH_BANK_INVALID;
@@ -614,6 +621,7 @@ static const struct command_registration nand_config_command_handlers[] = {
.handler = &handle_nand_device_command,
.mode = COMMAND_CONFIG,
.help = "defines a new NAND bank",
.usage = "bank_id driver target [driver_options ...]",
},
{
.name = "drivers",

View File

@@ -1,6 +1,4 @@
AM_CPPFLAGS = \
-I$(top_srcdir)/src \
-I$(top_builddir)/src
include $(top_srcdir)/common.mk
noinst_LTLIBRARIES = libocdflashnor.la
libocdflashnor_la_SOURCES = \
@@ -16,6 +14,7 @@ NOR_DRIVERS = \
avrf.c \
cfi.c \
ecos.c \
em357.c \
faux.c \
lpc2000.c \
lpc288x.c \
@@ -23,31 +22,25 @@ NOR_DRIVERS = \
non_cfi.c \
ocl.c \
pic32mx.c \
stmsmi.c \
stellaris.c \
stm32x.c \
stm32f2xxx.c \
str7x.c \
str9x.c \
str9xpec.c \
tms470.c
tms470.c \
virtual.c
# Disabled for now, it generates warnings
# dsp5680xx_flash.c
noinst_HEADERS = \
at91sam7.h \
at91sam3.h \
avrf.h \
core.h \
cfi.h \
driver.h \
imp.h \
lpc2000.h \
lpc288x.h \
non_cfi.h \
ocl.h \
pic32mx.h \
stellaris.h \
stm32x.h \
str7x.h \
str9x.h \
str9xpec.h \
tms470.h
ocl.h
MAINTAINERCLEANFILES = $(srcdir)/Makefile.in

View File

@@ -105,19 +105,19 @@ static int aduc702x_erase(struct flash_bank *bank, int first, int last)
/* mass erase */
if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
LOG_DEBUG("performing mass erase.\n");
LOG_DEBUG("performing mass erase.");
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK)
{
LOG_ERROR("mass erase failed\n");
LOG_ERROR("mass erase failed");
aduc702x_set_write_enable(target, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
LOG_DEBUG("mass erase successful.\n");
LOG_DEBUG("mass erase successful.");
return ERROR_OK;
} else {
unsigned long adr;
@@ -132,12 +132,12 @@ static int aduc702x_erase(struct flash_bank *bank, int first, int last)
if (aduc702x_check_flash_completion(target, 50) != ERROR_OK)
{
LOG_ERROR("failed to erase sector at address 0x%08lX\n", adr);
LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
aduc702x_set_write_enable(target, 0);
return ERROR_FLASH_SECTOR_NOT_ERASED;
}
LOG_DEBUG("erased sector at address 0x%08lX\n", adr);
LOG_DEBUG("erased sector at address 0x%08lX", adr);
}
}
@@ -188,7 +188,7 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
r6 - set to 2, used to write flash command
*/
uint32_t aduc702x_flash_write_code[] = {
static const uint32_t aduc702x_flash_write_code[] = {
//<_start>:
0xe3a05008, // mov r5, #8 ; 0x8
0xe5845004, // str r5, [r4, #4]
@@ -227,7 +227,7 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
}
/* memory buffer */
while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
{
buffer_size /= 2;
if (buffer_size <= 256)
@@ -330,20 +330,20 @@ static int aduc702x_write_single(struct flash_bank *bank, uint8_t *buffer, uint3
if (aduc702x_check_flash_completion(target, 1) != ERROR_OK)
{
LOG_ERROR("single write failed for address 0x%08lX\n", (unsigned long)(offset + x));
LOG_ERROR("single write failed for address 0x%08lX", (unsigned long)(offset + x));
aduc702x_set_write_enable(target, 0);
return ERROR_FLASH_OPERATION_FAILED;
}
}
LOG_DEBUG("wrote %d bytes at address 0x%08lX\n", (int)count, (unsigned long)(offset + x));
LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
aduc702x_set_write_enable(target, 0);
return ERROR_OK;
}
int aduc702x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
static int aduc702x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
@@ -412,14 +412,15 @@ static int aduc702x_check_flash_completion(struct target* target, unsigned int t
}
struct flash_driver aduc702x_flash = {
.name = "aduc702x",
.flash_bank_command = &aduc702x_flash_bank_command,
.erase = &aduc702x_erase,
.protect = &aduc702x_protect,
.write = &aduc702x_write,
.probe = &aduc702x_probe,
.auto_probe = &aduc702x_probe,
.erase_check = &default_flash_blank_check,
.protect_check = &aduc702x_protect_check,
.info = &aduc702x_info
};
.name = "aduc702x",
.flash_bank_command = aduc702x_flash_bank_command,
.erase = aduc702x_erase,
.protect = aduc702x_protect,
.write = aduc702x_write,
.read = default_flash_read,
.probe = aduc702x_probe,
.auto_probe = aduc702x_probe,
.erase_check = default_flash_blank_check,
.protect_check = aduc702x_protect_check,
.info = aduc702x_info
};

View File

@@ -2,6 +2,10 @@
* Copyright (C) 2009 by Duane Ellis *
* openocd@duaneellis.com *
* *
* Copyright (C) 2010 by Olaf Lüke (at91sam3s* support) *
* olaf@uni-paderborn.de *
* *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -58,15 +62,16 @@
#include "imp.h"
#include "at91sam3.h"
#include <helper/membuf.h>
#include <helper/time_support.h>
#define REG_NAME_WIDTH (12)
// at91sam3u series (has one or two flash banks)
#define FLASH_BANK0_BASE_U 0x00080000
#define FLASH_BANK1_BASE_U 0x00100000
#define FLASH_BANK0_BASE 0x00080000
#define FLASH_BANK1_BASE 0x00100000
// at91sam3s series (has always one flash bank)
#define FLASH_BANK_BASE_S 0x00400000
#define AT91C_EFC_FCMD_GETD (0x0) // (EFC) Get Flash Descriptor
#define AT91C_EFC_FCMD_WP (0x1) // (EFC) Write Page
@@ -93,6 +98,8 @@
#define offset_EFC_FRR 12
extern struct flash_driver at91sam3_flash;
static float
_tomhz(uint32_t freq_hz)
{
@@ -211,8 +218,6 @@ struct sam3_chip {
struct sam3_chip_details details;
struct target *target;
struct sam3_cfg cfg;
struct membuf *mbuf;
};
@@ -257,6 +262,7 @@ get_current_sam3(struct command_context *cmd_ctx)
// these are used to *initialize* the "pChip->details" structure.
static const struct sam3_chip_details all_sam3_details[] = {
// Start at91sam3u* series
{
.chipid_cidr = 0x28100960,
.name = "at91sam3u4e",
@@ -287,7 +293,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK0_BASE,
.base_address = FLASH_BANK0_BASE_U,
.controller_address = 0x400e0800,
.present = 1,
.size_bytes = 128 * 1024,
@@ -302,7 +308,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 1,
.base_address = FLASH_BANK1_BASE,
.base_address = FLASH_BANK1_BASE_U,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 128 * 1024,
@@ -336,7 +342,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK0_BASE,
.base_address = FLASH_BANK0_BASE_U,
.controller_address = 0x400e0800,
.present = 1,
.size_bytes = 128 * 1024,
@@ -377,7 +383,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK0_BASE,
.base_address = FLASH_BANK0_BASE_U,
.controller_address = 0x400e0800,
.present = 1,
.size_bytes = 64 * 1024,
@@ -425,7 +431,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK0_BASE,
.base_address = FLASH_BANK0_BASE_U,
.controller_address = 0x400e0800,
.present = 1,
.size_bytes = 128 * 1024,
@@ -439,7 +445,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 1,
.base_address = FLASH_BANK1_BASE,
.base_address = FLASH_BANK1_BASE_U,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 128 * 1024,
@@ -473,7 +479,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK0_BASE,
.base_address = FLASH_BANK0_BASE_U,
.controller_address = 0x400e0800,
.present = 1,
.size_bytes = 128 * 1024,
@@ -514,7 +520,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK0_BASE,
.base_address = FLASH_BANK0_BASE_U,
.controller_address = 0x400e0800,
.present = 1,
.size_bytes = 64 * 1024,
@@ -532,6 +538,300 @@ static const struct sam3_chip_details all_sam3_details[] = {
},
},
// Start at91sam3s* series
// Note: The preliminary at91sam3s datasheet says on page 302
// that the flash controller is at address 0x400E0800.
// This is _not_ the case, the controller resides at address 0x400e0a0.
{
.chipid_cidr = 0x28A00960,
.name = "at91sam3s4c",
.total_flash_size = 256 * 1024,
.total_sram_size = 48 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 256 * 1024,
.nsectors = 32,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x28900960,
.name = "at91sam3s4b",
.total_flash_size = 256 * 1024,
.total_sram_size = 48 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 256 * 1024,
.nsectors = 32,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x28800960,
.name = "at91sam3s4a",
.total_flash_size = 256 * 1024,
.total_sram_size = 48 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 256 * 1024,
.nsectors = 32,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x28AA0760,
.name = "at91sam3s2c",
.total_flash_size = 128 * 1024,
.total_sram_size = 32 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 128 * 1024,
.nsectors = 16,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x289A0760,
.name = "at91sam3s2b",
.total_flash_size = 128 * 1024,
.total_sram_size = 32 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 128 * 1024,
.nsectors = 16,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x288A0760,
.name = "at91sam3s2a",
.total_flash_size = 128 * 1024,
.total_sram_size = 32 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 128 * 1024,
.nsectors = 16,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x28A90560,
.name = "at91sam3s1c",
.total_flash_size = 64 * 1024,
.total_sram_size = 16 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 64 * 1024,
.nsectors = 8,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x28990560,
.name = "at91sam3s1b",
.total_flash_size = 64 * 1024,
.total_sram_size = 16 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 64 * 1024,
.nsectors = 8,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
{
.chipid_cidr = 0x28890560,
.name = "at91sam3s1a",
.total_flash_size = 64 * 1024,
.total_sram_size = 16 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
// .bank[0] = {
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.present = 1,
.size_bytes = 64 * 1024,
.nsectors = 8,
.sector_size = 8192,
.page_size = 256,
},
// .bank[1] = {
{
.present = 0,
.probed = 0,
.bank_number = 1,
},
},
},
// terminate
{
.chipid_cidr = 0,
@@ -1000,20 +1300,6 @@ FLASHD_Lock(struct sam3_bank_private *pPrivate,
/****** END SAM3 CODE ********/
/* begin helpful debug code */
static void
sam3_sprintf(struct sam3_chip *pChip , const char *fmt, ...)
{
va_list ap;
va_start(ap,fmt);
if (pChip->mbuf == NULL) {
return;
}
membuf_vsprintf(pChip->mbuf, fmt, ap);
va_end(ap);
}
// print the fieldname, the field value, in dec & hex, and return field value
static uint32_t
sam3_reg_fieldname(struct sam3_chip *pChip,
@@ -1038,7 +1324,7 @@ sam3_reg_fieldname(struct sam3_chip *pChip,
}
// show the basics
sam3_sprintf(pChip, "\t%*s: %*d [0x%0*x] ",
LOG_USER_N("\t%*s: %*d [0x%0*x] ",
REG_NAME_WIDTH, regname,
dwidth, v,
hwidth, v);
@@ -1173,16 +1459,16 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
uint32_t rcen;
v = sam3_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1);
sam3_sprintf(pChip, "(main xtal enabled: %s)\n",
LOG_USER("(main xtal enabled: %s)",
_yes_or_no(v));
v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
sam3_sprintf(pChip, "(main osc bypass: %s)\n",
LOG_USER("(main osc bypass: %s)",
_yes_or_no(v));
rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 2, 1);
sam3_sprintf(pChip, "(onchip RC-OSC enabled: %s)\n",
rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1);
LOG_USER("(onchip RC-OSC enabled: %s)",
_yes_or_no(rcen));
v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
sam3_sprintf(pChip, "(onchip RC-OSC freq: %s)\n",
LOG_USER("(onchip RC-OSC freq: %s)",
_rc_freq[v]);
pChip->cfg.rc_freq = 0;
@@ -1190,6 +1476,7 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
switch (v) {
default:
pChip->cfg.rc_freq = 0;
break;
case 0:
pChip->cfg.rc_freq = 4 * 1000 * 1000;
break;
@@ -1203,14 +1490,14 @@ sam3_explain_ckgr_mor(struct sam3_chip *pChip)
}
v = sam3_reg_fieldname(pChip,"MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8);
sam3_sprintf(pChip, "(startup clks, time= %f uSecs)\n",
LOG_USER("(startup clks, time= %f uSecs)",
((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq)));
v = sam3_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1);
sam3_sprintf(pChip, "(mainosc source: %s)\n",
LOG_USER("(mainosc source: %s)",
v ? "external xtal" : "internal RC");
v = sam3_reg_fieldname(pChip,"CFDEN", pChip->cfg.CKGR_MOR, 25, 1);
sam3_sprintf(pChip, "(clock failure enabled: %s)\n",
LOG_USER("(clock failure enabled: %s)",
_yes_or_no(v));
}
@@ -1224,19 +1511,19 @@ sam3_explain_chipid_cidr(struct sam3_chip *pChip)
const char *cp;
sam3_reg_fieldname(pChip, "Version", pChip->cfg.CHIPID_CIDR, 0, 5);
sam3_sprintf(pChip,"\n");
LOG_USER_N("\n");
v = sam3_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3);
sam3_sprintf(pChip, "%s\n", eproc_names[v]);
LOG_USER("%s", eproc_names[v]);
v = sam3_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4);
sam3_sprintf(pChip, "%s\n", nvpsize[v]);
LOG_USER("%s", nvpsize[v]);
v = sam3_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4);
sam3_sprintf(pChip, "%s\n", nvpsize2[v]);
LOG_USER("%s", nvpsize2[v]);
v = sam3_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16,4);
sam3_sprintf(pChip, "%s\n", sramsize[ v ]);
LOG_USER("%s", sramsize[ v ]);
v = sam3_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8);
cp = _unknown;
@@ -1247,13 +1534,13 @@ sam3_explain_chipid_cidr(struct sam3_chip *pChip)
}
}
sam3_sprintf(pChip, "%s\n", cp);
LOG_USER("%s", cp);
v = sam3_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3);
sam3_sprintf(pChip, "%s\n", nvptype[ v ]);
LOG_USER("%s", nvptype[ v ]);
v = sam3_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1);
sam3_sprintf(pChip, "(exists: %s)\n", _yes_or_no(v));
LOG_USER("(exists: %s)", _yes_or_no(v));
}
static void
@@ -1263,14 +1550,14 @@ sam3_explain_ckgr_mcfr(struct sam3_chip *pChip)
v = sam3_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1);
sam3_sprintf(pChip, "(main ready: %s)\n", _yes_or_no(v));
LOG_USER("(main ready: %s)", _yes_or_no(v));
v = sam3_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16);
v = (v * pChip->cfg.slow_freq) / 16;
pChip->cfg.mainosc_freq = v;
sam3_sprintf(pChip, "(%3.03f Mhz (%d.%03dkhz slowclk)\n",
LOG_USER("(%3.03f Mhz (%d.%03dkhz slowclk)",
_tomhz(v),
pChip->cfg.slow_freq / 1000,
pChip->cfg.slow_freq % 1000);
@@ -1283,17 +1570,17 @@ sam3_explain_ckgr_plla(struct sam3_chip *pChip)
uint32_t mula,diva;
diva = sam3_reg_fieldname(pChip, "DIVA", pChip->cfg.CKGR_PLLAR, 0, 8);
sam3_sprintf(pChip,"\n");
LOG_USER_N("\n");
mula = sam3_reg_fieldname(pChip, "MULA", pChip->cfg.CKGR_PLLAR, 16, 11);
sam3_sprintf(pChip,"\n");
LOG_USER_N("\n");
pChip->cfg.plla_freq = 0;
if (mula == 0) {
sam3_sprintf(pChip,"\tPLLA Freq: (Disabled,mula = 0)\n");
LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
} else if (diva == 0) {
sam3_sprintf(pChip,"\tPLLA Freq: (Disabled,diva = 0)\n");
LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
} else if (diva == 1) {
pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1));
sam3_sprintf(pChip,"\tPLLA Freq: %3.03f MHz\n",
LOG_USER("\tPLLA Freq: %3.03f MHz",
_tomhz(pChip->cfg.plla_freq));
}
}
@@ -1334,7 +1621,7 @@ sam3_explain_mckr(struct sam3_chip *pChip)
break;
}
sam3_sprintf(pChip, "%s (%3.03f Mhz)\n",
LOG_USER("%s (%3.03f Mhz)",
cp,
_tomhz(fin));
pres = sam3_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3);
@@ -1342,6 +1629,7 @@ sam3_explain_mckr(struct sam3_chip *pChip)
case 0:
pdiv = 1;
cp = "selected clock";
break;
case 1:
pdiv = 2;
cp = "clock/2";
@@ -1374,14 +1662,14 @@ sam3_explain_mckr(struct sam3_chip *pChip)
assert(0);
break;
}
sam3_sprintf(pChip, "(%s)\n", cp);
LOG_USER("(%s)", cp);
fin = fin / pdiv;
// sam3 has a *SINGLE* clock -
// other at91 series parts have divisors for these.
pChip->cfg.cpu_freq = fin;
pChip->cfg.mclk_freq = fin;
pChip->cfg.fclk_freq = fin;
sam3_sprintf(pChip, "\t\tResult CPU Freq: %3.03f\n",
LOG_USER("\t\tResult CPU Freq: %3.03f",
_tomhz(fin));
}
@@ -1417,7 +1705,7 @@ sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_list *pList)
// By using prototypes - we can detect what would
// be casting errors.
return ((uint32_t *)(((char *)(pCfg)) + pList->struct_offset));
return ((uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset));
}
@@ -1471,7 +1759,7 @@ sam3_GetReg(struct sam3_chip *pChip, uint32_t *goes_here)
// calculate where this one go..
// it is "possibly" this register.
pPossible = ((uint32_t *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
// well? Is it this register
if (pPossible == goes_here) {
@@ -1501,7 +1789,7 @@ sam3_ReadThisReg(struct sam3_chip *pChip, uint32_t *goes_here)
r = target_read_u32(pChip->target, pReg->address, goes_here);
if (r != ERROR_OK) {
LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d\n",
LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
pReg->name, (unsigned)(pReg->address), r);
}
return r;
@@ -1520,7 +1808,7 @@ sam3_ReadAllRegs(struct sam3_chip *pChip)
r = sam3_ReadThisReg(pChip,
sam3_get_reg_ptr(&(pChip->cfg), pReg));
if (r != ERROR_OK) {
LOG_ERROR("Cannot read SAM3 registere: %s @ 0x%08x, Error: %d\n",
LOG_ERROR("Cannot read SAM3 registere: %s @ 0x%08x, Error: %d",
pReg->name, ((unsigned)(pReg->address)), r);
return r;
}
@@ -1538,15 +1826,12 @@ sam3_GetInfo(struct sam3_chip *pChip)
const struct sam3_reg_list *pReg;
uint32_t regval;
membuf_reset(pChip->mbuf);
pReg = &(sam3_all_regs[0]);
while (pReg->name) {
// display all regs
LOG_DEBUG("Start: %s", pReg->name);
regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg);
sam3_sprintf(pChip, "%*s: [0x%08x] -> 0x%08x\n",
LOG_USER("%*s: [0x%08x] -> 0x%08x",
REG_NAME_WIDTH,
pReg->name,
pReg->address,
@@ -1557,14 +1842,14 @@ sam3_GetInfo(struct sam3_chip *pChip)
LOG_DEBUG("End: %s", pReg->name);
pReg++;
}
sam3_sprintf(pChip," rc-osc: %3.03f MHz\n", _tomhz(pChip->cfg.rc_freq));
sam3_sprintf(pChip," mainosc: %3.03f MHz\n", _tomhz(pChip->cfg.mainosc_freq));
sam3_sprintf(pChip," plla: %3.03f MHz\n", _tomhz(pChip->cfg.plla_freq));
sam3_sprintf(pChip," cpu-freq: %3.03f MHz\n", _tomhz(pChip->cfg.cpu_freq));
sam3_sprintf(pChip,"mclk-freq: %3.03f MHz\n", _tomhz(pChip->cfg.mclk_freq));
LOG_USER(" rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq));
LOG_USER(" mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq));
LOG_USER(" plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq));
LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq));
LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq));
sam3_sprintf(pChip, " UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x\n",
LOG_USER(" UniqueId: 0x%08x 0x%08x 0x%08x 0x%08x",
pChip->cfg.unique_id[0],
pChip->cfg.unique_id[1],
pChip->cfg.unique_id[2],
@@ -1586,7 +1871,7 @@ sam3_erase_check(struct flash_bank *bank)
return ERROR_TARGET_NOT_HALTED;
}
if (0 == bank->num_sectors) {
LOG_ERROR("Target: not supported/not probed\n");
LOG_ERROR("Target: not supported/not probed");
return ERROR_FAIL;
}
@@ -1664,32 +1949,38 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command)
// assumption is this runs at 32khz
pChip->cfg.slow_freq = 32768;
pChip->probed = 0;
pChip->mbuf = membuf_new();
if (!(pChip->mbuf)) {
LOG_ERROR("no memory");
return ERROR_FAIL;
}
}
switch (bank->base) {
default:
LOG_ERROR("Address 0x%08x invalid bank address (try 0x%08x or 0x%08x)",
LOG_ERROR("Address 0x%08x invalid bank address (try 0x%08x or 0x%08x \
[at91sam3u series] or 0x%08x [at91sam3s series])",
((unsigned int)(bank->base)),
((unsigned int)(FLASH_BANK0_BASE)),
((unsigned int)(FLASH_BANK1_BASE)));
((unsigned int)(FLASH_BANK0_BASE_U)),
((unsigned int)(FLASH_BANK1_BASE_U)),
((unsigned int)(FLASH_BANK_BASE_S)));
return ERROR_FAIL;
break;
case FLASH_BANK0_BASE:
// at91sam3u series
case FLASH_BANK0_BASE_U:
bank->driver_priv = &(pChip->details.bank[0]);
bank->bank_number = 0;
pChip->details.bank[0].pChip = pChip;
pChip->details.bank[0].pBank = bank;
break;
case FLASH_BANK1_BASE:
case FLASH_BANK1_BASE_U:
bank->driver_priv = &(pChip->details.bank[1]);
bank->bank_number = 1;
pChip->details.bank[1].pChip = pChip;
pChip->details.bank[1].pBank = bank;
// at91sam3s series
case FLASH_BANK_BASE_S:
bank->driver_priv = &(pChip->details.bank[0]);
bank->bank_number = 0;
pChip->details.bank[0].pChip = pChip;
pChip->details.bank[0].pBank = bank;
break;
}
@@ -1702,16 +1993,14 @@ sam3_GetDetails(struct sam3_bank_private *pPrivate)
{
const struct sam3_chip_details *pDetails;
struct sam3_chip *pChip;
void *vp;
struct flash_bank *saved_banks[SAM3_MAX_FLASH_BANKS];
unsigned x;
const char *cp;
LOG_DEBUG("Begin");
pDetails = all_sam3_details;
while (pDetails->name) {
if (pDetails->chipid_cidr == pPrivate->pChip->cfg.CHIPID_CIDR) {
// Compare cidr without version bits
if (pDetails->chipid_cidr == (pPrivate->pChip->cfg.CHIPID_CIDR & 0xFFFFFFE0)) {
break;
} else {
pDetails++;
@@ -1721,16 +2010,9 @@ sam3_GetDetails(struct sam3_bank_private *pPrivate)
LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can this chip?)",
(unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
// Help the victim, print details about the chip
membuf_reset(pPrivate->pChip->mbuf);
membuf_sprintf(pPrivate->pChip->mbuf,
"SAM3 CHIPID_CIDR: 0x%08x decodes as follows\n",
LOG_INFO("SAM3 CHIPID_CIDR: 0x%08x decodes as follows",
pPrivate->pChip->cfg.CHIPID_CIDR);
sam3_explain_chipid_cidr(pPrivate->pChip);
cp = membuf_strtok(pPrivate->pChip->mbuf, "\n", &vp);
while (cp) {
LOG_INFO("%s", cp);
cp = membuf_strtok(NULL, "\n", &vp);
}
return ERROR_FAIL;
}
@@ -1787,7 +2069,7 @@ _sam3_probe(struct flash_bank *bank, int noise)
pPrivate = get_sam3_bank_private(bank);
if (!pPrivate) {
LOG_ERROR("Invalid/unknown bank number\n");
LOG_ERROR("Invalid/unknown bank number");
return ERROR_FAIL;
}
@@ -1798,18 +2080,14 @@ _sam3_probe(struct flash_bank *bank, int noise)
LOG_DEBUG("Here");
r = sam3_GetInfo(pPrivate->pChip);
if (pPrivate->pChip->probed) {
r = sam3_GetInfo(pPrivate->pChip);
} else {
r = sam3_GetDetails(pPrivate);
}
if (r != ERROR_OK) {
return r;
}
if (!(pPrivate->pChip->probed)) {
pPrivate->pChip->probed = 1;
LOG_DEBUG("Here");
r = sam3_GetDetails(pPrivate);
if (r != ERROR_OK) {
return r;
}
}
// update the flash bank size
for (x = 0 ; x < SAM3_MAX_FLASH_BANKS ; x++) {
@@ -2046,9 +2324,7 @@ sam3_page_write_opcodes[] = {
0x10,0xf0,0x01,0x0f,
// 41 0024 FBD0 beq .L4
0xfb,0xd0,
// 42 .done:
// 43 0026 FEE7 b .done
0xfe,0xe7
0x00,0xBE /* bkpt #0 */
};
@@ -2258,8 +2534,6 @@ sam3_write(struct flash_bank *bank,
COMMAND_HANDLER(sam3_handle_info_command)
{
struct sam3_chip *pChip;
void *vp;
const char *cp;
unsigned x;
int r;
@@ -2288,7 +2562,7 @@ COMMAND_HANDLER(sam3_handle_info_command)
return ERROR_FAIL;
}
}
// above garentees the "chip details" structure is valid
// above guarantees the "chip details" structure is valid
// and thus, bank private areas are valid
// and we have a SAM3 chip, what a concept!
@@ -2317,17 +2591,10 @@ COMMAND_HANDLER(sam3_handle_info_command)
r = sam3_GetInfo(pChip);
if (r != ERROR_OK) {
LOG_DEBUG("Sam3Info, Failed %d\n",r);
LOG_DEBUG("Sam3Info, Failed %d",r);
return r;
}
// print results
cp = membuf_strtok(pChip->mbuf, "\n", &vp);
while (cp) {
command_print(CMD_CTX,"%s", cp);
cp = membuf_strtok(NULL, "\n", &vp);
}
return ERROR_OK;
}
@@ -2386,7 +2653,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
if (0 == strcmp("show", CMD_ARGV[0])) {
if (who == -1) {
showall:
showall:
r = ERROR_OK;
for (x = 0 ; x < pChip->details.n_gpnvms ; x++) {
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v);
@@ -2418,7 +2685,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
(0 == strcmp("clear", CMD_ARGV[0]))) { // quietly accept both
r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
} else {
command_print(CMD_CTX, "Unkown command: %s", CMD_ARGV[0]);
command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
r = ERROR_COMMAND_SYNTAX_ERROR;
}
return r;
@@ -2466,24 +2733,27 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
static const struct command_registration at91sam3_exec_command_handlers[] = {
{
.name = "gpnvm",
.handler = &sam3_handle_gpnvm_command,
.handler = sam3_handle_gpnvm_command,
.mode = COMMAND_EXEC,
.usage = "[(set|clear) [<bit_id>]]",
.help = "Without arguments, shows the gpnvm register; "
"otherwise, sets or clear the specified bit.",
.usage = "[('clr'|'set'|'show') bitnum]",
.help = "Without arguments, shows all bits in the gpnvm "
"register. Otherwise, clears, sets, or shows one "
"General Purpose Non-Volatile Memory (gpnvm) bit.",
},
{
.name = "info",
.handler = &sam3_handle_info_command,
.handler = sam3_handle_info_command,
.mode = COMMAND_EXEC,
.help = "print information about the current sam3 chip",
.help = "Print information about the current at91sam3 chip"
"and its flash configuration.",
},
{
.name = "slowclk",
.handler = &sam3_handle_slowclk_command,
.handler = sam3_handle_slowclk_command,
.mode = COMMAND_EXEC,
.usage = "<value>",
.help = "set the slowclock frequency (default 32768hz)",
.usage = "[clock_hz]",
.help = "Display or set the slowclock frequency "
"(default 32768 Hz).",
},
COMMAND_REGISTRATION_DONE
};
@@ -2498,15 +2768,16 @@ static const struct command_registration at91sam3_command_handlers[] = {
};
struct flash_driver at91sam3_flash = {
.name = "at91sam3",
.commands = at91sam3_command_handlers,
.flash_bank_command = &sam3_flash_bank_command,
.erase = &sam3_erase,
.protect = &sam3_protect,
.write = &sam3_write,
.probe = &sam3_probe,
.auto_probe = &sam3_auto_probe,
.erase_check = &sam3_erase_check,
.protect_check = &sam3_protect_check,
.info = &sam3_info,
};
.name = "at91sam3",
.commands = at91sam3_command_handlers,
.flash_bank_command = sam3_flash_bank_command,
.erase = sam3_erase,
.protect = sam3_protect,
.write = sam3_write,
.read = default_flash_read,
.probe = sam3_probe,
.auto_probe = sam3_auto_probe,
.erase_check = sam3_erase_check,
.protect_check = sam3_protect_check,
.info = sam3_info,
};

View File

@@ -50,9 +50,55 @@
#endif
#include "imp.h"
#include "at91sam7.h"
#include <helper/binarybuffer.h>
/* AT91SAM7 control registers */
#define DBGU_CIDR 0xFFFFF240
#define CKGR_MCFR 0xFFFFFC24
#define CKGR_MOR 0xFFFFFC20
#define CKGR_MCFR_MAINRDY 0x10000
#define CKGR_PLLR 0xFFFFFC2c
#define CKGR_PLLR_DIV 0xff
#define CKGR_PLLR_MUL 0x07ff0000
#define PMC_MCKR 0xFFFFFC30
#define PMC_MCKR_CSS 0x03
#define PMC_MCKR_PRES 0x1c
/* Flash Controller Commands */
#define WP 0x01
#define SLB 0x02
#define WPL 0x03
#define CLB 0x04
#define EA 0x08
#define SGPB 0x0B
#define CGPB 0x0D
#define SSB 0x0F
/* MC_FSR bit definitions */
#define MC_FSR_FRDY 1
#define MC_FSR_EOL 2
/* AT91SAM7 constants */
#define RC_FREQ 32000
/* Flash timing modes */
#define FMR_TIMING_NONE 0
#define FMR_TIMING_NVBITS 1
#define FMR_TIMING_FLASH 2
/* Flash size constants */
#define FLASH_SIZE_8KB 1
#define FLASH_SIZE_16KB 2
#define FLASH_SIZE_32KB 3
#define FLASH_SIZE_64KB 5
#define FLASH_SIZE_128KB 7
#define FLASH_SIZE_256KB 9
#define FLASH_SIZE_512KB 10
#define FLASH_SIZE_1024KB 12
#define FLASH_SIZE_2048KB 14
static int at91sam7_protect_check(struct flash_bank *bank);
static int at91sam7_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
@@ -67,6 +113,50 @@ static uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","ARM926EJ-S","Unknown","Unknown"};
struct at91sam7_flash_bank
{
/* chip id register */
uint32_t cidr;
uint16_t cidr_ext;
uint16_t cidr_nvptyp;
uint16_t cidr_arch;
uint16_t cidr_sramsiz;
uint16_t cidr_nvpsiz;
uint16_t cidr_nvpsiz2;
uint16_t cidr_eproc;
uint16_t cidr_version;
const char *target_name;
/* flash auto-detection */
uint8_t flash_autodetection;
/* flash geometry */
uint16_t pages_per_sector;
uint16_t pagesize;
uint16_t pages_in_lockregion;
/* nv memory bits */
uint16_t num_lockbits_on;
uint16_t lockbits;
uint16_t num_nvmbits;
uint16_t num_nvmbits_on;
uint16_t nvmbits;
uint8_t securitybit;
/* 0: not init
* 1: fmcn for nvbits (1uS)
* 2: fmcn for flash (1.5uS) */
uint8_t flashmode;
/* main clock status */
uint8_t mck_valid;
uint32_t mck_freq;
/* external clock frequency */
uint32_t ext_freq;
};
#if 0
static long SRAMSIZ[16] = {
-1,
@@ -298,7 +388,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
uint32_t ext_freq;
uint32_t bank_size;
uint32_t base_address = 0;
char *target_name = "Unknown";
char *target_name_t = "Unknown";
at91sam7_info = t_bank->driver_priv;
@@ -386,7 +476,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
if (arch == 0x70)
{
num_nvmbits = 2;
target_name = "AT91SAM7S161/16";
target_name_t = "AT91SAM7S161/16";
}
break;
@@ -399,12 +489,12 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
if (arch == 0x70)
{
num_nvmbits = 2;
target_name = "AT91SAM7S321/32";
target_name_t = "AT91SAM7S321/32";
}
if (arch == 0x72)
{
num_nvmbits = 3;
target_name = "AT91SAM7SE32";
target_name_t = "AT91SAM7SE32";
}
break;
@@ -417,7 +507,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
if (arch == 0x70)
{
num_nvmbits = 2;
target_name = "AT91SAM7S64";
target_name_t = "AT91SAM7S64";
}
break;
@@ -430,22 +520,22 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
if (arch == 0x70)
{
num_nvmbits = 2;
target_name = "AT91SAM7S128";
target_name_t = "AT91SAM7S128";
}
if (arch == 0x71)
{
num_nvmbits = 3;
target_name = "AT91SAM7XC128";
target_name_t = "AT91SAM7XC128";
}
if (arch == 0x72)
{
num_nvmbits = 3;
target_name = "AT91SAM7SE128";
target_name_t = "AT91SAM7SE128";
}
if (arch == 0x75)
{
num_nvmbits = 3;
target_name = "AT91SAM7X128";
target_name_t = "AT91SAM7X128";
}
break;
@@ -458,27 +548,27 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
if (arch == 0x60)
{
num_nvmbits = 3;
target_name = "AT91SAM7A3";
target_name_t = "AT91SAM7A3";
}
if (arch == 0x70)
{
num_nvmbits = 2;
target_name = "AT91SAM7S256";
target_name_t = "AT91SAM7S256";
}
if (arch == 0x71)
{
num_nvmbits = 3;
target_name = "AT91SAM7XC256";
target_name_t = "AT91SAM7XC256";
}
if (arch == 0x72)
{
num_nvmbits = 3;
target_name = "AT91SAM7SE256";
target_name_t = "AT91SAM7SE256";
}
if (arch == 0x75)
{
num_nvmbits = 3;
target_name = "AT91SAM7X256";
target_name_t = "AT91SAM7X256";
}
break;
@@ -491,22 +581,22 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
if (arch == 0x70)
{
num_nvmbits = 2;
target_name = "AT91SAM7S512";
target_name_t = "AT91SAM7S512";
}
if (arch == 0x71)
{
num_nvmbits = 3;
target_name = "AT91SAM7XC512";
target_name_t = "AT91SAM7XC512";
}
if (arch == 0x72)
{
num_nvmbits = 3;
target_name = "AT91SAM7SE512";
target_name_t = "AT91SAM7SE512";
}
if (arch == 0x75)
{
num_nvmbits = 3;
target_name = "AT91SAM7X512";
target_name_t = "AT91SAM7X512";
}
break;
@@ -517,7 +607,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
break;
}
if (strcmp(target_name, "Unknown") == 0)
if (strcmp(target_name_t, "Unknown") == 0)
{
LOG_ERROR("Target autodetection failed! Please specify target parameters in configuration file");
return ERROR_FLASH_OPERATION_FAILED;
@@ -573,7 +663,7 @@ static int at91sam7_read_part_info(struct flash_bank *bank)
at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007;
at91sam7_info->cidr_version = cidr&0x001F;
at91sam7_info->target_name = target_name;
at91sam7_info->target_name = target_name_t;
at91sam7_info->flashmode = 0;
at91sam7_info->ext_freq = ext_freq;
at91sam7_info->num_nvmbits = num_nvmbits;
@@ -731,7 +821,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
uint16_t page_size;
uint16_t num_nvmbits;
char *target_name;
char *target_name_t;
int bnk, sec;
@@ -775,8 +865,8 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
return ERROR_OK;
}
target_name = calloc(strlen(CMD_ARGV[7]) + 1, sizeof(char));
strcpy(target_name, CMD_ARGV[7]);
target_name_t = calloc(strlen(CMD_ARGV[7]) + 1, sizeof(char));
strcpy(target_name_t, CMD_ARGV[7]);
/* calculate bank size */
bank_size = num_sectors * pages_per_sector * page_size;
@@ -816,7 +906,7 @@ FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
at91sam7_info = t_bank->driver_priv;
at91sam7_info->target_name = target_name;
at91sam7_info->target_name = target_name_t;
at91sam7_info->flashmode = 0;
at91sam7_info->ext_freq = ext_freq;
at91sam7_info->num_nvmbits = num_nvmbits;
@@ -1034,7 +1124,7 @@ static int at91sam7_probe(struct flash_bank *bank)
return ERROR_OK;
}
static int at91sam7_info(struct flash_bank *bank, char *buf, int buf_size)
static int get_at91sam7_info(struct flash_bank *bank, char *buf, int buf_size)
{
int printed;
struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
@@ -1171,7 +1261,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
/* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
status = at91sam7_get_flash_status(bank->target, 0);
LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value %d, status 0x%" PRIx32 " \n", flashcmd, bit, status);
LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value %d, status 0x%" PRIx32, flashcmd, bit, status);
/* check protect state */
at91sam7_protect_check(bank);
@@ -1182,10 +1272,11 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
static const struct command_registration at91sam7_exec_command_handlers[] = {
{
.name = "gpnvm",
.handler = &at91sam7_handle_gpnvm_command,
.handler = at91sam7_handle_gpnvm_command,
.mode = COMMAND_EXEC,
.usage = "gpnvm <bit> set | clear, "
"set or clear one gpnvm bit",
.help = "set or clear one General Purpose Non-Volatile Memory "
"(gpnvm) bit",
.usage = "bitnum ('set'|'clear')",
},
COMMAND_REGISTRATION_DONE
};
@@ -1200,15 +1291,16 @@ static const struct command_registration at91sam7_command_handlers[] = {
};
struct flash_driver at91sam7_flash = {
.name = "at91sam7",
.commands = at91sam7_command_handlers,
.flash_bank_command = &at91sam7_flash_bank_command,
.erase = &at91sam7_erase,
.protect = &at91sam7_protect,
.write = &at91sam7_write,
.probe = &at91sam7_probe,
.auto_probe = &at91sam7_probe,
.erase_check = &at91sam7_erase_check,
.protect_check = &at91sam7_protect_check,
.info = &at91sam7_info,
};
.name = "at91sam7",
.commands = at91sam7_command_handlers,
.flash_bank_command = at91sam7_flash_bank_command,
.erase = at91sam7_erase,
.protect = at91sam7_protect,
.write = at91sam7_write,
.read = default_flash_read,
.probe = at91sam7_probe,
.auto_probe = at91sam7_probe,
.erase_check = at91sam7_erase_check,
.protect_check = at91sam7_protect_check,
.info = get_at91sam7_info,
};

View File

@@ -1,116 +0,0 @@
/***************************************************************************
* Copyright (C) 2006 by Magnus Lundin *
* lundin@mlu.mine.nu *
* *
* Copyright (C) 2006 by Gheorghe Guran (atlas) *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifndef AT91SAM7_H
#define AT91SAM7_H
struct at91sam7_flash_bank
{
/* chip id register */
uint32_t cidr;
uint16_t cidr_ext;
uint16_t cidr_nvptyp;
uint16_t cidr_arch;
uint16_t cidr_sramsiz;
uint16_t cidr_nvpsiz;
uint16_t cidr_nvpsiz2;
uint16_t cidr_eproc;
uint16_t cidr_version;
char *target_name;
/* flash auto-detection */
uint8_t flash_autodetection;
/* flash geometry */
uint16_t pages_per_sector;
uint16_t pagesize;
uint16_t pages_in_lockregion;
/* nv memory bits */
uint16_t num_lockbits_on;
uint16_t lockbits;
uint16_t num_nvmbits;
uint16_t num_nvmbits_on;
uint16_t nvmbits;
uint8_t securitybit;
/* 0: not init
* 1: fmcn for nvbits (1uS)
* 2: fmcn for flash (1.5uS) */
uint8_t flashmode;
/* main clock status */
uint8_t mck_valid;
uint32_t mck_freq;
/* external clock frequency */
uint32_t ext_freq;
};
/* AT91SAM7 control registers */
#define DBGU_CIDR 0xFFFFF240
#define CKGR_MCFR 0xFFFFFC24
#define CKGR_MOR 0xFFFFFC20
#define CKGR_MCFR_MAINRDY 0x10000
#define CKGR_PLLR 0xFFFFFC2c
#define CKGR_PLLR_DIV 0xff
#define CKGR_PLLR_MUL 0x07ff0000
#define PMC_MCKR 0xFFFFFC30
#define PMC_MCKR_CSS 0x03
#define PMC_MCKR_PRES 0x1c
/* Flash Controller Commands */
#define WP 0x01
#define SLB 0x02
#define WPL 0x03
#define CLB 0x04
#define EA 0x08
#define SGPB 0x0B
#define CGPB 0x0D
#define SSB 0x0F
/* MC_FSR bit definitions */
#define MC_FSR_FRDY 1
#define MC_FSR_EOL 2
/* AT91SAM7 constants */
#define RC_FREQ 32000
/* Flash timing modes */
#define FMR_TIMING_NONE 0
#define FMR_TIMING_NVBITS 1
#define FMR_TIMING_FLASH 2
/* Flash size constants */
#define FLASH_SIZE_8KB 1
#define FLASH_SIZE_16KB 2
#define FLASH_SIZE_32KB 3
#define FLASH_SIZE_64KB 5
#define FLASH_SIZE_128KB 7
#define FLASH_SIZE_256KB 9
#define FLASH_SIZE_512KB 10
#define FLASH_SIZE_1024KB 12
#define FLASH_SIZE_2048KB 14
#endif /* AT91SAM7_H */

View File

@@ -22,7 +22,6 @@
#endif
#include "imp.h"
#include "avrf.h"
#include <target/avrt.h>
@@ -50,24 +49,30 @@
#define AVR_JTAG_REG_ProgrammingCommand_Len 15
#define AVR_JTAG_REG_FlashDataByte_Len 16
struct avrf_type avft_chips_info[] =
struct avrf_type
{
// name, chip_id, flash_page_size, flash_page_num, eeprom_page_size, eeprom_page_num
{"atmega128", 0x9702, 256, 512, 8, 512},
char name[15];
uint16_t chip_id;
int flash_page_size;
int flash_page_num;
int eeprom_page_size;
int eeprom_page_num;
};
int avr_jtag_sendinstr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out);
int avr_jtag_senddat(struct jtag_tap *tap, uint32_t *dr_in, uint32_t dr_out, int len);
struct avrf_flash_bank
{
int ppage_size;
int probed;
};
int mcu_write_ir(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int ir_len, int rti);
int mcu_write_dr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t *ir_out, int dr_len, int rti);
int mcu_write_ir_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out, int ir_len, int rti);
int mcu_write_dr_u8(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out, int dr_len, int rti);
int mcu_write_ir_u16(struct jtag_tap *tap, uint16_t *ir_in, uint16_t ir_out, int ir_len, int rti);
int mcu_write_dr_u16(struct jtag_tap *tap, uint16_t *ir_in, uint16_t ir_out, int dr_len, int rti);
int mcu_write_ir_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t ir_out, int ir_len, int rti);
int mcu_write_dr_u32(struct jtag_tap *tap, uint32_t *ir_in, uint32_t ir_out, int dr_len, int rti);
int mcu_execute_queue(void);
static struct avrf_type avft_chips_info[] =
{
/* name, chip_id, flash_page_size, flash_page_num,
* eeprom_page_size, eeprom_page_num
*/
{"atmega128", 0x9702, 256, 512, 8, 512},
{"at90can128", 0x9781, 256, 512, 8, 512},
};
/* avr program functions */
static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
@@ -200,8 +205,27 @@ FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
static int avrf_erase(struct flash_bank *bank, int first, int last)
{
LOG_INFO("%s", __FUNCTION__);
return ERROR_OK;
struct target *target = bank->target;
struct avr_common *avr = target->arch_info;
int status;
LOG_DEBUG("%s", __FUNCTION__);
if (target->state != TARGET_HALTED)
{
LOG_ERROR("Target not halted");
return ERROR_TARGET_NOT_HALTED;
}
status = avr_jtagprg_enterprogmode(avr);
if (status != ERROR_OK)
return status;
status = avr_jtagprg_chiperase(avr);
if (status != ERROR_OK)
return status;
return avr_jtagprg_leaveprogmode(avr);
}
static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
@@ -302,6 +326,12 @@ static int avrf_probe(struct flash_bank *bank)
if (avr_info != NULL)
{
if (bank->sectors)
{
free(bank->sectors);
bank->sectors = NULL;
}
// chip found
bank->base = 0x00000000;
bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
@@ -452,7 +482,7 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
static const struct command_registration avrf_exec_command_handlers[] = {
{
.name = "mass_erase",
.handler = &avrf_handle_mass_erase_command,
.handler = avrf_handle_mass_erase_command,
.mode = COMMAND_EXEC,
.help = "erase entire device",
},
@@ -469,15 +499,16 @@ static const struct command_registration avrf_command_handlers[] = {
};
struct flash_driver avr_flash = {
.name = "avr",
.commands = avrf_command_handlers,
.flash_bank_command = &avrf_flash_bank_command,
.erase = &avrf_erase,
.protect = &avrf_protect,
.write = &avrf_write,
.probe = &avrf_probe,
.auto_probe = &avrf_auto_probe,
.erase_check = &default_flash_mem_blank_check,
.protect_check = &avrf_protect_check,
.info = &avrf_info,
};
.name = "avr",
.commands = avrf_command_handlers,
.flash_bank_command = avrf_flash_bank_command,
.erase = avrf_erase,
.protect = avrf_protect,
.write = avrf_write,
.read = default_flash_read,
.probe = avrf_probe,
.auto_probe = avrf_auto_probe,
.erase_check = default_flash_mem_blank_check,
.protect_check = avrf_protect_check,
.info = avrf_info,
};

File diff suppressed because it is too large Load Diff

View File

@@ -35,7 +35,7 @@ struct cfi_flash_bank
uint16_t manufacturer;
uint16_t device_id;
char qry[3];
uint8_t qry[3];
/* identification string */
uint16_t pri_id;
@@ -68,6 +68,12 @@ struct cfi_flash_bank
void *pri_ext;
void *alt_ext;
/* calculated timeouts */
unsigned word_write_timeout;
unsigned buf_write_timeout;
unsigned block_erase_timeout;
unsigned chip_erase_timeout;
};
/* Intel primary extended query table
@@ -76,7 +82,7 @@ struct cfi_flash_bank
*/
struct cfi_intel_pri_ext
{
char pri[3];
uint8_t pri[3];
uint8_t major_version;
uint8_t minor_version;
uint32_t feature_support;
@@ -144,7 +150,7 @@ struct cfi_fixup
{
uint16_t mfr;
uint16_t id;
void (*fixup)(struct flash_bank *flash, void *param);
void (*fixup)(struct flash_bank *bank, void *param);
void *param;
};

View File

@@ -1,8 +1,9 @@
/***************************************************************************
* Copyright (C) 2005 by Dominic Rath <Dominic.Rath@gmx.de> *
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2007-2010 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -29,7 +30,14 @@
#include <target/image.h>
struct flash_bank *flash_banks;
/**
* @file
* Upper level of NOR flash framework.
* The lower level interfaces are to drivers. These upper level ones
* primarily support access from Tcl scripts or from GDB.
*/
static struct flash_bank *flash_banks;
int flash_driver_erase(struct flash_bank *bank, int first, int last)
{
@@ -38,7 +46,7 @@ int flash_driver_erase(struct flash_bank *bank, int first, int last)
retval = bank->driver->erase(bank, first, last);
if (retval != ERROR_OK)
{
LOG_ERROR("failed erasing sectors %d to %d (%d)", first, last, retval);
LOG_ERROR("failed erasing sectors %d to %d", first, last);
}
return retval;
@@ -48,10 +56,31 @@ int flash_driver_protect(struct flash_bank *bank, int set, int first, int last)
{
int retval;
/* callers may not supply illegal parameters ... */
if (first < 0 || first > last || last >= bank->num_sectors)
{
LOG_ERROR("illegal sector range");
return ERROR_FAIL;
}
/* force "set" to 0/1 */
set = !!set;
/* DANGER!
*
* We must not use any cached information about protection state!!!!
*
* There are a million things that could change the protect state:
*
* the target could have reset, power cycled, been hot plugged,
* the application could have run, etc.
*
* Drivers only receive valid sector range.
*/
retval = bank->driver->protect(bank, set, first, last);
if (retval != ERROR_OK)
{
LOG_ERROR("failed setting protection for areas %d to %d (%d)", first, last, retval);
LOG_ERROR("failed setting protection for areas %d to %d", first, last);
}
return retval;
@@ -65,13 +94,36 @@ int flash_driver_write(struct flash_bank *bank,
retval = bank->driver->write(bank, buffer, offset, count);
if (retval != ERROR_OK)
{
LOG_ERROR("error writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32 " (%d)",
bank->base, offset, retval);
LOG_ERROR("error writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
bank->base, offset);
}
return retval;
}
int flash_driver_read(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count)
{
int retval;
LOG_DEBUG("call flash_driver_read()");
retval = bank->driver->read(bank, buffer, offset, count);
if (retval != ERROR_OK)
{
LOG_ERROR("error reading to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
bank->base, offset);
}
return retval;
}
int default_flash_read(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count)
{
return target_read_buffer(bank->target, offset + bank->base, count, buffer);
}
void flash_bank_add(struct flash_bank *bank)
{
/* put flash bank in linked list */
@@ -126,7 +178,7 @@ int flash_get_bank_count(void)
return i;
}
struct flash_bank *get_flash_bank_by_name(const char *name)
struct flash_bank *get_flash_bank_by_name_noprobe(const char *name)
{
unsigned requested = get_flash_name_index(name);
unsigned found = 0;
@@ -145,26 +197,51 @@ struct flash_bank *get_flash_bank_by_name(const char *name)
return NULL;
}
struct flash_bank *get_flash_bank_by_num(int num)
int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result)
{
struct flash_bank *bank;
int retval;
bank = get_flash_bank_by_name_noprobe(name);
if (bank != NULL)
{
retval = bank->driver->auto_probe(bank);
if (retval != ERROR_OK)
{
LOG_ERROR("auto_probe failed");
return retval;
}
}
*bank_result = bank;
return ERROR_OK;
}
int get_flash_bank_by_num(int num, struct flash_bank **bank)
{
struct flash_bank *p = get_flash_bank_by_num_noprobe(num);
int retval;
if (p == NULL)
return NULL;
{
return ERROR_FAIL;
}
retval = p->driver->auto_probe(p);
if (retval != ERROR_OK)
{
LOG_ERROR("auto_probe failed %d\n", retval);
return NULL;
LOG_ERROR("auto_probe failed");
return retval;
}
return p;
*bank = p;
return ERROR_OK;
}
/* lookup flash bank by address */
struct flash_bank *get_flash_bank_by_addr(struct target *target, uint32_t addr)
/* lookup flash bank by address, bank not found is success, but
* result_bank is set to NULL. */
int get_flash_bank_by_addr(struct target *target, uint32_t addr, bool check, struct flash_bank **result_bank)
{
struct flash_bank *c;
@@ -176,15 +253,23 @@ struct flash_bank *get_flash_bank_by_addr(struct target *target, uint32_t addr)
if (retval != ERROR_OK)
{
LOG_ERROR("auto_probe failed %d\n", retval);
return NULL;
LOG_ERROR("auto_probe failed");
return retval;
}
/* check whether address belongs to this flash bank */
if ((addr >= c->base) && (addr <= c->base + (c->size - 1)) && target == c->target)
return c;
{
*result_bank = c;
return ERROR_OK;
}
}
LOG_ERROR("No flash at address 0x%08" PRIx32 "\n", addr);
return NULL;
*result_bank = NULL;
if (check)
{
LOG_ERROR("No flash at address 0x%08" PRIx32, addr);
return ERROR_FAIL;
}
return ERROR_OK;
}
int default_flash_mem_blank_check(struct flash_bank *bank)
@@ -280,9 +365,22 @@ int default_flash_blank_check(struct flash_bank *bank)
return ERROR_OK;
}
/* erase given flash region, selects proper bank according to target and address */
static int flash_iterate_address_range(struct target *target,
uint32_t addr, uint32_t length,
/* Manipulate given flash region, selecting the bank according to target
* and address. Maps an address range to a set of sectors, and issues
* the callback() on that set ... e.g. to erase or unprotect its members.
*
* (Note a current bad assumption: that protection operates on the same
* size sectors as erase operations use.)
*
* The "pad_reason" parameter is a kind of boolean: when it's NULL, the
* range must fit those sectors exactly. This is clearly safe; it can't
* erase data which the caller said to leave alone, for example. If it's
* non-NULL, rather than failing, extra data in the first and/or last
* sectors will be added to the range, and that reason string is used when
* warning about those additions.
*/
static int flash_iterate_address_range_inner(struct target *target,
char *pad_reason, uint32_t addr, uint32_t length,
int (*callback)(struct flash_bank *bank, int first, int last))
{
struct flash_bank *c;
@@ -291,8 +389,9 @@ static int flash_iterate_address_range(struct target *target,
int last = -1;
int i;
if ((c = get_flash_bank_by_addr(target, addr)) == NULL)
return ERROR_FLASH_DST_OUT_OF_BANK; /* no corresponding bank found */
int retval = get_flash_bank_by_addr(target, addr, true, &c);
if (retval != ERROR_OK)
return retval;
if (c->size == 0 || c->num_sectors == 0)
{
@@ -304,34 +403,76 @@ static int flash_iterate_address_range(struct target *target,
{
/* special case, erase whole bank when length is zero */
if (addr != c->base)
{
LOG_ERROR("Whole bank access must start at beginning of bank.");
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
return callback(c, 0, c->num_sectors - 1);
}
/* check whether it all fits in this bank */
if (addr + length - 1 > c->base + c->size - 1)
{
LOG_ERROR("Flash access does not fit into bank.");
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
/** @todo: handle erasures that cross into adjacent banks */
addr -= c->base;
last_addr -= c->base;
for (i = 0; i < c->num_sectors; i++)
{
struct flash_sector *f = c->sectors + i;
uint32_t end = f->offset + f->size;
/* start only on a sector boundary */
if (first < 0) {
/* scanned past the first sector? */
if (addr < f->offset)
break;
/* is this the first sector? */
if (addr == f->offset)
first = i;
else if (addr < f->offset)
break;
/* Does this need head-padding? If so, pad and warn;
* or else force an error.
*
* Such padding can make trouble, since *WE* can't
* ever know if that data was in use. The warning
* should help users sort out messes later.
*/
else if (addr < end && pad_reason) {
/* FIXME say how many bytes (e.g. 80 KB) */
LOG_WARNING("Adding extra %s range, "
"%#8.8x to %#8.8x",
pad_reason,
(unsigned) f->offset,
(unsigned) addr - 1);
first = i;
} else
continue;
}
/* is this (also?) the last sector? */
if (last_addr == f->offset + f->size) {
if (last_addr == end) {
last = i;
break;
}
/* Does this need tail-padding? If so, pad and warn;
* or else force an error.
*/
if (last_addr < end && pad_reason) {
/* FIXME say how many bytes (e.g. 80 KB) */
LOG_WARNING("Adding extra %s range, "
"%#8.8x to %#8.8x",
pad_reason,
(unsigned) last_addr,
(unsigned) end - 1);
last = i;
break;
}
@@ -346,22 +487,58 @@ static int flash_iterate_address_range(struct target *target,
LOG_ERROR("address range 0x%8.8x .. 0x%8.8x "
"is not sector-aligned",
(unsigned) (c->base + addr),
(unsigned) (last_addr - 1));
(unsigned) (c->base + last_addr - 1));
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
/* The NOR driver may trim this range down, based on
* whether or not a given sector is already erased.
*
* REVISIT should *we* trim it... ?
/* The NOR driver may trim this range down, based on what
* sectors are already erased/unprotected. GDB currently
* blocks such optimizations.
*/
return callback(c, first, last);
}
int flash_erase_address_range(struct target *target,
uint32_t addr, uint32_t length)
/* The inner fn only handles a single bank, we could be spanning
* multiple chips.
*/
static int flash_iterate_address_range(struct target *target,
char *pad_reason, uint32_t addr, uint32_t length,
int (*callback)(struct flash_bank *bank, int first, int last))
{
return flash_iterate_address_range(target,
struct flash_bank *c;
int retval = ERROR_OK;
/* Danger! zero-length iterations means entire bank! */
do
{
retval = get_flash_bank_by_addr(target, addr, true, &c);
if (retval != ERROR_OK)
return retval;
uint32_t cur_length = length;
/* check whether it all fits in this bank */
if (addr + length - 1 > c->base + c->size - 1)
{
LOG_DEBUG("iterating over more than one flash bank.");
cur_length = c->base + c->size - addr;
}
retval = flash_iterate_address_range_inner(target,
pad_reason, addr, cur_length,
callback);
if (retval != ERROR_OK)
break;
length -= cur_length;
addr += cur_length;
} while (length > 0);
return retval;
}
int flash_erase_address_range(struct target *target,
bool pad, uint32_t addr, uint32_t length)
{
return flash_iterate_address_range(target, pad ? "erase" : NULL,
addr, length, &flash_driver_erase);
}
@@ -370,12 +547,35 @@ static int flash_driver_unprotect(struct flash_bank *bank, int first, int last)
return flash_driver_protect(bank, 0, first, last);
}
static int flash_unlock_address_range(struct target *target, uint32_t addr, uint32_t length)
int flash_unlock_address_range(struct target *target, uint32_t addr, uint32_t length)
{
return flash_iterate_address_range(target,
/* By default, pad to sector boundaries ... the real issue here
* is that our (only) caller *permanently* removes protection,
* and doesn't restore it.
*/
return flash_iterate_address_range(target, "unprotect",
addr, length, &flash_driver_unprotect);
}
static int compare_section (const void * a, const void * b)
{
struct imagesection *b1, *b2;
b1=*((struct imagesection **)a);
b2=*((struct imagesection **)b);
if (b1->base_address == b2->base_address)
{
return 0;
} else if (b1->base_address > b2->base_address)
{
return 1;
} else
{
return -1;
}
}
int flash_write_unlock(struct target *target, struct image *image,
uint32_t *written, int erase, bool unlock)
{
@@ -401,20 +601,32 @@ int flash_write_unlock(struct target *target, struct image *image,
}
/* allocate padding array */
padding = malloc(image->num_sections * sizeof(padding));
padding = calloc(image->num_sections, sizeof(*padding));
/* This fn requires all sections to be in ascending order of addresses,
* whereas an image can have sections out of order. */
struct imagesection **sections = malloc(sizeof(struct imagesection *) *
image->num_sections);
int i;
for (i = 0; i < image->num_sections; i++)
{
sections[i] = &image->sections[i];
}
qsort(sections, image->num_sections, sizeof(struct imagesection *),
compare_section);
/* loop until we reach end of the image */
while (section < image->num_sections)
{
uint32_t buffer_size;
uint8_t *buffer;
int section_first;
int section_last;
uint32_t run_address = image->sections[section].base_address + section_offset;
uint32_t run_size = image->sections[section].size - section_offset;
uint32_t run_address = sections[section]->base_address + section_offset;
uint32_t run_size = sections[section]->size - section_offset;
int pad_bytes = 0;
if (image->sections[section].size == 0)
if (sections[section]->size == 0)
{
LOG_WARNING("empty section %d", section);
section++;
@@ -423,7 +635,12 @@ int flash_write_unlock(struct target *target, struct image *image,
}
/* find the corresponding flash bank */
if ((c = get_flash_bank_by_addr(target, run_address)) == NULL)
retval = get_flash_bank_by_addr(target, run_address, false, &c);
if (retval != ERROR_OK)
{
goto done;
}
if (c == NULL)
{
section++; /* and skip it */
section_offset = 0;
@@ -431,40 +648,85 @@ int flash_write_unlock(struct target *target, struct image *image,
}
/* collect consecutive sections which fall into the same bank */
section_first = section;
section_last = section;
padding[section] = 0;
while ((run_address + run_size - 1 < c->base + c->size - 1)
&& (section_last + 1 < image->num_sections))
{
if (image->sections[section_last + 1].base_address < (run_address + run_size))
/* sections are sorted */
assert(sections[section_last + 1]->base_address >= c->base);
if (sections[section_last + 1]->base_address >= (c->base + c->size))
{
LOG_DEBUG("section %d out of order(very slightly surprising, but supported)", section_last + 1);
break;
/* Done with this bank */
break;
}
/* if we have multiple sections within our image, flash programming could fail due to alignment issues
* attempt to rebuild a consecutive buffer for the flash loader */
pad_bytes = (image->sections[section_last + 1].base_address) - (run_address + run_size);
if ((run_address + run_size + pad_bytes) > (c->base + c->size))
break;
padding[section_last] = pad_bytes;
run_size += image->sections[++section_last].size;
run_size += pad_bytes;
padding[section_last] = 0;
LOG_INFO("Padding image section %d with %d bytes", section_last-1, pad_bytes);
/* FIXME This needlessly touches sectors BETWEEN the
* sections it's writing. Without auto erase, it just
* writes ones. That WILL INVALIDATE data in cases
* like Stellaris Tempest chips, corrupting internal
* ECC codes; and at least FreeScale suggests issues
* with that approach (in HC11 documentation).
*
* With auto erase enabled, data in those sectors will
* be needlessly destroyed; and some of the limited
* number of flash erase cycles will be wasted...
*
* In both cases, the extra writes slow things down.
*/
/* if we have multiple sections within our image,
* flash programming could fail due to alignment issues
* attempt to rebuild a consecutive buffer for the flash loader */
pad_bytes = (sections[section_last + 1]->base_address) - (run_address + run_size);
padding[section_last] = pad_bytes;
run_size += sections[++section_last]->size;
run_size += pad_bytes;
if (pad_bytes > 0)
LOG_INFO("Padding image section %d with %d bytes", section_last-1, pad_bytes);
}
/* fit the run into bank constraints */
if (run_address + run_size - 1 > c->base + c->size - 1)
{
LOG_WARNING("writing %d bytes only - as image section is %d bytes and bank is only %d bytes", \
(int)(c->base + c->size - run_address), (int)(run_size), (int)(c->size));
/* If we have more than one flash chip back to back, then we limit
* the current write operation to the current chip.
*/
LOG_DEBUG("Truncate flash run size to the current flash chip.");
run_size = c->base + c->size - run_address;
assert(run_size > 0);
}
/* If we're applying any sector automagic, then pad this
* (maybe-combined) segment to the end of its last sector.
*/
if (unlock || erase) {
int sector;
uint32_t offset_start = run_address - c->base;
uint32_t offset_end = offset_start + run_size;
uint32_t end = offset_end, delta;
for (sector = 0; sector < c->num_sectors; sector++) {
end = c->sectors[sector].offset
+ c->sectors[sector].size;
if (offset_end <= end)
break;
}
delta = end - offset_end;
padding[section_last] += delta;
run_size += delta;
}
/* allocate buffer */
buffer = malloc(run_size);
if (buffer == NULL)
{
LOG_ERROR("Out of memory for flash bank buffer");
retval = ERROR_FAIL;
goto done;
}
buffer_size = 0;
/* read sections to the buffer */
@@ -473,15 +735,25 @@ int flash_write_unlock(struct target *target, struct image *image,
size_t size_read;
size_read = run_size - buffer_size;
if (size_read > image->sections[section].size - section_offset)
size_read = image->sections[section].size - section_offset;
if (size_read > sections[section]->size - section_offset)
size_read = sections[section]->size - section_offset;
if ((retval = image_read_section(image, section, section_offset,
/* KLUDGE!
*
* #¤%#"%¤% we have to figure out the section # from the sorted
* list of pointers to sections to invoke image_read_section()...
*/
intptr_t diff = (intptr_t)sections[section] - (intptr_t)image->sections;
int t_section_num = diff / sizeof(struct imagesection);
LOG_DEBUG("image_read_section: section = %d, t_section_num = %d, section_offset = %d, buffer_size = %d, size_read = %d",
(int)section,
(int)t_section_num, (int)section_offset, (int)buffer_size, (int)size_read);
if ((retval = image_read_section(image, t_section_num, section_offset,
size_read, buffer + buffer_size, &size_read)) != ERROR_OK || size_read == 0)
{
free(buffer);
free(padding);
return retval;
goto done;
}
/* see if we need to pad the section */
@@ -491,7 +763,7 @@ int flash_write_unlock(struct target *target, struct image *image,
buffer_size += size_read;
section_offset += size_read;
if (section_offset >= image->sections[section].size)
if (section_offset >= sections[section]->size)
{
section++;
section_offset = 0;
@@ -509,7 +781,8 @@ int flash_write_unlock(struct target *target, struct image *image,
if (erase)
{
/* calculate and erase sectors */
retval = flash_erase_address_range(target, run_address, run_size);
retval = flash_erase_address_range(target,
true, run_address, run_size);
}
}
@@ -523,14 +796,17 @@ int flash_write_unlock(struct target *target, struct image *image,
if (retval != ERROR_OK)
{
free(padding);
return retval; /* abort operation */
/* abort operation */
goto done;
}
if (written != NULL)
*written += run_size; /* add run size to total written counter */
}
done:
free(sections);
free(padding);
return retval;

View File

@@ -3,6 +3,7 @@
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -24,6 +25,11 @@
#include <flash/common.h>
/**
* @file
* Upper level NOR flash interfaces.
*/
struct image;
#define FLASH_MAX_ERROR_STR (128)
@@ -48,6 +54,10 @@ struct flash_sector
* Indication of protection status: 0 = unprotected/unlocked,
* 1 = protected/locked, other = unknown. Set by
* @c flash_driver_s::protect_check.
*
* This information must be considered stale immediately.
* A million things could make it stale: power cycle,
* reset of target, code running on target, etc.
*/
int is_protected;
};
@@ -64,7 +74,7 @@ struct flash_sector
*/
struct flash_bank
{
char *name;
const char *name;
struct target *target; /**< Target to which this bank belongs. */
@@ -92,15 +102,20 @@ struct flash_bank
/// Registers the 'flash' subsystem commands
int flash_register_commands(struct command_context *cmd_ctx);
/// Initializes the 'flash' subsystem drivers
int flash_init_drivers(struct command_context *cmd_ctx);
/**
* Erases @a length bytes in the @a target flash, starting at @a addr.
* The range @a addr to @a addr + @a length - 1 must be strictly
* sector aligned, unless @a pad is true. Setting @a pad true extends
* the range, at beginning and/or end, if needed for sector alignment.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
int flash_erase_address_range(struct target *target,
uint32_t addr, uint32_t length);
bool pad, uint32_t addr, uint32_t length);
int flash_unlock_address_range(struct target *target, uint32_t addr,
uint32_t length);
/**
* Writes @a image into the @a target flash. The @a written parameter
* will contain the
@@ -113,6 +128,7 @@ int flash_erase_address_range(struct target *target,
*/
int flash_write(struct target *target,
struct image *image, uint32_t *written, int erase);
/**
* Forces targets to re-examine their erase/protection state.
* This routine must be called when the system may modify the status.
@@ -120,6 +136,16 @@ int flash_write(struct target *target,
void flash_set_dirty(void);
/// @returns The number of flash banks currently defined.
int flash_get_bank_count(void);
/**
* Provides default read implementation for flash memory.
* @param bank The bank to read.
* @param buffer The data bytes read.
* @param offset The offset into the chip to read.
* @param count The number of bytes to read.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
int default_flash_read(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count);
/**
* Provides default erased-bank check handling. Checks to see if
* the flash driver knows they are erased; if things look uncertain,
@@ -142,13 +168,22 @@ int default_flash_mem_blank_check(struct flash_bank *bank);
* bank number: when two str9x banks are defined, then 'str9x.1' refers
* to the second.
*/
struct flash_bank *get_flash_bank_by_name(const char *name);
int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result);
/**
* Returns a flash bank by the specified flash_bank_s bank_number, @a num.
* @param num The flash bank number.
* @returns A struct flash_bank for flash bank @a num, or NULL
* Returns the flash bank specified by @a name, which matches the
* driver name and a suffix (option) specify the driver-specific
* bank number. The suffix consists of the '.' and the driver-specific
* bank number: when two str9x banks are defined, then 'str9x.1' refers
* to the second.
*/
struct flash_bank *get_flash_bank_by_num(int num);
struct flash_bank *get_flash_bank_by_name_noprobe(const char *name);
/**
* Returns the flash bank like get_flash_bank_by_name(), without probing.
* @param num The flash bank number.
* @param bank returned bank if fn returns ERROR_OK
* @returns ERROR_OK if successful
*/
int get_flash_bank_by_num(int num, struct flash_bank **bank);
/**
* Retreives @a bank from a command argument, reporting errors parsing
* the bank identifier or retreiving the specified bank. The bank
@@ -171,8 +206,9 @@ struct flash_bank *get_flash_bank_by_num_noprobe(int num);
* Returns the flash bank located at a specified address.
* @param target The target, presumed to contain one or more banks.
* @param addr An address that is within the range of the bank.
* @param check return ERROR_OK and result_bank NULL if the bank does not exist
* @returns The struct flash_bank located at @a addr, or NULL.
*/
struct flash_bank *get_flash_bank_by_addr(struct target *target, uint32_t addr);
int get_flash_bank_by_addr(struct target *target, uint32_t addr, bool check, struct flash_bank **result_bank);
#endif // FLASH_NOR_CORE_H

View File

@@ -3,6 +3,7 @@
* Copyright (C) 2007,2008 Øyvind Harboe <oyvind.harboe@zylin.com> *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
* Copyright (C) 2010 by Antonio Borneo <borneo.antonio@gmail.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
@@ -53,7 +54,7 @@ struct flash_driver
* Gives a human-readable name of this flash driver,
* This field is used to select and initialize the driver.
*/
char *name;
const char *name;
/**
* An array of driver-specific commands to register. When called
@@ -75,11 +76,12 @@ struct flash_driver
* CMD_ARGV[2] = baseaddress
* CMD_ARGV[3] = lengthbytes
* CMD_ARGV[4] = chip_width_in bytes
* CMD_ARGV[5] = bus_width_bytes
* CMD_ARGV[5] = bus_width_in_bytes
* CMD_ARGV[6] = driver-specific parameters
* @endcode
*
* For example, CMD_ARGV[4] = 16 bit flash, CMD_ARGV[5] = 32bit bus.
* For example, CMD_ARGV[4] = 2 (for 16 bit flash),
* CMD_ARGV[5] = 4 (for 32 bit bus).
*
* If extra arguments are provided (@a CMD_ARGC > 6), they will
* start in @a CMD_ARGV[6]. These can be used to implement
@@ -103,9 +105,12 @@ struct flash_driver
/**
* Bank/sector protection routine (target-specific).
* When called, the driver should disable 'flash write' bits (or
* enable 'erase protection' bits) for the given @a bank and @a
* sectors.
*
* When called, the driver should enable/disable protection
* for MINIMUM the range covered by first..last sectors
* inclusive. Some chips have alignment requirements will
* cause the actual range to be protected / unprotected to
* be larger than the first..last range.
*
* @param bank The bank to protect or unprotect.
* @param set If non-zero, enable protection; if 0, disable it.
@@ -129,6 +134,20 @@ struct flash_driver
int (*write)(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count);
/**
* Read data from the flash. Note CPU address will be
* "bank->base + offset", while the physical address is
* dependent upon current target MMU mappings.
*
* @param bank The bank to read.
* @param buffer The data bytes read.
* @param offset The offset into the chip to read.
* @param count The number of bytes to read.
* @returns ERROR_OK if successful; otherwise, an error code.
*/
int (*read)(struct flash_bank *bank,
uint8_t *buffer, uint32_t offset, uint32_t count);
/**
* Probe to determine what kind of flash is present.
* This is invoked by the "probe" script command.

View File

@@ -33,18 +33,23 @@ extern struct flash_driver aduc702x_flash;
extern struct flash_driver stellaris_flash;
extern struct flash_driver str9xpec_flash;
extern struct flash_driver stm32x_flash;
extern struct flash_driver stm32xf2xxx_flash;
extern struct flash_driver tms470_flash;
extern struct flash_driver ecosflash_flash;
extern struct flash_driver ocl_flash;
extern struct flash_driver pic32mx_flash;
extern struct flash_driver avr_flash;
extern struct flash_driver faux_flash;
extern struct flash_driver virtual_flash;
extern struct flash_driver stmsmi_flash;
extern struct flash_driver em357_flash;
//extern struct flash_driver dsp5680xx_flash;
/**
* The list of built-in flash drivers.
* @todo Make this dynamically extendable with loadable modules.
*/
struct flash_driver *flash_drivers[] = {
static struct flash_driver *flash_drivers[] = {
&lpc2000_flash,
&lpc288x_flash,
&lpc2900_flash,
@@ -57,12 +62,18 @@ struct flash_driver *flash_drivers[] = {
&stellaris_flash,
&str9xpec_flash,
&stm32x_flash,
&stm32xf2xxx_flash,
&tms470_flash,
&ecosflash_flash,
&ocl_flash,
&pic32mx_flash,
&avr_flash,
&faux_flash,
&virtual_flash,
&stmsmi_flash,
&em357_flash,
// Disabled for now, it generates warnings
//&dsp5680xx_flash,
NULL,
};

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