# SPDX-License-Identifier: GPL-2.0-or-later
# Cadence virtual debug interface
# RISCV core

if {![info exists HARTID]} {
	set HARTID 0x00
}
if {![info exists CHIPNAME]} {
	set CHIPNAME riscv
}
set _TARGETNAME $CHIPNAME.cpu

target create $_TARGETNAME riscv -chain-position $_TARGETNAME -coreid $HARTID

riscv set_reset_timeout_sec 120
riscv set_command_timeout_sec 120
riscv set_mem_access sysbus progbuf