# SPDX-License-Identifier: GPL-2.0-or-later # # Target: MPFS PolarFire SoC-series processors by Microchip Technologies # # https://www.microchip.com/en-us/products/fpgas-and-plds/system-on-chip-fpgas/polarfire-soc-fpgas # if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME mpfs } # Process COREID variable if { ![exists COREID] } { set COREID -1 } transport select jtag # PolarFire SoC (MPFS) hart id to name lookup table array set hart_names { 0 e51 1 u54_1 2 u54_2 3 u54_3 4 u54_4 } # MPFS devices table set mpfs_cpu_tap_info { MPFS025 0x0f8531cf MPFS095 0x0f8181cf MPFS160 0x0f8191cf MPFS250 0x0f81a1cf MPFS460 0x0f81b1cf RTPFS160 0x0f8991cf RTPFS460 0x0f89b1cf } proc expected_ids {tap_list} { set str "" dict for {key value} $tap_list { append str "-expected-id" " " $value " " } return $str } set irlen 8 set expected_ids [expected_ids $mpfs_cpu_tap_info] eval jtag newtap $_CHIPNAME cpu -irlen $irlen $expected_ids -ignore-version if {$COREID == -1} { # Single debug connection to all HART's set _TARGETNAME_0 $_CHIPNAME.$hart_names(0) set _TARGETNAME_1 $_CHIPNAME.$hart_names(1) set _TARGETNAME_2 $_CHIPNAME.$hart_names(2) set _TARGETNAME_3 $_CHIPNAME.$hart_names(3) set _TARGETNAME_4 $_CHIPNAME.$hart_names(4) target create $_TARGETNAME_0 riscv -chain-position $_CHIPNAME.cpu -coreid 0 -rtos hwthread target create $_TARGETNAME_1 riscv -chain-position $_CHIPNAME.cpu -coreid 1 -rtos hwthread target create $_TARGETNAME_2 riscv -chain-position $_CHIPNAME.cpu -coreid 2 -rtos hwthread target create $_TARGETNAME_3 riscv -chain-position $_CHIPNAME.cpu -coreid 3 -rtos hwthread target create $_TARGETNAME_4 riscv -chain-position $_CHIPNAME.cpu -coreid 4 -rtos hwthread target smp $_TARGETNAME_0 $_TARGETNAME_1 $_TARGETNAME_2 $_TARGETNAME_3 $_TARGETNAME_4 } else { # Debug connection to a specific hart set _TARGETNAME_0 $_CHIPNAME.$hart_names($COREID) target create $_TARGETNAME_0 riscv -chain-position $_CHIPNAME.cpu -coreid $COREID } # Only TRSTn supported reset_config trst_only