Cores like Cortex-M7, Cortex-M55 and Cortex-M85 can have either D-Cache and/or I-Cache. Using SW breakpoints in RAM requires handling these caches. Detect the presence of cache at examine. Detect cache state (enable/disable) at debug entry. Take care of caches synchronization through the PoC (usually the SRAM) while setting and removing SW breakpoints. Add command 'cache_info' to check cache presence and size. Change-Id: Ice637c215fe3042c8fff57edefbab1b86515ef4b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/9077 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
58 lines
1.5 KiB
C
58 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2025 by STMicroelectronics
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* Copyright (C) 2025 by Antonio Borneo <borneo.antonio@gmail.com>
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*/
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#ifndef OPENOCD_TARGET_ARMV7M_CACHE_H
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#define OPENOCD_TARGET_ARMV7M_CACHE_H
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#include <stdbool.h>
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#include <stdint.h>
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#include <helper/types.h>
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struct target;
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struct armv7m_cache_size {
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// cache dimensioning
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uint32_t line_len;
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uint32_t associativity;
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uint32_t num_sets;
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uint32_t cache_size;
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// info for set way operation on cache
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uint32_t index;
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uint32_t index_shift;
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uint32_t way;
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uint32_t way_shift;
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};
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// information about one architecture cache at any level
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struct armv7m_arch_cache {
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unsigned int ctype; // cache type, CLIDR encoding
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struct armv7m_cache_size d_u_size; // data cache
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struct armv7m_cache_size i_size; // instruction cache
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};
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// common cache information
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struct armv7m_cache_common {
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bool info_valid;
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bool has_i_cache;
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bool has_d_u_cache;
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unsigned int loc; // level of coherency
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uint32_t d_min_line_len; // minimum d-cache line_len
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uint32_t i_min_line_len; // minimum i-cache line_len
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struct armv7m_arch_cache arch[6]; // cache info, L1 - L7
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};
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int armv7m_identify_cache(struct target *target);
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int armv7m_d_cache_flush(struct target *target, uint32_t address,
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unsigned int length);
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int armv7m_i_cache_inval(struct target *target, uint32_t address,
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unsigned int length);
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int armv7m_handle_cache_info_command(struct command_invocation *cmd,
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struct target *target);
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#endif /* OPENOCD_TARGET_ARMV7M_CACHE_H */
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