16065e06ad
In preparation for supporting the ARM MCRR and MRRC commands which will require using two 32-bit registers to read/write a 64-bit internal register, extract the common logic to read/write from/to a register to/from DCC and make that parameterized such that we can do this through not just r0. Change-Id: Iadb73f5cde8cf5961b5a18ddd198bf39d791e610 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-on: http://openocd.zylin.com/5227 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>