4dc012865f
This is a TODO in the src/target/arm_adi_v5.h for MEM-AP registers. Some new registers are introduced in ADIv5.2 specification. MEM_AP_REG_MGT (0x20) // Memory Barrier Transfer register MEM_AP_REG_TAR64 (0x08) // Bits[63:32] of Transfer Address MEM_AP_REG_BASE64 (0xF0) // Bits[63:32] of Debug Base Address Refer to 7.5 MEM-AP register summary in IHI0031C: ARM Debug Interface Architecture Specification ADIv5.0 to ADIv5.2 Change-Id: I3bc4296a04c35f5c64f851e5865d3099922613fa Signed-off-by: Alamy Liu <alamy.liu@gmail.com> Reviewed-on: http://openocd.zylin.com/2904 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>