Previously, only the first 32 GPIO were supported on the BCM2835.
Performance was cited as being the primary justification for not
supporting all 54 pins, notably:
1. There is overhead for calculating the memory offset for the pin
2. GPIO values cannot be written in bulk if pins span memory offsets
Now, all 54 GPIO pins are supported by the driver.
Since pins may use different offsets, multiple pins cannot be toggled
with one memory store. Multiple stores now need to occur when one
sufficed before.
To offset some of the performance overhead for the additional stores,
memory addresses, masks, and shift bits are calculated once and cached
into struct. Calculating these once reduces the number of instructions
a function needs to run in order to manipulate a given GPIO.
The following functions have been updated to leverage the new struct
as they represent some of the hottest paths:
bcm2835_swdio_drive
bcm2835_swdio_read
bcm2835gpio_swd_write_fast
bcm2835gpio_read
bcm2835gpio_write
For `bcm2835gpio_swd_write_fast`, performance should be roughly the same
as the number of memory stores hasn't changed.
For `bcm2835_write`, there is a slight performance degradation since
TMS/TDI/TCK are set separately which incurs an additional memory store.
Instruction counts across the above functions are reduced by ~10-40%.
Macros to access registers have been reworked into inline functions to
support access to all pins and to avoid checkpatch headaches.
The `initial_gpio_state.output_level` member has been retyped to bool to
better align with the expected values.
Support for adjusting pads for the expanded pin range has been left out
as support for manipulating these settings should be moved out of this
driver and into its own utility.
Change-Id: I18853d1a2c86776658630326c71a6bf236fcc6da
Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7732
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
0021ee2f5d