435e6101c6
With this commit we add tcl files which describes ARCv2 architecture features and configure files for ARCv2 EMSK board. Changes since v1: -Moved from http://openocd.zylin.com/#/c/5332/4 into separate commit. Changes: 22.01.2020: -Removed "actionpoints" handling code in tcl/cpu/arc/v2.tcl because this capability is not supported yet. Changes: 17.03.2020: -Update Licence headers -Cleanup indents -Removed "reset halt" in boards .tcl -Updated adapter frequency commands Changes: 15.03.2020: -Removed "init" in the of boards .tcl Change-Id: I51bf620abe7b8e046e1dccc861a7d963965d3a42 Signed-off-by: Evgeniy Didin <didin@synopsys.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-on: http://openocd.zylin.com/5350 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
35 lines
871 B
Tcl
35 lines
871 B
Tcl
# Copyright (C) 2014-2015,2020 Synopsys, Inc.
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# Anton Kolesov <anton.kolesov@synopsys.com>
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# Didin Evgeniy <didin@synopsys.com>
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#
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# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Xilinx Spartan-6 XC6SLX45 FPGA on EM Starter Kit v1.
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# Xilinx Spartan-6 XC6SLX150 FPGA on EM Starter Kit v2.
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#
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source [find cpu/arc/em.tcl]
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set _CHIPNAME arc-em
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set _TARGETNAME $_CHIPNAME.cpu
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# EM SK IDENTITY is 0x200444b1
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# EM SK v2 IDENTITY is 0x200044b1
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -expected-id 0x200444b1 \
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-expected-id 0x200044b1
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set _coreid 0
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set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
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target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME \
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-coreid 0 -dbgbase $_dbgbase -endian little
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# There is no SRST, so do a software reset
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$_TARGETNAME configure -event reset-assert "arc_em_reset $_TARGETNAME"
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arc_em_init_regs
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# vim:ft=tcl
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