92287c1a2a
This is added for future RISC-V changes. The RISC-V debug interface can explicitly tell a debugger when a hart is unavailable. This is used for instance when that hart is powered down (or yet to be powered up out of reset). Imported from https://github.com/riscv-collab/riscv-openocd/pull/752 Change-Id: I8a062d59eea1e5b3c788281a75159592db024683 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8911 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Bernhard Rosenkränzer <bero@baylibre.com>