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Nishanth Menon 9f1b4bbe70 tcl/target/ti_k3: Add J721S2 SoC 
Add support for the latest in TI k3 family J721S2 SoC.

For further details, see http://www.ti.com/lit/pdf/spruj28

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I608ab4513ffb6b5c4166ba423e7d0dddbbb3bbfd
Reviewed-on: https://review.openocd.org/c/openocd/+/6796
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:41:16 +00:00
..
board
board: Add NXP LS1088ARDB
2022-02-26 15:36:38 +00:00
chip
tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change
2021-05-08 09:49:08 +01:00
cpld
cpld: altera-epm240: Increase adapter speed
2022-02-26 15:29:52 +00:00
cpu
tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change
2021-05-08 09:48:44 +01:00
fpga
tcl: add lattice ECP5 family support
2021-08-25 03:47:50 +00:00
interface
Cadence virtual debug interface (vdebug) integration
2022-02-14 15:12:10 +00:00
target
tcl/target/ti_k3: Add J721S2 SoC
2022-03-12 09:41:16 +00:00
test
tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change
2021-05-08 09:48:44 +01:00
tools
tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change
2021-05-08 09:49:08 +01:00
bitsbytes.tcl
tcl: fix some minor typo
2021-05-22 10:06:26 +01:00
mem_helper.tcl
tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change
2021-05-08 09:48:44 +01:00
memory.tcl
tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change
2021-05-08 09:49:08 +01:00
mmr_helpers.tcl
tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change
2021-05-08 09:49:08 +01:00